using field-effect transistors only

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G11C11/412

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/412using field-effect transistors only

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Static random-access memory (SRAM) device including three-dimension...
- Patent number 12,342,521
- Issue date Jun 24, 2025
- Samsung Electronics Co., Ltd.
- Kyungsoo Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,342,520
- Issue date Jun 24, 2025
- SOCIONEXT INC.
- Masanobu Hirose
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell supporting bit-write-mask function
- Patent number 12,334,145
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for performing a MAC operation in a memory array
- Patent number 12,327,591
- Issue date Jun 10, 2025
- MediaTek Singapore Pte Ltd.
- Chetan Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical interconnect elevator based on through silicon vias
- Patent number 12,327,790
- Issue date Jun 10, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical memory architecture including on-chip multi-bank non-v...
- Patent number 12,328,880
- Issue date Jun 10, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Navneet K. Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch circuit formed by modified memory cells
- Patent number 12,322,438
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device and manufacturing method of the same
- Patent number 12,315,560
- Issue date May 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huai-Ying Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-based storage circuits having efficient integrated circuit la...
- Patent number 12,315,559
- Issue date May 27, 2025
- Samsung Electronics Co., Ltd.
- Kijun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated scaling and stretching platform for optimizing monolithi...
- Patent number 12,308,072
- Issue date May 20, 2025
- Invention And Collaboration Laboratory Pte. Ltd.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port bitcell architecture
- Patent number 12,300,310
- Issue date May 13, 2025
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random access memory device
- Patent number 12,300,690
- Issue date May 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Display apparatus and method of manufacturing the same
- Patent number 12,283,651
- Issue date Apr 22, 2025
- Seoul Semiconductor Co., Ltd.
- Motonobu Takeya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method for forming the same
- Patent number 12,283,311
- Issue date Apr 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Well pick-up region design for improving memory macro performance
- Patent number 12,274,045
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Chuan Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device including first and second clock generators
- Patent number 12,272,427
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-gate field-effect transistors in integrated circuits
- Patent number 12,267,991
- Issue date Apr 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices with improved bit line loading
- Patent number 12,260,903
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact static random-access memory structure
- Patent number 12,256,528
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ruey-Wen Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile SRAM
- Patent number 12,254,923
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Single bitline SRAM pixel and method for driving the same
- Patent number 12,249,299
- Issue date Mar 11, 2025
- OmniVision Technologies, Inc.
- Qing Qin
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for tuning threshold voltage
- Patent number 12,250,803
- Issue date Mar 11, 2025
- TAIWAN SEMICONDUCTOR MANUFACTORING COMPANY, LTD.
- Chih-Hsuan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power static random access memory
- Patent number 12,237,008
- Issue date Feb 25, 2025
- UNTETHER AI CORPORATION
- Katsuyuki Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective bit line clamping control for an in-memory compute operat...
- Patent number 12,237,007
- Issue date Feb 25, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Kedar Janardan Dhori
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for protecting a PUF generator
- Patent number 12,236,001
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including a word line with portions with different si...
- Patent number 12,230,318
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of manufacturing a semiconductor device using a mask
- Patent number 12,225,703
- Issue date Feb 11, 2025
- Samsung Electronics Co., Ltd.
- Mingyu Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Pose estimation in extended reality systems
- Patent number 12,224,002
- Issue date Feb 11, 2025
- QUALCOMM Incorporated
- Wesley James Holland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout pattern of static random access memory and the forming metho...
- Patent number 12,224,001
- Issue date Feb 11, 2025
- United Microelectronics Corp.
- Chun-Hsien Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port SRAM cell and method of designing the same
- Patent number 12,225,702
- Issue date Feb 11, 2025
- Samsung Electronics Co., Ltd.
- Eojin Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210103
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Including First and Second Clock Generators
- Publication number 20250210081
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY DEVICE
- Publication number 20250212379
- Publication date Jun 26, 2025
- IMEC vzw
- Dawit Burusie Abdi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT
- Publication number 20250210102
- Publication date Jun 26, 2025
- Intel Corporation
- Amlan Ghosh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING
- Publication number 20250209026
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20250212377
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Rui-Teng CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR TUNING THRESHOLD VOLTAGE
- Publication number 20250212380
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hsuan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210104
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SRAM
- Publication number 20250210107
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-POWER STATIC RANDOM ACCESS MEMORY
- Publication number 20250201300
- Publication date Jun 19, 2025
- UNTETHER AI CORPORATION
- Katsuyuki SATO
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CELL STRUCTURE
- Publication number 20250203838
- Publication date Jun 19, 2025
- Invention And Collaboration Laboratory, Inc.
- Chao-Chun LU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH IMPROVED BIT LINE LOADING
- Publication number 20250201303
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...
- Publication number 20250191651
- Publication date Jun 12, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Seong Ook JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...
- Publication number 20250174269
- Publication date May 29, 2025
- STMicroelectronics International N.V.
- Kedar Janardan DHORI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250169048
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Jeewoong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING A WORD LINE WITH PORTIONS WITH DIFFERENT SI...
- Publication number 20250157531
- Publication date May 15, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CIRCUIT, DRIVING METHOD, AND ELECTRONIC APPARATUS
- Publication number 20250140314
- Publication date May 1, 2025
- Sony Semiconductor Solutions Corporation
- Yusuke Shuto
- G11 - INFORMATION STORAGE
Information Patent Application
Layout pattern for static random access memory
- Publication number 20250142801
- Publication date May 1, 2025
- UNITED MICROELECTRONICS CORP.
- Shu-Wei Yeh
- G11 - INFORMATION STORAGE
Information Patent Application
Dual Wordline Applications in Memory
- Publication number 20250140310
- Publication date May 1, 2025
- ARM Limited
- Vivek Asthana
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES HAVING MIDDLE STRAP AREAS FOR ROUTING POWER SIGNALS
- Publication number 20250131958
- Publication date Apr 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ping-Wei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
COMPILED MULTI-PORT MEMORY
- Publication number 20250124977
- Publication date Apr 17, 2025
- Synopsys, Inc.
- John Edward BARTH
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR DUAL EDGE MEMORY WRITE OPERATION
- Publication number 20250124978
- Publication date Apr 17, 2025
- MICROCHIP TECHNOLOGY INCORPORATED
- James Kim
- G11 - INFORMATION STORAGE
Information Patent Application
UNIT CELL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20250124975
- Publication date Apr 17, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- JUNG-MYUNG KANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
- Publication number 20250120058
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACK...
- Publication number 20250111875
- Publication date Apr 3, 2025
- STMicroelectronics International N.V.
- Sant Swaroop SHRIVASTAVA
- G11 - INFORMATION STORAGE
Information Patent Application
GATE METAL JUMPER IN STACKED FET SRAM
- Publication number 20250107059
- Publication date Mar 27, 2025
- International Business Machines Corporation
- Chen Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER
- Publication number 20250104753
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Hsien HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
HIERARCHICAL MEMORY ARCHITECTURE INCLUDING ON-CHIP MULTI-BANK NON-V...
- Publication number 20250098177
- Publication date Mar 20, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Navneet K. Jain
- G11 - INFORMATION STORAGE
Information Patent Application
IMPROVED SRAM MEMORY INITIALISATION MANAGEMENT DEVICE
- Publication number 20250095723
- Publication date Mar 20, 2025
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe NOEL
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS
- Publication number 20250096131
- Publication date Mar 20, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS

using field-effect transistors only

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Static random-access memory (SRAM) device including three-dimension...

Semiconductor storage device

Bitcell supporting bit-write-mask function

Method and apparatus for performing a MAC operation in a memory array

Vertical interconnect elevator based on through silicon vias

Hierarchical memory architecture including on-chip multi-bank non-v...

Latch circuit formed by modified memory cells

Integrated circuit device and manufacturing method of the same

Latch-based storage circuits having efficient integrated circuit la...

Integrated scaling and stretching platform for optimizing monolithi...

Multi-port bitcell architecture

Static random access memory device

Display apparatus and method of manufacturing the same

Memory device and method for forming the same

Well pick-up region design for improving memory macro performance

Semiconductor device including first and second clock generators

Multi-gate field-effect transistors in integrated circuits

Memory devices with improved bit line loading

Compact static random-access memory structure

Nonvolatile SRAM

Single bitline SRAM pixel and method for driving the same

Device and method for tuning threshold voltage

Low-power static random access memory

Selective bit line clamping control for an in-memory compute operat...

Method and apparatus for protecting a PUF generator

Memory device including a word line with portions with different si...

Methods of manufacturing a semiconductor device using a mask

Pose estimation in extended reality systems

Layout pattern of static random access memory and the forming metho...

Dual port SRAM cell and method of designing the same

Patents Applicationslast 30 patents

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

Semiconductor Device Including First and Second Clock Generators

STATIC RANDOM ACCESS MEMORY DEVICE

MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING

STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF

DEVICE AND METHOD FOR TUNING THRESHOLD VOLTAGE

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

NONVOLATILE SRAM

LOW-POWER STATIC RANDOM ACCESS MEMORY

SEMICONDUCTOR CELL STRUCTURE

MEMORY DEVICES WITH IMPROVED BIT LINE LOADING

PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...

SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...

SEMICONDUCTOR DEVICE

MEMORY DEVICE INCLUDING A WORD LINE WITH PORTIONS WITH DIFFERENT SI...

SEMICONDUCTOR CIRCUIT, DRIVING METHOD, AND ELECTRONIC APPARATUS

Layout pattern for static random access memory

Dual Wordline Applications in Memory

MEMORY DEVICES HAVING MIDDLE STRAP AREAS FOR ROUTING POWER SIGNALS

COMPILED MULTI-PORT MEMORY

METHOD AND APPARATUS FOR DUAL EDGE MEMORY WRITE OPERATION

UNIT CELL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF

PROGRAMMABLE BIT-CELL BASED DISCHARGE CELL FOR READ SELF-TIME TRACK...

GATE METAL JUMPER IN STACKED FET SRAM

SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER

HIERARCHICAL MEMORY ARCHITECTURE INCLUDING ON-CHIP MULTI-BANK NON-V...

IMPROVED SRAM MEMORY INITIALISATION MANAGEMENT DEVICE

VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS