using pipelining techniques, i.e. using latches between functional memory parts

Industry

CPC
G11C7/1039

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1039using pipelining techniques, i.e. using latches between functional memory parts

Industries

Patents Grantslast 30 patents

Information Patent Grant
Signal routing between memory die and logic die
- Patent number 12,165,696
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory device and storage device
- Patent number 12,165,734
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Minho Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with memory pillar inside conductor
- Patent number 12,159,684
- Issue date Dec 3, 2024
- Kioxia Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture and method for repeatedly using the...
- Patent number 12,159,685
- Issue date Dec 3, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, method of operating the memory device, memory module...
- Patent number 12,154,651
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Sunyoung Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system, and method of operating the same
- Patent number 12,154,628
- Issue date Nov 26, 2024
- Yangtze Memory Technologies Co., Ltd.
- Weijun Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy and majority voting in a key-value data storage system u...
- Patent number 12,142,318
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Tyler L. Betz
- G11 - INFORMATION STORAGE
Information Patent Grant
Soft decoding correctable page assisted reference voltage tracking
- Patent number 12,136,464
- Issue date Nov 5, 2024
- INNOGRIT TECHNOLOGIES CO., LTD.
- Chenrong Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibration methods and structures for partitioned memory architect...
- Patent number 12,136,468
- Issue date Nov 5, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated resistor network and method for fabricating the same
- Patent number 12,136,922
- Issue date Nov 5, 2024
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Grant
Area-efficient scalable memory read-data multiplexing and latching
- Patent number 12,130,654
- Issue date Oct 29, 2024
- Intel Corporation
- Amir Javidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module with reduced read/write turnaround overhead
- Patent number 12,130,757
- Issue date Oct 29, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on chip (SOC) with processor and integrated ferroelectric me...
- Patent number 12,125,513
- Issue date Oct 22, 2024
- Seagate Technology LLC
- Jon D. Trantham
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for resolving data (DQ) line swapping configura...
- Patent number 12,125,554
- Issue date Oct 22, 2024
- NXP USA, INC.
- Radu-Marian Ivan
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit and operation method and inspection method thereof
- Patent number 12,119,073
- Issue date Oct 15, 2024
- Aspeed Technology Inc.
- Hung-Ming Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing circuit and semiconductor memory divided into segments
- Patent number 12,119,078
- Issue date Oct 15, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jia Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Data correction of redundant data storage
- Patent number 12,119,074
- Issue date Oct 15, 2024
- Texas Instruments Incorporated
- Timothy Duryea
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits and methods of mitigating hold time failure of pipeline fo...
- Patent number 12,119,079
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for wafer-on-wafer formed memory and logic
- Patent number 12,112,792
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for reading data based on a program status of...
- Patent number 12,112,826
- Issue date Oct 8, 2024
- SK Hynix Inc.
- Kang Woo Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal routing between memory die and logic die for mode based oper...
- Patent number 12,112,793
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) device
- Patent number 12,106,819
- Issue date Oct 1, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including error correction device
- Patent number 12,100,466
- Issue date Sep 24, 2024
- SK Hynix Inc.
- Jin Ho Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Test mode security circuit
- Patent number 12,100,476
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Kari Crane
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,100,459
- Issue date Sep 24, 2024
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction circuit using multi-clock and semiconductor device...
- Patent number 12,100,465
- Issue date Sep 24, 2024
- Samsung Electronics Co., Ltd.
- Youngjun Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Stream oriented writing for improving sequential write and read per...
- Patent number 12,093,548
- Issue date Sep 17, 2024
- Western Digital Technologies, Inc.
- Sridhar Prudviraj Gunda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory device, operating method thereof, controller fo...
- Patent number 12,094,552
- Issue date Sep 17, 2024
- Samsung Electronics Co., Ltd.
- Sehwan Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Continuous memory programming operations
- Patent number 12,094,547
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for managing read operation of memory device wi...
- Patent number 12,087,387
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM FOR SHARING STATUS AMONG MULTIPLE DEVICES
- Publication number 20240420744
- Publication date Dec 19, 2024
- Macronix International Co., Ltd.
- Shuo-Nan HUNG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC
- Publication number 20240420757
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATURE
- Publication number 20240420741
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECEIVER, OPERATION METHOD THEREOF, AND MEMORY DEVICE
- Publication number 20240412764
- Publication date Dec 12, 2024
- Samsung Electronics Co., Ltd.
- Jueon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS
- Publication number 20240395297
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
PAGE BUFFER CIRCUIT AND READ OPERATION METHOD OF MEMORY
- Publication number 20240379177
- Publication date Nov 14, 2024
- SK HYNIX INC.
- Jae Woong KIM
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITS AND METHODS OF MITIGATING HOLD TIME FAILURE OF PIPELINE FO...
- Publication number 20240371418
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240371448
- Publication date Nov 7, 2024
- KIOXIA Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE BUFFER, SEMICONDUCTOR MEMORY HAVING THE SAME, AND OPERATING ME...
- Publication number 20240363180
- Publication date Oct 31, 2024
- SK HYNIX INC.
- Soo Yeol CHAI
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE BASED MULTI-LEVEL CELL PROGRAMMING
- Publication number 20240347081
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM
- Publication number 20240339136
- Publication date Oct 10, 2024
- Silicon Storage Technology, Inc.
- Kha Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY...
- Publication number 20240339137
- Publication date Oct 10, 2024
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORY
- Publication number 20240331741
- Publication date Oct 3, 2024
- SANDISK TECHNOLOGIES LLC
- Iris Lu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240321326
- Publication date Sep 26, 2024
- KIOXIA Corporation
- Koji TABATA
- G11 - INFORMATION STORAGE
Information Patent Application
PRE-DECODER CIRCUITRY
- Publication number 20240321327
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Byung S. Moon
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...
- Publication number 20240321328
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER
- Publication number 20240312498
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Mieko Kojima
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEM...
- Publication number 20240312502
- Publication date Sep 19, 2024
- SK HYNIX INC.
- Ji Hyo KANG
- G11 - INFORMATION STORAGE
Information Patent Application
ACTIVE CURRENT CONSUMPTION SAVE MODE FOR NON-VOLATILE MEMORY USING...
- Publication number 20240296877
- Publication date Sep 5, 2024
- Western Digital Technologies, Inc.
- Ke Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED OPERATIONS OF NON-VOLATILE MEMORY WITH SHARED DATA TRANSFE...
- Publication number 20240282392
- Publication date Aug 22, 2024
- SANDISK TECHNOLOGIES LLC
- Hua-Ling Cynthia Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD FOR TARGET REFRESH OPERATION BAS...
- Publication number 20240274182
- Publication date Aug 15, 2024
- SK HYNIX INC.
- Woongrae Kim
- G11 - INFORMATION STORAGE
Information Patent Application
DOMAIN SPECIFIC MEMORY MANAGEMENT
- Publication number 20240274162
- Publication date Aug 15, 2024
- Xilinx, Inc.
- Jaideep DASTIDAR
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING A FILTERING CIRCUIT AND MEMORY SYSTEM INCLU...
- Publication number 20240257844
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Jong Soon WON
- G11 - INFORMATION STORAGE
Information Patent Application
SAMPLE AND HOLD CIRCUIT AND METHOD FOR ANALOG-TO-DIGITAL CONVERSION
- Publication number 20240257847
- Publication date Aug 1, 2024
- Avago Technologies International Sales Pte. Limited
- Vadim Milirud
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE "A" LATCH WITH AN ARRAY OF "B" LATCHES
- Publication number 20240249791
- Publication date Jul 25, 2024
- SambaNova Systems, Inc.
- Thomas ZIAJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING THE BUFFER CHIP AN...
- Publication number 20240249753
- Publication date Jul 25, 2024
- SK HYNIX INC.
- Choung Ki SONG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING PAGE BUFFER, MEMORY SYSTEM INCLUDING PAGE B...
- Publication number 20240242745
- Publication date Jul 18, 2024
- Yangtze Memory Technologies Co., Ltd.
- Yan WANG
- G11 - INFORMATION STORAGE
Information Patent Application
READ OPERATIONS FOR A MEMORY ARRAY AND REGISTER
- Publication number 20240242746
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Vijayakrishna J. Vankayala
- G11 - INFORMATION STORAGE
Information Patent Application
Communication System With Mixed Threshold Voltage Transistors
- Publication number 20240233787
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Veeramanikandan RAJU
- G11 - INFORMATION STORAGE
Information Patent Application
DIVIDED QUAD CLOCK-BASED INTER-DIE CLOCKING IN A THREE-DIMENSIONAL...
- Publication number 20240223196
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Vijayakrishna J. Vankayala
- G11 - INFORMATION STORAGE

using pipelining techniques, i.e. using latches between functional memory parts

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Signal routing between memory die and logic die

Nonvolatile memory device and storage device

Memory device with memory pillar inside conductor

Partitioned memory architecture and method for repeatedly using the...

Memory device, method of operating the memory device, memory module...

Memory device, memory system, and method of operating the same

Redundancy and majority voting in a key-value data storage system u...

Soft decoding correctable page assisted reference voltage tracking

Calibration methods and structures for partitioned memory architect...

Integrated resistor network and method for fabricating the same

Area-efficient scalable memory read-data multiplexing and latching

Memory module with reduced read/write turnaround overhead

System on chip (SOC) with processor and integrated ferroelectric me...

Systems and methods for resolving data (DQ) line swapping configura...

Integrated circuit and operation method and inspection method thereof

Data processing circuit and semiconductor memory divided into segments

Data correction of redundant data storage

Circuits and methods of mitigating hold time failure of pipeline fo...

Memory device for wafer-on-wafer formed memory and logic

Apparatus and method for reading data based on a program status of...

Signal routing between memory die and logic die for mode based oper...

Processing-in-memory (PIM) device

Memory device including error correction device

Test mode security circuit

Semiconductor device

Error correction circuit using multi-clock and semiconductor device...

Stream oriented writing for improving sequential write and read per...

Non-volatile memory device, operating method thereof, controller fo...

Continuous memory programming operations

Methods and systems for managing read operation of memory device wi...

Patents Applicationslast 30 patents

SYSTEM FOR SHARING STATUS AMONG MULTIPLE DEVICES

MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC

VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATURE

RECEIVER, OPERATION METHOD THEREOF, AND MEMORY DEVICE

METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS

PAGE BUFFER CIRCUIT AND READ OPERATION METHOD OF MEMORY

CIRCUITS AND METHODS OF MITIGATING HOLD TIME FAILURE OF PIPELINE FO...

SEMICONDUCTOR DEVICE

PAGE BUFFER, SEMICONDUCTOR MEMORY HAVING THE SAME, AND OPERATING ME...

PULSE BASED MULTI-LEVEL CELL PROGRAMMING

ROW DECODER AND ROW ADDRESS SCHEME IN A MEMORY SYSTEM

DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY...

NOISE REDUCTION IN SENSE AMPLIFIERS FOR NON-VOLATILE MEMORY

SEMICONDUCTOR MEMORY DEVICE

PRE-DECODER CIRCUITRY

APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...

SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER

CLOCK DISTRIBUTION NETWORK, AND A SEMICONDUCTOR APPARATUS AND A SEM...

ACTIVE CURRENT CONSUMPTION SAVE MODE FOR NON-VOLATILE MEMORY USING...

ENHANCED OPERATIONS OF NON-VOLATILE MEMORY WITH SHARED DATA TRANSFE...

MEMORY DEVICE AND OPERATING METHOD FOR TARGET REFRESH OPERATION BAS...

DOMAIN SPECIFIC MEMORY MANAGEMENT

MEMORY DEVICE INCLUDING A FILTERING CIRCUIT AND MEMORY SYSTEM INCLU...

SAMPLE AND HOLD CIRCUIT AND METHOD FOR ANALOG-TO-DIGITAL CONVERSION

SINGLE "A" LATCH WITH AN ARRAY OF "B" LATCHES

BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING THE BUFFER CHIP AN...

MEMORY DEVICE INCLUDING PAGE BUFFER, MEMORY SYSTEM INCLUDING PAGE B...

READ OPERATIONS FOR A MEMORY ARRAY AND REGISTER

Communication System With Mixed Threshold Voltage Transistors

DIVIDED QUAD CLOCK-BASED INTER-DIE CLOCKING IN A THREE-DIMENSIONAL...