using pseudo-errors

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H04L1/241

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Parent Industries

HELECTRICITY H04Electric communication H04LTRANSMISSION OF DIGITAL INFORMATION H04L1/00Arrangements for detecting or preventing errors in the information received

Current Industry

H04L1/241using pseudo-errors

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Testing networked system using abnormal node failure
- Patent number 11,711,179
- Issue date Jul 25, 2023
- SAP SE
- Subhodeep Ganguly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 11,233,589
- Issue date Jan 25, 2022
- RAMBUS INC.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Margin test methods and circuits
- Patent number 10,880,022
- Issue date Dec 29, 2020
- RAMBUS INC.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DFE margin test methods and circuits that decouple sample feedback...
- Patent number 10,764,093
- Issue date Sep 1, 2020
- RAMBUS INC.
- Brian S. Leibowitz
- G01 - MEASURING TESTING
Information Patent Grant
Margin test methods and circuits
- Patent number 10,735,116
- Issue date Aug 4, 2020
- RAMBUS INC.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vehicle communication module and diagnostic device and method for t...
- Patent number 10,595,220
- Issue date Mar 17, 2020
- Continental Automotive GmbH
- Christian Morhart
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver clock test circuitry and related methods and apparatuses
- Patent number 10,320,534
- Issue date Jun 11, 2019
- Rambus Inc.
- Srinivasaraman Chandrasekaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 10,193,642
- Issue date Jan 29, 2019
- Rambus Inc.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameter adjustment method and apparatus
- Patent number 10,075,336
- Issue date Sep 11, 2018
- Huawei Technologies Co., Ltd.
- Shuicai Rao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Self-error injection technique for point-to-point interconnect to i...
- Patent number 9,996,439
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Scott Wang-Yip Cheng
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Redriver link testing
- Patent number 9,692,589
- Issue date Jun 27, 2017
- Intel Corporation
- Venkatraman Iyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for introducing signal jitter
- Patent number 9,590,774
- Issue date Mar 7, 2017
- Microsoft Technology Licensing, LLC
- Darryl Robert Liang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 9,544,071
- Issue date Jan 10, 2017
- Rambus Inc.
- Andrew Ho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver clock test circuitry and related methods and apparatuses
- Patent number 9,537,617
- Issue date Jan 3, 2017
- Rambus Inc.
- Srinivasaraman Chandrasekaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bit error pattern analyzer and method
- Patent number 9,413,497
- Issue date Aug 9, 2016
- VIAVI SOLUTIONS DEUTSCHLAND GMBH
- Reiner Schnizler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 9,116,810
- Issue date Aug 25, 2015
- Rambus Inc.
- Andrew Ho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver clock test circuitry and related methods and apparatuses
- Patent number 9,071,407
- Issue date Jun 30, 2015
- Ramnus Inc.
- Srinivasaraman Chandrasekaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Universal test system for testing electrical and optical hosts
- Patent number 8,963,573
- Issue date Feb 24, 2015
- Cisco Technology, Inc.
- D. Brice Achkir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 8,817,932
- Issue date Aug 26, 2014
- Rambus Inc.
- Andrew Ho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 8,559,493
- Issue date Oct 15, 2013
- Rambus Inc.
- Andrew Ho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bit error rate prediction
- Patent number 8,509,295
- Issue date Aug 13, 2013
- Marvell Israel (M.I.S.L) Ltd.
- Iddo Diukman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error controlling system, processor and error injection method
- Patent number 8,468,397
- Issue date Jun 18, 2013
- Fujitsu Limited
- Iwao Yamazaki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver circuit architectures
- Patent number 8,385,492
- Issue date Feb 26, 2013
- Rambus Inc.
- Andrew Ho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Duty cycle distortion (DCD) jitter modeling, calibration and genera...
- Patent number 8,125,259
- Issue date Feb 28, 2012
- Agere Systems Inc.
- Xingdong Dai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for using dual bit decisions to measure bit er...
- Patent number 7,788,571
- Issue date Aug 31, 2010
- SyntheSys Research, Inc.
- Thomas E. Waschura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Margin test methods and circuits
- Patent number 7,627,029
- Issue date Dec 1, 2009
- Rambus Inc.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuits for performing margining tests in the presence...
- Patent number 7,596,175
- Issue date Sep 29, 2009
- Rambus Inc.
- Fred F. Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
DFE margin test methods and circuits that decouple sample and feedb...
- Patent number 7,590,175
- Issue date Sep 15, 2009
- Rambus Inc.
- Brian S. Leibowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for determining on-chip bit error rate (BER) in a...
- Patent number 7,472,318
- Issue date Dec 30, 2008
- Broadcom Corporation
- Nong Fan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Noisy channel emulator for high speed data
- Patent number 7,426,666
- Issue date Sep 16, 2008
- Lucent Technologies Inc.
- Raul Benet Ballester
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
ERROR RATE MEASUREMENT APPARATUS AND ERROR RATE MEASUREMENT METHOD
- Publication number 20240322953
- Publication date Sep 26, 2024
- Anritsu Corporation
- Hisao KIDOKORO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TESTING NETWORKED SYSTEM USING ABNORMAL NODE FAILURE
- Publication number 20220416960
- Publication date Dec 29, 2022
- SAP SE
- Subhodeep Ganguly
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20220182158
- Publication date Jun 9, 2022
- Rambus Inc.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20210126722
- Publication date Apr 29, 2021
- Rambus Inc.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR TRIGGERING OSCILLOSCOPES AND OSCILLOSCOPES EMPLOYING TH...
- Publication number 20210072287
- Publication date Mar 11, 2021
- Micron Technology, Inc.
- Daniel B. Stewart
- G01 - MEASURING TESTING
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20210006341
- Publication date Jan 7, 2021
- Rambus Inc.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20190190627
- Publication date Jun 20, 2019
- RAMBUS INC.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VEHICLE COMMUNICATION MODULE AND DIAGNOSTIC DEVICE AND METHOD FOR T...
- Publication number 20180279141
- Publication date Sep 27, 2018
- CONTINENTAL AUTOMOTIVE GMBH
- Christian Morhart
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT FOR INTRODUCING SIGNAL JITTER
- Publication number 20170093534
- Publication date Mar 30, 2017
- Microsoft Technology Licensing, LLC
- Darryl Robert Liang
- G01 - MEASURING TESTING
Information Patent Application
REDRIVER LINK TESTING
- Publication number 20170019247
- Publication date Jan 19, 2017
- Intel Corporation
- Venkatraman Iyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20140331112
- Publication date Nov 6, 2014
- Andrew Ho
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING A RADIO FREQUENCY MULTIPLE-INPUT MULT...
- Publication number 20140269870
- Publication date Sep 18, 2014
- CHRISTIAN VOLF OLGAARD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BIT ERROR PATTERN ANALYZER AND METHOD
- Publication number 20140258795
- Publication date Sep 11, 2014
- Reiner Schnizler
- G01 - MEASURING TESTING
Information Patent Application
CLASSIFYING BIT ERRORS IN TRANSMITTED RUN LENGTH LIMITED DATA
- Publication number 20140223270
- Publication date Aug 7, 2014
- LSI Corporation
- Coralyn S. Gauvin
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR PARALLEL TESTING OF MULTIPLE DATA PACKET SIGN...
- Publication number 20140169182
- Publication date Jun 19, 2014
- LITEPOINT CORPORATION
- Christian Volf OLGAARD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Margin Test Methods and Circuits
- Publication number 20140161166
- Publication date Jun 12, 2014
- RAMBUS INC.
- Andrew Ho
- G01 - MEASURING TESTING
Information Patent Application
RECEIVER CLOCK TEST CIRCUITRY AND RELATED METHODS AND APPARATUSES
- Publication number 20130294490
- Publication date Nov 7, 2013
- RAMBUS INC.
- Srinivasaraman Chandrasekaran
- G01 - MEASURING TESTING
Information Patent Application
UNIVERSAL TEST SYSTEM FOR TESTING ELECTRICAL AND OPTICAL HOSTS
- Publication number 20130162279
- Publication date Jun 27, 2013
- Cisco Technology, Inc.
- D. Brice Achkir
- G01 - MEASURING TESTING
Information Patent Application
SIGNAL TRANSMISSION SYSTEM, SIGNAL TRANSMISSION METHOD AND COMMUNIC...
- Publication number 20130142226
- Publication date Jun 6, 2013
- ALAXALA NETWORKS CORPORATION
- Toru Sasaki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Receiver Circuit Architectures
- Publication number 20120140812
- Publication date Jun 7, 2012
- RAMBUS INC.
- Andrew Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CONTROLLING SYSTEM, PROCESSOR AND ERROR INJECTION METHOD
- Publication number 20110161747
- Publication date Jun 30, 2011
- FUJITSU LIMITED
- Iwao YAMAZAKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Margin Test Methods And Circuits
- Publication number 20100074314
- Publication date Mar 25, 2010
- RAMBUS INC.
- Vladimir Stojanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DFE Margin Test Methods and Circuits that Decouple Sample and Feedb...
- Publication number 20100020861
- Publication date Jan 28, 2010
- RAMBUS INC.
- Brian S. Leibowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DUTY CYCLE DISTORTION (DCD) JITTER MODELING, CALIBRATION AND GENERA...
- Publication number 20090177457
- Publication date Jul 9, 2009
- Agere Systems Inc.
- Xingdong Dai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods And Circuits For Performing Margining Tests In The Presence...
- Publication number 20080240219
- Publication date Oct 2, 2008
- Fred F. Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Loopback Circuit
- Publication number 20080192640
- Publication date Aug 14, 2008
- Richard D. Simpson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for determining on-chip bit error rate (BER) in a...
- Publication number 20070168770
- Publication date Jul 19, 2007
- Nong Fan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for using dual bit decisions to measure bit er...
- Publication number 20070033448
- Publication date Feb 8, 2007
- Thomas E. Waschura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DFE margin test methods and circuits that decouple sample and feedb...
- Publication number 20060227912
- Publication date Oct 12, 2006
- Brian S. Leibowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Error injection
- Publication number 20060184707
- Publication date Aug 17, 2006
- Gregg Bernard Lesartre
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

using pseudo-errors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Testing networked system using abnormal node failure

Margin test methods and circuits

Margin test methods and circuits

DFE margin test methods and circuits that decouple sample feedback...

Margin test methods and circuits

Vehicle communication module and diagnostic device and method for t...

Receiver clock test circuitry and related methods and apparatuses

Margin test methods and circuits

Parameter adjustment method and apparatus

Self-error injection technique for point-to-point interconnect to i...

Redriver link testing

Circuit for introducing signal jitter

Margin test methods and circuits

Receiver clock test circuitry and related methods and apparatuses

Bit error pattern analyzer and method

Margin test methods and circuits

Receiver clock test circuitry and related methods and apparatuses

Universal test system for testing electrical and optical hosts

Margin test methods and circuits

Margin test methods and circuits

Bit error rate prediction

Error controlling system, processor and error injection method

Receiver circuit architectures

Duty cycle distortion (DCD) jitter modeling, calibration and genera...

Method and apparatus for using dual bit decisions to measure bit er...

Margin test methods and circuits

Methods and circuits for performing margining tests in the presence...

DFE margin test methods and circuits that decouple sample and feedb...

System and method for determining on-chip bit error rate (BER) in a...

Noisy channel emulator for high speed data

Patents Applicationslast 30 patents

ERROR RATE MEASUREMENT APPARATUS AND ERROR RATE MEASUREMENT METHOD

TESTING NETWORKED SYSTEM USING ABNORMAL NODE FAILURE

Margin Test Methods and Circuits

Margin Test Methods and Circuits

METHODS FOR TRIGGERING OSCILLOSCOPES AND OSCILLOSCOPES EMPLOYING TH...

Margin Test Methods and Circuits

Margin Test Methods and Circuits

VEHICLE COMMUNICATION MODULE AND DIAGNOSTIC DEVICE AND METHOD FOR T...

CIRCUIT FOR INTRODUCING SIGNAL JITTER

REDRIVER LINK TESTING

Margin Test Methods and Circuits

SYSTEM AND METHOD FOR TESTING A RADIO FREQUENCY MULTIPLE-INPUT MULT...

BIT ERROR PATTERN ANALYZER AND METHOD

CLASSIFYING BIT ERRORS IN TRANSMITTED RUN LENGTH LIMITED DATA

SYSTEM AND METHOD FOR PARALLEL TESTING OF MULTIPLE DATA PACKET SIGN...

Margin Test Methods and Circuits

RECEIVER CLOCK TEST CIRCUITRY AND RELATED METHODS AND APPARATUSES

UNIVERSAL TEST SYSTEM FOR TESTING ELECTRICAL AND OPTICAL HOSTS

SIGNAL TRANSMISSION SYSTEM, SIGNAL TRANSMISSION METHOD AND COMMUNIC...

Receiver Circuit Architectures

ERROR CONTROLLING SYSTEM, PROCESSOR AND ERROR INJECTION METHOD

Margin Test Methods And Circuits

DFE Margin Test Methods and Circuits that Decouple Sample and Feedb...

DUTY CYCLE DISTORTION (DCD) JITTER MODELING, CALIBRATION AND GENERA...

Methods And Circuits For Performing Margining Tests In The Presence...

Loopback Circuit

System and method for determining on-chip bit error rate (BER) in a...

Method and apparatus for using dual bit decisions to measure bit er...

DFE margin test methods and circuits that decouple sample and feedb...

Error injection