using selective caching

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CPC
G06F12/0888

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/0888using selective caching

Industries

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallelized scrubbing transactions
- Patent number 12,147,301
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global coherence operations
- Patent number 12,141,601
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning sparse computation mechanism
- Patent number 12,141,891
- Issue date Nov 12, 2024
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices and systems including static and dynamic caches, and...
- Patent number 12,131,020
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching techniques using a data deduplication cache and a data cache
- Patent number 12,105,636
- Issue date Oct 1, 2024
- Dell Products L.P.
- Ashok Tamilarasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory normalization of cached objects to reduce cache memory fo...
- Patent number 12,093,178
- Issue date Sep 17, 2024
- Microsoft Technology Licensing, LLC
- Subrata Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient chip-to-chip data transfer
- Patent number 12,079,132
- Issue date Sep 3, 2024
- ARM Limited
- Jamshed Jalal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero value memory compression
- Patent number 12,066,944
- Issue date Aug 20, 2024
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-cacheable access handling in processor with virtually-tagged vi...
- Patent number 12,061,555
- Issue date Aug 13, 2024
- Ventana Micro Systems Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Media content playback with state prediction and caching
- Patent number 12,056,081
- Issue date Aug 6, 2024
- Spotify AB
- Simon Hofverberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-random way selection
- Patent number 12,045,644
- Issue date Jul 23, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect architecture for three-dimensional processing systems
- Patent number 12,033,714
- Issue date Jul 9, 2024
- Advanced Micro Devices, Inc.
- Nuwan S. Jayasena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling non-correctable errors
- Patent number 12,019,514
- Issue date Jun 25, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline arbitration
- Patent number 12,014,206
- Issue date Jun 18, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,007,907
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 12,007,935
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory normalization of cached objects to reduce cache memory fo...
- Patent number 12,001,335
- Issue date Jun 4, 2024
- Microsoft Technology Licensing, LLC
- Subrata Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache that supports draining write-miss entries
- Patent number 12,001,345
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL ADDRESS BASED SET PARTITIONING
- Publication number 20240370376
- Publication date Nov 7, 2024
- QUALCOMM Incorporated
- Subbarao PALACHARLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-RANDOM WAY SELECTION
- Publication number 20240345868
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT GENERATION WITH IMPROVED INTERCONNECT
- Publication number 20240338329
- Publication date Oct 10, 2024
- SiFive, Inc.
- Robert P. Adler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING NON-CORRECTABLE ERRORS
- Publication number 20240311235
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- David Matthew THOMPSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SOLVING CACHE ADDRESS ALIAS
- Publication number 20240303202
- Publication date Sep 12, 2024
- BEIJING VCORE TECHNOLOGY CO.,LTD.
- Zusong LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE ARBITRATION
- Publication number 20240281278
- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CONTENT-AWARE CACHE REPLACEMENT AND INSERTION POLICIES IN...
- Publication number 20240264950
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- George Patsilaras
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Efficient Chip-To-Chip Data Transfer
- Publication number 20240256460
- Publication date Aug 1, 2024
- ARM Limited
- Jamshed Jalal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-AWARE PRE-FETCHING AND CACHE BYPASSING SYSTEMS AND METHODS
- Publication number 20240248849
- Publication date Jul 25, 2024
- Lodestar Licensing Group, LLC
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...
- Publication number 20240232100
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing a Cache Using Per Memory Region Reuse Distance Estimation
- Publication number 20240211407
- Publication date Jun 27, 2024
- ADVANCED MICRO DEVICES, INC.
- John Kalamatianos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SWTICHING CONTROLLER, STORAGE DEVICE AND COMPUTING SYSTEM FOR IMPRO...
- Publication number 20240202129
- Publication date Jun 20, 2024
- SK HYNIX INC.
- Min Ho HA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PIPELINE CONTROL IN A HIERARCHICAL MEMORY SYSTEM
- Publication number 20240193087
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE
- Publication number 20240193098
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSIN...
- Publication number 20240177264
- Publication date May 30, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE STREAMING WITH CACHE WRITE ACKNOWLEDGMENT IN A PROCESSOR
- Publication number 20240168883
- Publication date May 23, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH CACHED MEMORY MODULE OPERATIONS
- Publication number 20240160587
- Publication date May 16, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method to Provide Cache Move with Non-Volatile Mass M...
- Publication number 20240152274
- Publication date May 9, 2024
- Memory Technologies LLC
- Kimmo J. Mylly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER WITH CACHING AND NON-CACHING MODES
- Publication number 20240152385
- Publication date May 9, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERSISTENT STORAGE WITH DUAL INTERFACE
- Publication number 20240134796
- Publication date Apr 25, 2024
- Samsung Electronics Co., Ltd.
- Shuyi PEI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

using selective caching

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for read-modify-write support in multi-banked...

Parallelized scrubbing transactions

Global coherence operations

Victim cache with dynamic allocation of entries

Systolic disaggregation within a matrix accelerator architecture

Atomic operations and histogram operations in a cache pipeline

Machine learning sparse computation mechanism

Memory devices and systems including static and dynamic caches, and...

Methods and apparatus for eviction in dual datapath victim cache sy...

Caching techniques using a data deduplication cache and a data cache

Multi-tile memory management

Compression techniques

In-memory normalization of cached objects to reduce cache memory fo...

Method and apparatus for efficient chip-to-chip data transfer

Graphics processor operation scheduling for deterministic latency

Methods and apparatus to facilitate read-modify-write support in a...

Zero value memory compression

Cache structure and utilization

Non-cacheable access handling in processor with virtually-tagged vi...

Media content playback with state prediction and caching

Pseudo-random way selection

Interconnect architecture for three-dimensional processing systems

Handling non-correctable errors

Pipeline arbitration

Multi-tile architecture for graphics operations

Victim cache with write miss merging

Graphics processors and graphics processing units having dot produc...

In-memory normalization of cached objects to reduce cache memory fo...

Victim cache that supports draining write-miss entries

Multi-tile memory management for detecting cross tile access provid...

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

PHYSICAL ADDRESS BASED SET PARTITIONING

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

PSEUDO-RANDOM WAY SELECTION

INTEGRATED CIRCUIT GENERATION WITH IMPROVED INTERCONNECT

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

HANDLING NON-CORRECTABLE ERRORS

METHOD AND APPARATUS FOR SOLVING CACHE ADDRESS ALIAS

VICTIM CACHE WITH WRITE MISS MERGING

PIPELINE ARBITRATION

PROVIDING CONTENT-AWARE CACHE REPLACEMENT AND INSERTION POLICIES IN...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

Method and Apparatus for Efficient Chip-To-Chip Data Transfer

MEMORY-AWARE PRE-FETCHING AND CACHE BYPASSING SYSTEMS AND METHODS

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...

Managing a Cache Using Per Memory Region Reuse Distance Estimation

SWTICHING CONTROLLER, STORAGE DEVICE AND COMPUTING SYSTEM FOR IMPRO...

MEMORY PIPELINE CONTROL IN A HIERARCHICAL MEMORY SYSTEM

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

DYNAMIC MEMORY RECONFIGURATION

APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSIN...

WRITE STREAMING WITH CACHE WRITE ACKNOWLEDGMENT IN A PROCESSOR

MEMORY SYSTEM WITH CACHED MEMORY MODULE OPERATIONS

Apparatus and Method to Provide Cache Move with Non-Volatile Mass M...

CONTROLLER WITH CACHING AND NON-CACHING MODES

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

PERSISTENT STORAGE WITH DUAL INTERFACE

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION