using storage elements with more than two stable states represented by steps

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/56using storage elements with more than two stable states represented by steps

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Patents Grantslast 30 patents

Information Patent Grant
Lifetime mixed level non-volatile memory system
- Patent number 12,224,005
- Issue date Feb 11, 2025
- Vervain, LLC
- G. R. Mohan Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system, and method of operating the same
- Patent number 12,224,004
- Issue date Feb 11, 2025
- Yangtze Memory Technologies Co., Ltd.
- Weijun Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device
- Patent number 12,223,997
- Issue date Feb 11, 2025
- Kioxia Corporation
- Toshifumi Watanabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with dynamic cache management
- Patent number 12,216,573
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory device and programming method thereof
- Patent number 12,217,807
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Yonghyuk Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing the programming of an open translation unit
- Patent number 12,217,794
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Murong Lang
- G11 - INFORMATION STORAGE
Information Patent Grant
Determine optimized read voltage via identification of distribution...
- Patent number 12,217,803
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- AbdelHakim S. Alhussien
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase operation with electron injection for reduction of cell-to-ce...
- Patent number 12,211,548
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device with reference voltage circuit including...
- Patent number 12,205,633
- Issue date Jan 21, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent write to programmable resistance memory cells in cross-p...
- Patent number 12,205,638
- Issue date Jan 21, 2025
- SANDISK TECHNOLOGIES LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and programming method thereof
- Patent number 12,205,639
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jeremy Guy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for determining start point and end point...
- Patent number 12,205,656
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Dobin Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating a memory device by performing a program operati...
- Patent number 12,205,646
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Minseok Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques to reduce programming stress in a memory device
- Patent number 12,205,647
- Issue date Jan 21, 2025
- SanDisk Technologies LLC
- Xiaoyu Che
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device
- Patent number 12,200,940
- Issue date Jan 14, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Han-Jong Chia
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device that includes a plurality o...
- Patent number 12,198,755
- Issue date Jan 14, 2025
- Kioxia Corporation
- Masanobu Shirakawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive bitline voltage for memory operations
- Patent number 12,197,739
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory apparatus and storage management method for flash memory
- Patent number 12,197,285
- Issue date Jan 14, 2025
- Silicon Motion, Inc.
- Tsung-Chieh Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Imprint recovery for memory arrays
- Patent number 12,190,947
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Jonathan J. Strand
- G11 - INFORMATION STORAGE
Information Patent Grant
Coding to decrease error rate discrepancy between pages
- Patent number 12,190,965
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Curtis Egan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit, system and method for rapid retrieval of data sets
- Patent number 12,190,968
- Issue date Jan 7, 2025
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmission of data for a machine learning operation using differe...
- Patent number 12,189,505
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Poorna Kale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Best read reference voltage search of 3D NAND memory
- Patent number 12,189,951
- Issue date Jan 7, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yufei Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data writing and reading method and apparatus, and system
- Patent number 12,190,948
- Issue date Jan 7, 2025
- Huawei Technologies Co., Ltd.
- Chao Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and semiconductor memory device
- Patent number 12,190,960
- Issue date Jan 7, 2025
- Kioxia Corporation
- Kengo Kurose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of operating memory devices based on sub-block positions an...
- Patent number 12,190,963
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Se-Hwan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for dynamically managing resources in disaggregated ac...
- Patent number 12,191,987
- Issue date Jan 7, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock signal return scheme for data read in page buffer of memory d...
- Patent number 12,183,404
- Issue date Dec 31, 2024
- Yangtze Memory Technologies Co., Ltd.
- Shu Xie
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash programming and method of applying read pulse before end...
- Patent number 12,183,389
- Issue date Dec 31, 2024
- Kioxia Corporation
- Manabu Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-oxide-nitride-oxide-silicon based multi-level non-volatile...
- Patent number 12,183,395
- Issue date Dec 31, 2024
- Infineon Technologies LLC
- Venkatraman Prabhakar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF PROGRAMMING MEMORY DEVICE AND RELATED MEMORY DEVICE
- Publication number 20250054539
- Publication date Feb 13, 2025
- Yangtze Memory Technologies Co., Ltd.
- Ying Cui
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20250054553
- Publication date Feb 13, 2025
- KIOXIA Corporation
- Tsukasa TOKUTOMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIVE LEVEL CELL PROGRAM ALGORITHM WITH APPENDED BIT LEVEL ERASE FOR...
- Publication number 20250054555
- Publication date Feb 13, 2025
- Western Digital Technologies, Inc.
- Ming Wang
- G11 - INFORMATION STORAGE
Information Patent Application
LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM
- Publication number 20250054540
- Publication date Feb 13, 2025
- Vervain, LLC
- G. R. Mohan Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT COMPENSATION FOR CODEWORDS IN MEMORY
- Publication number 20250046369
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH FIRST AND SECOND SENSE AMPLIFIERS
- Publication number 20250046382
- Publication date Feb 6, 2025
- KIOXIA Corporation
- Kosuke YANAGIDAIRA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD
- Publication number 20250044990
- Publication date Feb 6, 2025
- KIOXIA Corporation
- Marie SIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORE...
- Publication number 20250045159
- Publication date Feb 6, 2025
- SILICON MOTION, INC.
- Tsung-Chieh YANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY
- Publication number 20250046368
- Publication date Feb 6, 2025
- KIOXIA Corporation
- Yasuhiko KUROSAWA
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC CIRCUIT
- Publication number 20250046365
- Publication date Feb 6, 2025
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
READ VOLTAGE OVERDRIVE IN READ RECOVERY
- Publication number 20250037773
- Publication date Jan 30, 2025
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory Having Both Volatile and Non-Volatile Function...
- Publication number 20250037766
- Publication date Jan 30, 2025
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICE THAT PERFORMS VERI...
- Publication number 20250037771
- Publication date Jan 30, 2025
- KIOXIA Corporation
- Masanobu SHIRAKAWA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCT...
- Publication number 20250037778
- Publication date Jan 30, 2025
- SK HYNIX INC.
- Hee Youl LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250024671
- Publication date Jan 16, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Hui Huang
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE
- Publication number 20250022518
- Publication date Jan 16, 2025
- KIOXIA Corporation
- Naoki MATSUNAGA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM
- Publication number 20250014639
- Publication date Jan 9, 2025
- Vervain, LLC
- G.R. Mohan Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD OF THE SAME
- Publication number 20250014646
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Won-bo SHIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
- Publication number 20250013579
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING TECHNIQUES THAT UTILIZE ANALOG BITSCAN IN A MEMORY DEVICE
- Publication number 20250006266
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Hua-Ling Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20250004880
- Publication date Jan 2, 2025
- KIOXIA Corporation
- Kengo KUROSE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER EFFICIENT MULTI-BIT STORAGE SYSTEM
- Publication number 20250004780
- Publication date Jan 2, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Kai-Chi HUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT COMPENSATION FOR CODEWORDS IN MEMORY
- Publication number 20240428833
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK-ON-BLOCK MEMORY ARRAY ARCHITECTURE USING BI-DIRECTIONAL STAIR...
- Publication number 20240431110
- Publication date Dec 26, 2024
- Lodestar Licensing Group LLC
- Aaron S. Yip
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY SYSTEM
- Publication number 20240420778
- Publication date Dec 19, 2024
- KIOXIA Corporation
- Tsukasa TOKUTOMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE
- Publication number 20240420765
- Publication date Dec 19, 2024
- KIOXIA Corporation
- Mai Shimizu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240412782
- Publication date Dec 12, 2024
- KIOXIA Corporation
- Noboru SHIBATA
- G11 - INFORMATION STORAGE
Information Patent Application
RADIATION HARDENED E-FUSE MACRO
- Publication number 20240404591
- Publication date Dec 5, 2024
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
- Jason F. Ross
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE AND METHOD OF OPERATING THE STORAGE DEVICE
- Publication number 20240404589
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Yong HAN
- G11 - INFORMATION STORAGE

using storage elements with more than two stable states represented by steps

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Lifetime mixed level non-volatile memory system

Memory device, memory system, and method of operating the same

Nonvolatile semiconductor memory device

Memory device with dynamic cache management

Non-volatile memory device and programming method thereof

Managing the programming of an open translation unit

Determine optimized read voltage via identification of distribution...

Erase operation with electron injection for reduction of cell-to-ce...

Non-volatile memory device with reference voltage circuit including...

Concurrent write to programmable resistance memory cells in cross-p...

Memory device and programming method thereof

Memory device and method for determining start point and end point...

Method of operating a memory device by performing a program operati...

Programming techniques to reduce programming stress in a memory device

Three-dimensional memory device

Nonvolatile semiconductor memory device that includes a plurality o...

Adaptive bitline voltage for memory operations

Flash memory apparatus and storage management method for flash memory

Imprint recovery for memory arrays

Coding to decrease error rate discrepancy between pages

Memory circuit, system and method for rapid retrieval of data sets

Transmission of data for a machine learning operation using differe...

Best read reference voltage search of 3D NAND memory

Data writing and reading method and apparatus, and system

Memory system and semiconductor memory device

Methods of operating memory devices based on sub-block positions an...

Technologies for dynamically managing resources in disaggregated ac...

Clock signal return scheme for data read in page buffer of memory d...

NAND flash programming and method of applying read pulse before end...

Silicon-oxide-nitride-oxide-silicon based multi-level non-volatile...

Patents Applicationslast 30 patents

METHOD OF PROGRAMMING MEMORY DEVICE AND RELATED MEMORY DEVICE

MEMORY SYSTEM

FIVE LEVEL CELL PROGRAM ALGORITHM WITH APPENDED BIT LEVEL ERASE FOR...

LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM

DRIFT COMPENSATION FOR CODEWORDS IN MEMORY

SEMICONDUCTOR MEMORY DEVICE WITH FIRST AND SECOND SENSE AMPLIFIERS

MEMORY DEVICE AND METHOD

METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORE...

NONVOLATILE MEMORY

ELECTRONIC CIRCUIT

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

READ VOLTAGE OVERDRIVE IN READ RECOVERY

Semiconductor Memory Having Both Volatile and Non-Volatile Function...

MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICE THAT PERFORMS VERI...

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCT...

MEMORY DEVICE

NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE

LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM

NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD OF THE SAME

STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY

PROGRAMMING TECHNIQUES THAT UTILIZE ANALOG BITSCAN IN A MEMORY DEVICE

MEMORY SYSTEM

POWER EFFICIENT MULTI-BIT STORAGE SYSTEM

DRIFT COMPENSATION FOR CODEWORDS IN MEMORY

BLOCK-ON-BLOCK MEMORY ARRAY ARCHITECTURE USING BI-DIRECTIONAL STAIR...

MEMORY SYSTEM

SEMICONDUCTOR STORAGE DEVICE

SEMICONDUCTOR MEMORY DEVICE

RADIATION HARDENED E-FUSE MACRO

STORAGE DEVICE AND METHOD OF OPERATING THE STORAGE DEVICE