using the Berlekamp-Massey algorithm

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CPC
H03M13/153

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HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

Current Industry

H03M13/153using the Berlekamp-Massey algorithm

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Patents Grantslast 30 patents

Information Patent Grant
Iterative decoder for correcting dram device failures
- Patent number 12,170,531
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable FEC
- Patent number 11,973,517
- Issue date Apr 30, 2024
- MARVELL ASIA PTE. LTD.
- Volodymyr Shvydun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Iterative decoding technique for correcting DRAM device failures
- Patent number 11,962,327
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable FEC
- Patent number 11,265,025
- Issue date Mar 1, 2022
- MARVELL ASIA PTE. LTD.
- Volodymyr Shvydun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Operating method of memory controller, storage device and the opera...
- Patent number 11,206,046
- Issue date Dec 21, 2021
- Samsung Electronics Co., Ltd.
- Dong-Min Shin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for reducing latency in the detection of uncorrectable c...
- Patent number 10,804,935
- Issue date Oct 13, 2020
- Intel Corporation
- Zion S. Kwok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry and method for dual mode reed-solomon-forward error corre...
- Patent number 10,763,895
- Issue date Sep 1, 2020
- Synopsys, Inc.
- Venugopal Santhanam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable FEC
- Patent number 10,651,874
- Issue date May 12, 2020
- Inphi Corporation
- Volodymyr Shvydun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and decoder to adjust an error locator polynomial based on a...
- Patent number 10,572,189
- Issue date Feb 25, 2020
- SanDisk Technologies LLC
- Ishai Ilani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
List decode circuits
- Patent number 10,567,003
- Issue date Feb 18, 2020
- Hewlett Packard Enterprise Development LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction circuits and memory controllers including the same
- Patent number 10,498,364
- Issue date Dec 3, 2019
- SK Hynix Inc.
- Soo Jin Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Error locator polynomial decoder and method
- Patent number 10,461,777
- Issue date Oct 29, 2019
- Western Digital Technologies, Inc.
- Ishai Ilani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error locator polynomial decoder and method
- Patent number 10,439,644
- Issue date Oct 8, 2019
- Western Digital Technologies, Inc.
- Ishai Ilani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Groebner-bases approach to fast chase decoding of generalized Reed-...
- Patent number 10,404,407
- Issue date Sep 3, 2019
- Samsung Electronics Co., Ltd.
- Yaron Shany
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BM-based fast chase decoding of binary BCH codes through degenerate...
- Patent number 10,389,385
- Issue date Aug 20, 2019
- Samsung Electronics Co., Ltd.
- Yaron Shany
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
List decode circuits
- Patent number 10,367,529
- Issue date Jul 30, 2019
- Hewlett Packard Enterprise Development LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable FEC
- Patent number 10,158,379
- Issue date Dec 18, 2018
- Inphi Corporation
- Volodymyr Shvydun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error locator polynomial decoder method
- Patent number 10,097,208
- Issue date Oct 9, 2018
- Western Digital Technologies, Inc.
- Ishai Ilani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for soft-decision decoding
- Patent number 9,985,653
- Issue date May 29, 2018
- Samsung Electronics Co., Ltd.
- Yaron Shany
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correcting apparatus, error correcting method, and program
- Patent number 9,608,668
- Issue date Mar 28, 2017
- Sony Corporation
- Ryoji Ikegaya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data error correction from cached error correction information
- Patent number 9,594,629
- Issue date Mar 14, 2017
- King Abdulaziz City for Science and Technology
- Abdullah Alawi AlJuffri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lee metric error correcting code
- Patent number 9,524,207
- Issue date Dec 20, 2016
- Micron Technology, Inc.
- Chandra C. Varanasi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Simplified inversionless berlekamp-massey algorithm for binary BCH...
- Patent number 9,459,836
- Issue date Oct 4, 2016
- Storart Technology Co., Ltd.
- Jui Hui Hung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BCH decoding method and decoder thereof
- Patent number 9,419,652
- Issue date Aug 16, 2016
- Storart Technology Co., Ltd.
- Jui-Hui Hung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Syndrome tables for decoding turbo-product codes
- Patent number 9,391,641
- Issue date Jul 12, 2016
- SK Hynix Inc.
- Arunkumar Subramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and systems for error-correction decoding
- Patent number 9,344,117
- Issue date May 17, 2016
- Mellanox Technologies, Ltd.
- Liron Mula
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for error correction of encoded data
- Patent number 9,246,516
- Issue date Jan 26, 2016
- Intel Corporation
- Zion S. Kwok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction code circuit and memory device including the same
- Patent number 9,130,592
- Issue date Sep 8, 2015
- Samsung Electronics Co., Ltd.
- Daisuke Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Error and erasure decoding apparatus and method
- Patent number 9,054,742
- Issue date Jun 9, 2015
- Intel Corporation
- Zion S. Kwok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel low and asymmetric rate Reed Solomon coding
- Patent number 9,032,277
- Issue date May 12, 2015
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ITERATIVE DECODING TECHNIQUE FOR CORRECTING DRAM DEVICE FAILURES
- Publication number 20240413842
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DETERMINING BERLEKAMP DISCREPANCY VALUES
- Publication number 20240322843
- Publication date Sep 26, 2024
- MICROCHIP TECHNOLOGY INCORPORATED
- Diego Felipe Gomes Coelho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EARLY EXIT ERROR-LOCATOR POLYNOMIAL DETERMINATION
- Publication number 20240204802
- Publication date Jun 20, 2024
- MICROCHIP TECHNOLOGY INCORPORATED
- Peter Graumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ITERATIVE DECODER FOR CORRECTING DRAM DEVICE FAILURES
- Publication number 20230223961
- Publication date Jul 13, 2023
- Micron Technology, Inc.
- Joseph M. McCrate
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE FEC
- Publication number 20220182078
- Publication date Jun 9, 2022
- Marvell Asia Pte Ltd.
- Volodymyr SHVYDUN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OPERATING METHOD OF MEMORY CONTROLLER, STORAGE DEVICE AND THE OPERA...
- Publication number 20210050866
- Publication date Feb 18, 2021
- Samsung Electronics Co., Ltd.
- Dong-Min SHIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE FEC
- Publication number 20200228146
- Publication date Jul 16, 2020
- INPHI CORPORATION
- Volodymyr SHVYDUN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE FEC
- Publication number 20190089385
- Publication date Mar 21, 2019
- INPHI CORPORATION
- Volodymyr SHVYDUN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
GROEBNER-BASES APPROACH TO FAST CHASE DECODING OF GENERALIZED REED-...
- Publication number 20190068319
- Publication date Feb 28, 2019
- Samsung Electronics Co., Ltd.
- YARON SHANY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION CIRCUIT AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20190042360
- Publication date Feb 7, 2019
- SK HYNIX INC.
- Young-Ook SONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIST DECODE CIRCUITS
- Publication number 20180219560
- Publication date Aug 2, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LIST DECODE CIRCUITS
- Publication number 20180212625
- Publication date Jul 26, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR LOCATOR POLYNOMIAL DECODER AND METHOD
- Publication number 20180097528
- Publication date Apr 5, 2018
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Ishai Ilani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR LOCATOR POLYNOMIAL DECODER AND METHOD
- Publication number 20170187391
- Publication date Jun 29, 2017
- WESTERN DIGITAL TECHNOLOGIES, INC.
- ISHAI ILANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR LOCATOR POLYNOMIAL DECODER AND METHOD
- Publication number 20170093433
- Publication date Mar 30, 2017
- WESTERN DIGITAL TECHNOLOGIES, INC.
- ISHAI ILANI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR PROVIDING LOW LATENCY READ PATH FOR NON-VOL...
- Publication number 20170017544
- Publication date Jan 19, 2017
- HGST NETHERLANDS B.V.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA ERROR CORRECTION FROM CACHED ERROR CORRECTION INFORMATION
- Publication number 20160357627
- Publication date Dec 8, 2016
- KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
- Abdullah Alawi AlJuffri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BCH DECODING METHOD AND DECODER THEREOF
- Publication number 20160087650
- Publication date Mar 24, 2016
- STORART TECHNOLOGY CO. LTD.
- JUI-HUI HUNG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNDROME TABLES FOR DECODING TURBO-PRODUCT CODES
- Publication number 20140325320
- Publication date Oct 30, 2014
- Arunkumar Subramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR AND ERASURE DECODING APPARATUS AND METHOD
- Publication number 20140281839
- Publication date Sep 18, 2014
- Zion S. Kwok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND SYSTEMS FOR ERROR-CORRECTION DECODING
- Publication number 20140281840
- Publication date Sep 18, 2014
- MELLANOX TECHNOLOGIES LTD.
- Liron Mula
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARALLEL DECOMPOSITION OF REED SOLOMON UMBRELLA CODES
- Publication number 20140229791
- Publication date Aug 14, 2014
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques for Error Correction of Encoded Data
- Publication number 20140181614
- Publication date Jun 26, 2014
- ZION S. KWOK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR UMBRELLA CODING
- Publication number 20140122976
- Publication date May 1, 2014
- BROADCOM CORPORATION
- Zhongfeng Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION CODE CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20140108895
- Publication date Apr 17, 2014
- Samsung Electronics Co., Ltd.
- Daisuke FUJIWARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID DECODING OF BCH CODES FOR NONVOLATILE MEMORIES
- Publication number 20140068390
- Publication date Mar 6, 2014
- Hyperstone GmbH
- Franz Schmidberger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Error Correction Capability for BCH Codes
- Publication number 20130275839
- Publication date Oct 17, 2013
- Michael Pilsl
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING
- Publication number 20120284588
- Publication date Nov 8, 2012
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BCH DECODING WITH MULTIPLE SIGMA POLYNOMIAL CALCULATION ALGORITHMS
- Publication number 20120240013
- Publication date Sep 20, 2012
- Jennifer K. Wong
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS, SYSTEM, AND METHOD FOR DECODING LINEAR BLOCK CODES IN A...
- Publication number 20120233521
- Publication date Sep 13, 2012
- Zion S. Kwok
- G06 - COMPUTING CALCULATING COUNTING

using the Berlekamp-Massey algorithm

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Iterative decoder for correcting dram device failures

Reconfigurable FEC

Iterative decoding technique for correcting DRAM device failures

Reconfigurable FEC

Operating method of memory controller, storage device and the opera...

Techniques for reducing latency in the detection of uncorrectable c...

Circuitry and method for dual mode reed-solomon-forward error corre...

Reconfigurable FEC

Method and decoder to adjust an error locator polynomial based on a...

List decode circuits

Error correction circuits and memory controllers including the same

Error locator polynomial decoder and method

Error locator polynomial decoder and method

Groebner-bases approach to fast chase decoding of generalized Reed-...

BM-based fast chase decoding of binary BCH codes through degenerate...

List decode circuits

Reconfigurable FEC

Error locator polynomial decoder method

Methods and systems for soft-decision decoding

Error correcting apparatus, error correcting method, and program

Data error correction from cached error correction information

Lee metric error correcting code

Simplified inversionless berlekamp-massey algorithm for binary BCH...

BCH decoding method and decoder thereof

Syndrome tables for decoding turbo-product codes

Methods and systems for error-correction decoding

Techniques for error correction of encoded data

Error correction code circuit and memory device including the same

Error and erasure decoding apparatus and method

Parallel low and asymmetric rate Reed Solomon coding

Patents Applicationslast 30 patents

ITERATIVE DECODING TECHNIQUE FOR CORRECTING DRAM DEVICE FAILURES

DETERMINING BERLEKAMP DISCREPANCY VALUES

EARLY EXIT ERROR-LOCATOR POLYNOMIAL DETERMINATION

ITERATIVE DECODER FOR CORRECTING DRAM DEVICE FAILURES

RECONFIGURABLE FEC

OPERATING METHOD OF MEMORY CONTROLLER, STORAGE DEVICE AND THE OPERA...

RECONFIGURABLE FEC

RECONFIGURABLE FEC

GROEBNER-BASES APPROACH TO FAST CHASE DECODING OF GENERALIZED REED-...

ERROR CORRECTION CIRCUIT AND MEMORY SYSTEM INCLUDING THE SAME

LIST DECODE CIRCUITS

LIST DECODE CIRCUITS

ERROR LOCATOR POLYNOMIAL DECODER AND METHOD

ERROR LOCATOR POLYNOMIAL DECODER AND METHOD

ERROR LOCATOR POLYNOMIAL DECODER AND METHOD

SYSTEMS AND METHODS FOR PROVIDING LOW LATENCY READ PATH FOR NON-VOL...

DATA ERROR CORRECTION FROM CACHED ERROR CORRECTION INFORMATION

BCH DECODING METHOD AND DECODER THEREOF

SYNDROME TABLES FOR DECODING TURBO-PRODUCT CODES

ERROR AND ERASURE DECODING APPARATUS AND METHOD

METHODS AND SYSTEMS FOR ERROR-CORRECTION DECODING

PARALLEL DECOMPOSITION OF REED SOLOMON UMBRELLA CODES

Techniques for Error Correction of Encoded Data

METHOD AND APPARATUS FOR UMBRELLA CODING

ERROR CORRECTION CODE CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

HYBRID DECODING OF BCH CODES FOR NONVOLATILE MEMORIES

Programmable Error Correction Capability for BCH Codes

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING

BCH DECODING WITH MULTIPLE SIGMA POLYNOMIAL CALCULATION ALGORITHMS

APPARATUS, SYSTEM, AND METHOD FOR DECODING LINEAR BLOCK CODES IN A...