Variable-length word access

Industry

CPC
G06F12/0886

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/0886Variable-length word access

Industries

Patents Grantslast 30 patents

Information Patent Grant
Slot/sub-slot prefetch architecture for multiple memory requestors
- Patent number 11,789,872
- Issue date Oct 17, 2023
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disassociating memory units with a host system
- Patent number 11,741,008
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Dhawal Bavishi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heuristics for selecting subsegments for entry in and entry out ope...
- Patent number 11,580,014
- Issue date Feb 14, 2023
- Integrated Silicon Solution, (Cayman) Inc.
- Neal Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective PCIe utilization by PCIe TLP coalescing
- Patent number 11,537,524
- Issue date Dec 27, 2022
- Western Digital Technologies, Inc.
- Amir Segev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disassociating memory units with a host system
- Patent number 11,449,419
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Dhawal Bavishi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system memory management
- Patent number 11,196,565
- Issue date Dec 7, 2021
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level system memory with near memory capable of storing compr...
- Patent number 11,188,467
- Issue date Nov 30, 2021
- Intel Corporation
- Israel Diamand
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heuristics for selecting subsegments for entry in and entry out ope...
- Patent number 11,119,910
- Issue date Sep 14, 2021
- Spin Memory, Inc.
- Neal Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slot/sub-slot prefetch architecture for multiple memory requestors
- Patent number 11,074,190
- Issue date Jul 27, 2021
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors, methods, systems, and instructions to load multiple dat...
- Patent number 11,068,264
- Issue date Jul 20, 2021
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for selective enabling of locality-bas...
- Patent number 11,030,108
- Issue date Jun 8, 2021
- Intel Corporation
- Berkin Akin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for implementing a line speed interconnect structure
- Patent number 11,003,459
- Issue date May 11, 2021
- Intel Corporation
- Mohammad Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing apparatuses and methods of processing operations thereof
- Patent number 10,990,589
- Issue date Apr 27, 2021
- Samsung Electronics Co., Ltd.
- Junwhan Ahn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressed pages having data and compression metadata
- Patent number 10,963,377
- Issue date Mar 30, 2021
- Hewlett Packard Enterprise Development LP
- Shankar Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing system and method using bit counter
- Patent number 10,942,860
- Issue date Mar 9, 2021
- SK Hynix Inc.
- Seonwook Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing system and method using bit counter
- Patent number 10,942,859
- Issue date Mar 9, 2021
- SK Hynix Inc.
- Seonwook Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for multi-cacheline small object memor...
- Patent number 10,877,897
- Issue date Dec 29, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing system, and driving method and compiling method thereof
- Patent number 10,866,817
- Issue date Dec 15, 2020
- Samsung Electronics Co. Ltd.
- Seung-won Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing method and device, and method and device for...
- Patent number 10,789,171
- Issue date Sep 29, 2020
- Alibaba Group Holding Limited
- Qucheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing memory compression
- Patent number 10,769,065
- Issue date Sep 8, 2020
- Apple Inc.
- Ali Sazegari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for managing caches
- Patent number 10,747,675
- Issue date Aug 18, 2020
- EMC IP Holding Company LLC
- Lester Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for managing transactions routing between source equipment a...
- Patent number 10,740,141
- Issue date Aug 11, 2020
- STMicroelectronics (Rousset) SAS
- Yassine El Khourassani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system memory management
- Patent number 10,594,491
- Issue date Mar 17, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management method and apparatus
- Patent number 10,430,339
- Issue date Oct 1, 2019
- Samsung Electronics Co., Ltd.
- Ki-seok Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for selective enabling of locality-bas...
- Patent number 10,409,727
- Issue date Sep 10, 2019
- Intel Corporation
- Berkin Akin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slot/sub-slot prefetch architecture for multiple memory requestors
- Patent number 10,394,718
- Issue date Aug 27, 2019
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors, methods, systems, and instructions to load multiple dat...
- Patent number 10,379,855
- Issue date Aug 13, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resolving memory accesses crossing cache line boundaries
- Patent number 10,318,427
- Issue date Jun 11, 2019
- Intel Corporation
- Ramon Matas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for implementing a line speed interconnect structure
- Patent number 10,303,484
- Issue date May 28, 2019
- Intel Corporation
- Mohammad Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-bandwidth prefetcher for high-bandwidth memory
- Patent number 10,303,610
- Issue date May 28, 2019
- Cray, Inc.
- Sanyam Mehta
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MANAGING DATA USING PERSISTENT STORAGE
- Publication number 20240184706
- Publication date Jun 6, 2024
- Twilio Inc.
- Christopher O'Hara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS
- Publication number 20230418759
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISASSOCIATING MEMORY UNITS WITH A HOST SYSTEM
- Publication number 20220414006
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Dhawal Bavishi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Effective PCIe Utilization by PCIe TLP Coalescing
- Publication number 20220164291
- Publication date May 26, 2022
- Western Digital Technologies, Inc.
- Amir SEGEV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEURISTICS FOR SELECTING SUBSEGMENTS FOR ENTRY IN AND ENTRY OUT OPE...
- Publication number 20220107888
- Publication date Apr 7, 2022
- Integrated Silicon Solution, (Cayman) Inc.
- Neal BERGER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT
- Publication number 20220094553
- Publication date Mar 24, 2022
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISASSOCIATING MEMORY UNITS WITH A HOST SYSTEM
- Publication number 20220050775
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Dhawal Bavishi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS
- Publication number 20210349827
- Publication date Nov 11, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR IMPLEMENTING A LINE SPEED INTERCONNECT STRUCTURE
- Publication number 20210342159
- Publication date Nov 4, 2021
- Intel Corporation
- Mohammad ABDALLAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...
- Publication number 20210056030
- Publication date Feb 25, 2021
- Intel Corporation
- Israel DIAMAND
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM AND METHOD USING BIT COUNTER
- Publication number 20200293453
- Publication date Sep 17, 2020
- SK HYNIX INC.
- Seonwook KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT
- Publication number 20200177392
- Publication date Jun 4, 2020
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM AND METHOD USING BIT COUNTER
- Publication number 20200142836
- Publication date May 7, 2020
- SK HYNIX INC.
- Seonwook KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEURISTICS FOR SELECTING SUBSEGMENTS FOR ENTRY IN AND ENTRY OUT OPE...
- Publication number 20200117592
- Publication date Apr 16, 2020
- Spin Memory, Inc.
- Neal BERGER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA READING METHOD BASED ON VARIABLE CACHE LINE
- Publication number 20200057722
- Publication date Feb 20, 2020
- Nanjing Iluvatar CoreX Technology Co., Ltd. (DBA “Iluvatar CoreX Inc. Nanjing”)
- Yongliu Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...
- Publication number 20190384601
- Publication date Dec 19, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MANAGING TRANSACTIONS ROUTING BETWEEN SOURCE EQUIPMENT A...
- Publication number 20190317799
- Publication date Oct 17, 2019
- STMicroelectronics (Rousset) SAS
- Yassine El Khourassani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING MEMORY COMPRESSION
- Publication number 20190294541
- Publication date Sep 26, 2019
- Apple Inc.
- Ali Sazegari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR IMPLEMENTING A LINE SPEED INTERCONNECT STRUCTURE
- Publication number 20190235877
- Publication date Aug 1, 2019
- Intel Corporation
- Mohammad ABDALLAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFORMATION PROCESSING METHOD AND DEVICE, AND METHOD AND DEVICE FOR...
- Publication number 20190108129
- Publication date Apr 11, 2019
- ALIBABA GROUP HOLDING LIMITED
- Qucheng LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS
- Publication number 20180239710
- Publication date Aug 23, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING APPARATUSES AND METHODS OF PROCESSING OPERATIONS THEREOF
- Publication number 20180046666
- Publication date Feb 15, 2018
- Samsung Electronics Co., Ltd.
- Junwhan AHN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE-DRIVEN CACHE LINE MEMORY ACCESS
- Publication number 20170308468
- Publication date Oct 26, 2017
- International Business Machines Corporation
- Robert H. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY SYSTEM AND PROCESSOR SYSTEM
- Publication number 20160378671
- Publication date Dec 29, 2016
- Kabushiki Kaisha Toshiba
- Susumu TAKEDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT METHOD AND APPARATUS
- Publication number 20160335185
- Publication date Nov 17, 2016
- Samsung Electronics Co., Ltd.
- Ki-seok KWON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE AND SYSTEM SUPPORTING PARALLEL AND SERIAL ACCESS MODES
- Publication number 20150363107
- Publication date Dec 17, 2015
- RAMBUS INC.
- Scott C. Best
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ALLOCATION IN A SYSTEM USING MEMORY STRIPING
- Publication number 20140281362
- Publication date Sep 18, 2014
- COGNITIVE ELECTRONICS, INC.
- Andrew C. FELCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION IN A SYSTEM USING MEMORY STRIPING
- Publication number 20140281366
- Publication date Sep 18, 2014
- COGNITIVE ELECTRONICS, INC.
- Andrew C. FELCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BOUNDARY PREDICTION FOR VARIABLE LENGTH INSTRUCTION SET
- Publication number 20140281246
- Publication date Sep 18, 2014
- Mauricio Breternitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UPDATE MASK FOR HANDLING INTERACTION BETWEEN FILLS AND UPDATES
- Publication number 20140189251
- Publication date Jul 3, 2014
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING

Variable-length word access

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Slot/sub-slot prefetch architecture for multiple memory requestors

Disassociating memory units with a host system

Heuristics for selecting subsegments for entry in and entry out ope...

Effective PCIe utilization by PCIe TLP coalescing

Disassociating memory units with a host system

Cryptographic system memory management

Multi-level system memory with near memory capable of storing compr...

Heuristics for selecting subsegments for entry in and entry out ope...

Slot/sub-slot prefetch architecture for multiple memory requestors

Processors, methods, systems, and instructions to load multiple dat...

System, apparatus and method for selective enabling of locality-bas...

Method for implementing a line speed interconnect structure

Computing apparatuses and methods of processing operations thereof

Compressed pages having data and compression metadata

Computing system and method using bit counter

Computing system and method using bit counter

System, apparatus and method for multi-cacheline small object memor...

Computing system, and driving method and compiling method thereof

Information processing method and device, and method and device for...

Systems and methods for performing memory compression

Method and device for managing caches

Method for managing transactions routing between source equipment a...

Cryptographic system memory management

Memory management method and apparatus

System, apparatus and method for selective enabling of locality-bas...

Slot/sub-slot prefetch architecture for multiple memory requestors

Processors, methods, systems, and instructions to load multiple dat...

Resolving memory accesses crossing cache line boundaries

Method for implementing a line speed interconnect structure

High-bandwidth prefetcher for high-bandwidth memory

Patents Applicationslast 30 patents

MANAGING DATA USING PERSISTENT STORAGE

SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS

DISASSOCIATING MEMORY UNITS WITH A HOST SYSTEM

Effective PCIe Utilization by PCIe TLP Coalescing

HEURISTICS FOR SELECTING SUBSEGMENTS FOR ENTRY IN AND ENTRY OUT OPE...

CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT

DISASSOCIATING MEMORY UNITS WITH A HOST SYSTEM

SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS

METHOD FOR IMPLEMENTING A LINE SPEED INTERCONNECT STRUCTURE

MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...

COMPUTING SYSTEM AND METHOD USING BIT COUNTER

CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT

COMPUTING SYSTEM AND METHOD USING BIT COUNTER

HEURISTICS FOR SELECTING SUBSEGMENTS FOR ENTRY IN AND ENTRY OUT OPE...

DATA READING METHOD BASED ON VARIABLE CACHE LINE

PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...

METHOD FOR MANAGING TRANSACTIONS ROUTING BETWEEN SOURCE EQUIPMENT A...

SYSTEMS AND METHODS FOR PERFORMING MEMORY COMPRESSION

METHOD FOR IMPLEMENTING A LINE SPEED INTERCONNECT STRUCTURE

INFORMATION PROCESSING METHOD AND DEVICE, AND METHOD AND DEVICE FOR...

SLOT/SUB-SLOT PREFETCH ARCHITECTURE FOR MULTIPLE MEMORY REQUESTORS

COMPUTING APPARATUSES AND METHODS OF PROCESSING OPERATIONS THEREOF

PERFORMANCE-DRIVEN CACHE LINE MEMORY ACCESS

CACHE MEMORY SYSTEM AND PROCESSOR SYSTEM

MEMORY MANAGEMENT METHOD AND APPARATUS

MEMORY MODULE AND SYSTEM SUPPORTING PARALLEL AND SERIAL ACCESS MODES

MEMORY ALLOCATION IN A SYSTEM USING MEMORY STRIPING

ADDRESS TRANSLATION IN A SYSTEM USING MEMORY STRIPING

INSTRUCTION BOUNDARY PREDICTION FOR VARIABLE LENGTH INSTRUCTION SET

UPDATE MASK FOR HANDLING INTERACTION BETWEEN FILLS AND UPDATES