Virtual ground arrays

Industry

CPC
G11C17/126

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C17/00Read-only memories programmable only once Semi-permanent stores

Current Industry

G11C17/126Virtual ground arrays

Industries

Patents Grantslast 30 patents

Information Patent Grant
Low-leakage drain-programmed ROM
- Patent number 11,610,633
- Issue date Mar 21, 2023
- Qualcomm, Incorporated
- Xiao Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with reduced leakage current
- Patent number 11,600,318
- Issue date Mar 7, 2023
- Honeywell International Inc.
- Keith Golke
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for providing a read only memory cell array
- Patent number 11,114,175
- Issue date Sep 7, 2021
- QUALCOMM Incorporated
- Paramjeet Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory
- Patent number 10,580,499
- Issue date Mar 3, 2020
- United Microelectronics Corp.
- Hsin-Pang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-bit ROM cell with virtual ground line and programmable metal t...
- Patent number 10,236,071
- Issue date Mar 19, 2019
- NXP B.V.
- Rajat Kohli
- G11 - INFORMATION STORAGE
Information Patent Grant
Method to program bitcells of a ROM array
- Patent number 9,966,150
- Issue date May 8, 2018
- Synopsys, Inc.
- Anil Singh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
High density ROM cell with dual bit storage for high speed and low...
- Patent number 9,691,496
- Issue date Jun 27, 2017
- NXP B.V.
- Rajat Kohli
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory having multi-bit line bit cell
- Patent number 9,286,998
- Issue date Mar 15, 2016
- Freescale Semiconductor,INC
- Paramjeet Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-only memory
- Patent number 9,275,752
- Issue date Mar 1, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- Kuang Ting Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory bitline load-balancing
- Patent number 8,873,269
- Issue date Oct 28, 2014
- International Business Machines Corporation
- Rahul K. Nadkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
MOSFET fuse and array element
- Patent number 8,630,108
- Issue date Jan 14, 2014
- International Business Machines Corporation
- Yan-Zun Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating ROM bit cell arrays
- Patent number 8,422,262
- Issue date Apr 16, 2013
- ARM Limited
- Yannick Marc Nevers
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating ROM bit cell arrays
- Patent number 7,961,490
- Issue date Jun 14, 2011
- ARM Limited
- Yannick Marc Nevers
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading circuitry in memory
- Patent number 7,940,565
- Issue date May 10, 2011
- Macronix International Co., Ltd.
- Chung Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier
- Patent number 7,787,320
- Issue date Aug 31, 2010
- Kabushiki Kaisha Toshiba
- Yoshihiro Ueda
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading circuitry in memory
- Patent number 7,706,185
- Issue date Apr 27, 2010
- Macronix International Co., Ltd.
- Chung Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier
- Patent number 7,649,792
- Issue date Jan 19, 2010
- Kabushiki Kaisha Toshiba
- Yoshihiro Ueda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell structure of metal programmable read only memory having...
- Patent number 7,480,166
- Issue date Jan 20, 2009
- Samsung Electronics Co., Ltd.
- Seong-ho Jeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Flat cell read only memory using common contacts for bit lines and...
- Patent number 7,436,690
- Issue date Oct 14, 2008
- Elan Microelectronics Corporation
- Hsu-Shun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential memory and accessing method thereof
- Patent number 7,391,672
- Issue date Jun 24, 2008
- Macronix International Co., Ltd.
- Chang-Ting Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed programmable ROM, memory cell structure therefor, and me...
- Patent number 7,382,640
- Issue date Jun 3, 2008
- Samsung Electronics Co., Ltd.
- Joong-Eon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and driving method therefor
- Patent number 7,295,486
- Issue date Nov 13, 2007
- Macronix International Co., Ltd.
- Chung Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell structure of metal programmable read only memory having...
- Patent number 7,075,809
- Issue date Jul 11, 2006
- Samsung Electronics Co., Ltd.
- Seong-ho Jeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory devices with independently precharged virtual grou...
- Patent number 7,042,750
- Issue date May 9, 2006
- Samsung Electronics Co., Ltd.
- Yong-jae Choo
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory device
- Patent number 6,975,528
- Issue date Dec 13, 2005
- Samsung Electronics Co., Ltd.
- Young-Sook Do
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of manufacturing non-volatile read only memory
- Patent number 6,955,966
- Issue date Oct 18, 2005
- Oki Electric Industry Co., Ltd.
- Noboru Egawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 6,920,058
- Issue date Jul 19, 2005
- Sharp Kabushiki Kaisha
- Yoshinao Morikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed programmable read-only memory (PROM) devices
- Patent number 6,861,714
- Issue date Mar 1, 2005
- Samsung Electronics Co., Ltd.
- Joong-Eon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with inter-block bit wires and inter-block gro...
- Patent number 6,847,577
- Issue date Jan 25, 2005
- NEC Electronics Corporation
- Mitsuhiro Ishiguro
- G11 - INFORMATION STORAGE
Information Patent Grant
Highly-integrated flash memory and mask ROM array architecture
- Patent number 6,839,278
- Issue date Jan 4, 2005
- Aplus Flash Technology, Inc.
- Peter Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Masking Techniques for Memory Applications
- Publication number 20240304265
- Publication date Sep 12, 2024
- ARM Limited
- Ettore Amirante
- G11 - INFORMATION STORAGE
Information Patent Application
SMALL-AREA HIGH-EFFICIENCY READ-ONLY MEMORY (ROM) ARRAY AND METHOD...
- Publication number 20240260260
- Publication date Aug 1, 2024
- YIELD MICROELECTRONICS CORP.
- YU TING HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-LEAKAGE DRAIN-PROGRAMMED ROM
- Publication number 20230005546
- Publication date Jan 5, 2023
- QUALCOMM Incorporated
- Xiao CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH REDUCED LEAKAGE CURRENT
- Publication number 20220199147
- Publication date Jun 23, 2022
- Honeywell International Inc.
- Keith Golke
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-BIT ROM CELL WITH VIRTUAL GROUND LINE AND PROGRAMMABLE METAL T...
- Publication number 20190080777
- Publication date Mar 14, 2019
- NXP B.V.
- Rajat Kohli
- G11 - INFORMATION STORAGE
Information Patent Application
READ ONLY MEMORY
- Publication number 20190043587
- Publication date Feb 7, 2019
- UNITED MICROELECTRONICS CORP.
- Hsin-Pang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ ONLY MEMORY BITLINE LOAD-BALANCING
- Publication number 20140268985
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Rahul K. Nadkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MOSFET FUSE AND ARRAY ELEMENT
- Publication number 20120250389
- Publication date Oct 4, 2012
- International Business Machines Corporation
- YAN-ZUN LI
- G11 - INFORMATION STORAGE
Information Patent Application
Generating ROM bit cell arrays
- Publication number 20110249481
- Publication date Oct 13, 2011
- ARM Limited
- Yannick Marc Nevers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READING CIRCUITRY IN MEMORY
- Publication number 20100238746
- Publication date Sep 23, 2010
- Macronix International Co., Ltd.
- Chung-Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Generating ROM bit cell arrays
- Publication number 20100177544
- Publication date Jul 15, 2010
- ARM Limited
- Yannick Marc Nevers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SENSE AMPLIFIER
- Publication number 20100067283
- Publication date Mar 18, 2010
- Yoshihiro Ueda
- G11 - INFORMATION STORAGE
Information Patent Application
Reading circuitry in memory
- Publication number 20080247244
- Publication date Oct 9, 2008
- Macronix International Co., Ltd.
- Chung-Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SEQUENTIAL MEMORY AND ACCESSING METHOD THEREOF
- Publication number 20080159060
- Publication date Jul 3, 2008
- MACRONIX INTERNATIONAL CO., LTD
- Chang-Ting Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER
- Publication number 20070280021
- Publication date Dec 6, 2007
- Yoshihiro Ueda
- G11 - INFORMATION STORAGE
Information Patent Application
Memory and driving method therefor
- Publication number 20060280021
- Publication date Dec 14, 2006
- MACRONIX INTERNATIONAL CO., LTD
- Chung-Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Current sensing circuit and method of operation
- Publication number 20060227639
- Publication date Oct 12, 2006
- Rico Srowik
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell structure of metal programmable read only memory having...
- Publication number 20060215436
- Publication date Sep 28, 2006
- Seong-ho Jeung
- G11 - INFORMATION STORAGE
Information Patent Application
Flat cell read only memory using common contacts for bit lines and...
- Publication number 20060176754
- Publication date Aug 10, 2006
- Hsu-Shun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
High-speed programmable ROM, memory cell structure therefor, and me...
- Publication number 20050122760
- Publication date Jun 9, 2005
- Joong-Eon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Read only memory devices with independently precharged virtual grou...
- Publication number 20050057990
- Publication date Mar 17, 2005
- Yong-jae Choo
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell structure of metal programmable read only memory having...
- Publication number 20050018465
- Publication date Jan 27, 2005
- Seong-ho Jeung
- G11 - INFORMATION STORAGE
Information Patent Application
Method of manufacturing non-volatile read only memory
- Publication number 20040259301
- Publication date Dec 23, 2004
- Noboru Egawa
- G11 - INFORMATION STORAGE
Information Patent Application
READ ONLY MEMORY (ROM) AND METHOD FOR FORMING THE SAME
- Publication number 20040213028
- Publication date Oct 28, 2004
- Ying-Tzuo Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device
- Publication number 20040184318
- Publication date Sep 23, 2004
- SHARP KABUSHIKI KAISHA
- Yoshinao Morikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory
- Publication number 20040159870
- Publication date Aug 19, 2004
- NEC ELECTRONICS CORPORATION
- Mitsuhiro Ishiguro
- G11 - INFORMATION STORAGE
Information Patent Application
Read only memory device
- Publication number 20040151015
- Publication date Aug 5, 2004
- Young-Sook Do
- G11 - INFORMATION STORAGE
Information Patent Application
Read-only memory with reduced loading value
- Publication number 20030214828
- Publication date Nov 20, 2003
- Shi-Xian Chen
- G11 - INFORMATION STORAGE
Information Patent Application
DOUBLE ACCESS PATH MASK ROM CELL STRUCTURE
- Publication number 20030189846
- Publication date Oct 9, 2003
- HOLTEK SEMICONDUCTOR INC.
- Jinn-Nan Kao
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and write/readout controlling method er...
- Publication number 20030117827
- Publication date Jun 26, 2003
- NEC Electronics Corporation
- Teiichiro Nishizaka
- G11 - INFORMATION STORAGE

Virtual ground arrays

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Low-leakage drain-programmed ROM

Memory array with reduced leakage current

Systems and methods for providing a read only memory cell array

Read only memory

Dual-bit ROM cell with virtual ground line and programmable metal t...

Method to program bitcells of a ROM array

High density ROM cell with dual bit storage for high speed and low...

Read only memory having multi-bit line bit cell

Read-only memory

Read only memory bitline load-balancing

MOSFET fuse and array element

Generating ROM bit cell arrays

Generating ROM bit cell arrays

Reading circuitry in memory

Sense amplifier

Reading circuitry in memory

Sense amplifier

Memory cell structure of metal programmable read only memory having...

Flat cell read only memory using common contacts for bit lines and...

Sequential memory and accessing method thereof

High-speed programmable ROM, memory cell structure therefor, and me...

Memory and driving method therefor

Memory cell structure of metal programmable read only memory having...

Read only memory devices with independently precharged virtual grou...

Read only memory device

Method of manufacturing non-volatile read only memory

Semiconductor memory device

High-speed programmable read-only memory (PROM) devices

Semiconductor memory with inter-block bit wires and inter-block gro...

Highly-integrated flash memory and mask ROM array architecture

Patents Applicationslast 30 patents

Masking Techniques for Memory Applications

SMALL-AREA HIGH-EFFICIENCY READ-ONLY MEMORY (ROM) ARRAY AND METHOD...

LOW-LEAKAGE DRAIN-PROGRAMMED ROM

MEMORY ARRAY WITH REDUCED LEAKAGE CURRENT

DUAL-BIT ROM CELL WITH VIRTUAL GROUND LINE AND PROGRAMMABLE METAL T...

READ ONLY MEMORY

READ ONLY MEMORY BITLINE LOAD-BALANCING

MOSFET FUSE AND ARRAY ELEMENT

Generating ROM bit cell arrays

READING CIRCUITRY IN MEMORY

Generating ROM bit cell arrays

SENSE AMPLIFIER

Reading circuitry in memory

SEQUENTIAL MEMORY AND ACCESSING METHOD THEREOF

SENSE AMPLIFIER

Memory and driving method therefor

Current sensing circuit and method of operation

Memory cell structure of metal programmable read only memory having...

Flat cell read only memory using common contacts for bit lines and...

High-speed programmable ROM, memory cell structure therefor, and me...

Read only memory devices with independently precharged virtual grou...

Memory cell structure of metal programmable read only memory having...

Method of manufacturing non-volatile read only memory

READ ONLY MEMORY (ROM) AND METHOD FOR FORMING THE SAME

Semiconductor memory device

Semiconductor memory

Read only memory device

Read-only memory with reduced loading value

DOUBLE ACCESS PATH MASK ROM CELL STRUCTURE

Semiconductor memory device and write/readout controlling method er...