where the redundant components implement processing functionality

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F11/00Error detection Error correction Monitoring

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G06F11/184where the redundant components implement processing functionality

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Patents Grantslast 30 patents

Information Patent Grant
System recovery using a failover processor
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- Issue date Mar 7, 2023
- Oracle International Corporation
- Christopher West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction in a redundant processing system
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- Issue date Jun 7, 2022
- Robert Bosch GmbH
- Peter Munk
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Information Patent Grant
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- THALES CANADA INC.
- Carl Schwellnus
Information Patent Grant
Triple modular redundancy flip-flop with improved power performance...
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- Hari Rao
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Information Patent Grant
Redundant processor architecture
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- Issue date Mar 22, 2022
- ZF Friedrichshafen AG
- Bülent Sari
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Information Patent Grant
Apparatus and methods for allocating and indicating engine control...
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- Issue date Feb 22, 2022
- Westinghouse Air Brake Technologies Corporation
- Michael Allen Taylor
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Information Patent Grant
Consensus-forming method in network, and node for configuring network
- Patent number 11,212,165
- Issue date Dec 28, 2021
- BITFLYER BLOCKCHAIN, INC.
- Yuzo Kano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System recovery using a failover processor
- Patent number 11,163,654
- Issue date Nov 2, 2021
- Oracle International Corporation
- Christopher West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for efficient reliable compute operations for mission...
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- Intel Corporation
- Sankaran M. Menon
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Information Patent Grant
Data processing using proof-of-transfer
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Processor for detecting and preventing recognition error
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- Issue date Apr 20, 2021
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Information Patent Grant
Fault-tolerant method for operating an autonomous controlled object
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Information Patent Grant
High data integrity processing system
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Information Patent Grant
High availability scheduler for scheduling map-reduce searches base...
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Information Patent Grant
Error detection triggering a recovery process that determines wheth...
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Information Patent Grant
Message synchronization system
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Information Patent Grant
Fault-tolerant method and device for controlling an autonomous tech...
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- Issue date Feb 25, 2020
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Information Patent Grant
Selecting master time of day for maximum redundancy
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- Issue date Jan 21, 2020
- International Business Machines Corporation
- Manish Kumar Chowdhary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mission-critical computing architecture
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- Issue date Dec 24, 2019
- Intel Corporation
- Bahaa Fahim
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Information Patent Grant
Multiplexing system, multiplexing method, and computer program product
- Patent number 10,489,239
- Issue date Nov 26, 2019
- Kabushiki Kaisha Toshiba
- Kotaro Endo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System recovery using a failover processor
- Patent number 10,474,549
- Issue date Nov 12, 2019
- Oracle International Corporation
- Christopher West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer architecture for mitigating transistor faults due to radia...
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- The Boeing Company
- Alexander Shyon Babazadeh
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Information Patent Grant
Fault-tolerant system architecture for the control of a physical sy...
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Information Patent Grant
Redundant computer system utilizing comparison diagnostics and voti...
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- Issue date Mar 12, 2019
- The University of Akron
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Information Patent Grant
Targeted recovery process
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- Issue date Jan 22, 2019
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- Balaji Venu
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Information Patent Grant
Providing failover control on a control system
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- Issue date Jan 1, 2019
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Information Patent Grant
Modified consensus protocol for eliminating heartbeat network traffic
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- Issue date Nov 6, 2018
- SAP SE
- Ivan Schreter
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Information Patent Grant
Multiprocessor system
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- Issue date Oct 16, 2018
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Information Patent Grant
Method for redundant processing of data
- Patent number 10,089,195
- Issue date Oct 2, 2018
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- Mikkel Liisberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for false pass detection in lockstep dual core or...
- Patent number 10,089,194
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CPU-GPU LOCKSTEP SYSTEM
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- Publication date Aug 10, 2023
- Huawei Technologies Co., Ltd
- Da Qi Ren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIPLE MODULAR REDUNDANCY FLIP-FLOP WITH IMPROVED POWER PERFORMANCE...
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Information Patent Application
SYSTEM RECOVERY USING A FAILOVER PROCESSOR
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- ORACLE INTERNATIONAL CORPORATION
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Information Patent Application
PROCESSOR FOR DETECTING AND PREVENTING RECOGNITION ERROR
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- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
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Consensus-Forming Method in Network, and Node for Configuring Network
- Publication number 20200112476
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- bitFlyer Blockchain, Inc.
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ERROR CORRECTION IN A REDUNDANT PROCESSING SYSTEM
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- ROBERT BOSCH GmbH
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DIVERSE REDUNDANT PROCESSING MODULES FOR ERROR DETECTION
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- QUALCOMM Incorporated
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- G01 - MEASURING TESTING
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SYSTEM RECOVERY USING A FAILOVER PROCESSOR
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- ORACLE INTERNATIONAL CORPORATION
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MISSION-CRITICAL COMPUTING ARCHITECTURE
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TECHNOLOGIES FOR EFFICIENT RELIABLE COMPUTE OPERATIONS FOR MISSION...
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- Intel Corporation
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Information Patent Application
COMPUTER ARCHITECTURE FOR MITIGATING TRANSISTOR FAULTS DUE TO RADIA...
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- Alexander Shyon Babazadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH AVAILABILITY SCHEDULER FOR SCHEDULING MAP-REDUCE SEARCHES
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- Publication date Oct 18, 2018
- Splunk Inc.
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TARGETED RECOVERY PROCESS
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- Publication date Sep 20, 2018
- ARM Limited
- Balaji VENU
- G06 - COMPUTING CALCULATING COUNTING
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MULTIPROCESSOR SYSTEM
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- Publication date Mar 8, 2018
- RENESAS ELECTRONICS CORPORATION
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Selecting Master Time of Day for Maximum Redundancy
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- Publication date Feb 22, 2018
- International Business Machines Corporation
- Manish Kumar Chowdhary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing Failover Control on a Control System
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- GE AVIATION SYSTEMS LLC
- Stefano A.M. Lassini
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Information Patent Application
SYSTEM ON CHIP FAULT DETECTION
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- G06 - COMPUTING CALCULATING COUNTING
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SYSTEM AND METHOD FOR CONTROLLING PROCESSOR INSTRUCTION EXECUTION
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- William David Smith
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FAULT TOLERANT SYSTEM WITH EQUIVALENCE PROCESSING DRIVING FAULT DET...
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Computer System and Method for Comparing Output Signals
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MULTIPLEX SYSTEM
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- Yoshio Kameda
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Method And Device For The Passivation Of Guidance Orders Of An Airc...
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- Airbus Operations (S.A.S.)
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Method And Device For Automatically Monitoring Lateral Guidance Ord...
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- Airbus Operations (S.A.S.)
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SYSTEM ON CHIP FAULT DETECTION
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD AND APPARATUS FOR ERROR CORRECTION IN MULTI-PROCESSO...
- Publication number 20120117419
- Publication date May 10, 2012
- Maxwell Technologies, Inc.
- Robert Hillman
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PROCESSOR AND IMAGE PROCESSING SYSTEM USING THE SAME
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- Publication date May 10, 2012
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- Masaru Haraguchi
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HIGH RELIABILITY METHOD OF DATA PROCESSING, AND CONTROLLER UNIT
- Publication number 20120030524
- Publication date Feb 2, 2012
- Reiner Schmid
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Information Patent Application
BYZANTINE FAULT-TOLERANCE IN DISTRIBUTED COMPUTING NETWORKS
- Publication number 20110029590
- Publication date Feb 3, 2011
- International Business Machines Corporation
- NICHOLAS R. BAILEY
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Information Patent Application
DISTRIBUTED MEMORY SYNCHRONIZED PROCESSING ARCHITECTURE
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- Publication date Jul 1, 2010
- SEAKR Engineering, Incorporated
- Ian Troxel
- G06 - COMPUTING CALCULATING COUNTING

where the redundant components implement processing functionality

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

System recovery using a failover processor

Error correction in a redundant processing system

Apparatus and method for communications in a safety critical system

Triple modular redundancy flip-flop with improved power performance...

Redundant processor architecture

Apparatus and methods for allocating and indicating engine control...

Consensus-forming method in network, and node for configuring network

System recovery using a failover processor

Technologies for efficient reliable compute operations for mission...

Data processing using proof-of-transfer

Processor for detecting and preventing recognition error

Fault-tolerant method for operating an autonomous controlled object

High data integrity processing system

High availability scheduler for scheduling map-reduce searches base...

Error detection triggering a recovery process that determines wheth...

Message synchronization system

Fault-tolerant method and device for controlling an autonomous tech...

Selecting master time of day for maximum redundancy

Mission-critical computing architecture

Multiplexing system, multiplexing method, and computer program product

System recovery using a failover processor

Computer architecture for mitigating transistor faults due to radia...

Fault-tolerant system architecture for the control of a physical sy...

Redundant computer system utilizing comparison diagnostics and voti...

Targeted recovery process

Providing failover control on a control system

Modified consensus protocol for eliminating heartbeat network traffic

Multiprocessor system

Method for redundant processing of data

System and method for false pass detection in lockstep dual core or...

Patents Applicationslast 30 patents

CPU-GPU LOCKSTEP SYSTEM

TRIPLE MODULAR REDUNDANCY FLIP-FLOP WITH IMPROVED POWER PERFORMANCE...

SYSTEM RECOVERY USING A FAILOVER PROCESSOR

PROCESSOR FOR DETECTING AND PREVENTING RECOGNITION ERROR

Consensus-Forming Method in Network, and Node for Configuring Network

ERROR CORRECTION IN A REDUNDANT PROCESSING SYSTEM

DIVERSE REDUNDANT PROCESSING MODULES FOR ERROR DETECTION

SYSTEM RECOVERY USING A FAILOVER PROCESSOR

MISSION-CRITICAL COMPUTING ARCHITECTURE

TECHNOLOGIES FOR EFFICIENT RELIABLE COMPUTE OPERATIONS FOR MISSION...

COMPUTER ARCHITECTURE FOR MITIGATING TRANSISTOR FAULTS DUE TO RADIA...

HIGH AVAILABILITY SCHEDULER FOR SCHEDULING MAP-REDUCE SEARCHES

TARGETED RECOVERY PROCESS

MULTIPROCESSOR SYSTEM

Selecting Master Time of Day for Maximum Redundancy

Providing Failover Control on a Control System

SYSTEM ON CHIP FAULT DETECTION

SYSTEM AND METHOD FOR CONTROLLING PROCESSOR INSTRUCTION EXECUTION

FAULT TOLERANT SYSTEM WITH EQUIVALENCE PROCESSING DRIVING FAULT DET...

COMPUTER SYSTEM

Computer System and Method for Comparing Output Signals

MULTIPLEX SYSTEM

Method And Device For The Passivation Of Guidance Orders Of An Airc...

Method And Device For Automatically Monitoring Lateral Guidance Ord...

SYSTEM ON CHIP FAULT DETECTION

SYSTEM, METHOD AND APPARATUS FOR ERROR CORRECTION IN MULTI-PROCESSO...

PROCESSOR AND IMAGE PROCESSING SYSTEM USING THE SAME

HIGH RELIABILITY METHOD OF DATA PROCESSING, AND CONTROLLER UNIT

BYZANTINE FAULT-TOLERANCE IN DISTRIBUTED COMPUTING NETWORKS

DISTRIBUTED MEMORY SYNCHRONIZED PROCESSING ARCHITECTURE