Wide data ports

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CPC
G11C2207/108

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C2207/108Wide data ports

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device
- Patent number 12,100,459
- Issue date Sep 24, 2024
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 11,715,529
- Issue date Aug 1, 2023
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequential memory operation without deactivating access line signals
- Patent number 11,355,166
- Issue date Jun 7, 2022
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 11,295,821
- Issue date Apr 5, 2022
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory macro and method of operating the same
- Patent number 11,189,342
- Issue date Nov 30, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Pankaj Aggarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for signal translation in a buffered memory
- Patent number 11,088,895
- Issue date Aug 10, 2021
- Micron Technology, Inc.
- Timothy M. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Support for multiple widths of DRAM in double data rate controllers...
- Patent number 10,956,349
- Issue date Mar 23, 2021
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 10,950,314
- Issue date Mar 16, 2021
- TOSHIBA MEMORY CORPORATION
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with write data bus control
- Patent number 10,943,625
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential memory operation without deactivating access line signals
- Patent number 10,923,163
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Grant
Device connected to other device by single wire and method of opera...
- Patent number 10,789,193
- Issue date Sep 29, 2020
- Samsung Electronics Co., Ltd.
- Jae-shin Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory macro which changes operational modes
- Patent number 10,770,135
- Issue date Sep 8, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Pankaj Aggarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for signal translation in a buffered memory
- Patent number 10,700,918
- Issue date Jun 30, 2020
- Micron Technology, Inc.
- Timothy M. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices enabling read strobe mode and related...
- Patent number 10,692,555
- Issue date Jun 23, 2020
- Samsung Electronics Co., Ltd.
- Ki-Seok Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory chip, semiconductor memory package, and electr...
- Patent number 10,679,956
- Issue date Jun 9, 2020
- Samsung Electronics Co., Ltd.
- Kyoung Soo Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 10,636,499
- Issue date Apr 28, 2020
- TOSHIBA MEMORY CORPORATION
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with write data bus control
- Patent number 10,553,263
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential memory operation without deactivating access line signals
- Patent number 10,497,406
- Issue date Dec 3, 2019
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic devices
- Patent number 10,475,486
- Issue date Nov 12, 2019
- SK hynix Inc.
- Yo Sep Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 10,438,670
- Issue date Oct 8, 2019
- TOSHIBA MEMORY CORPORATION
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 10,381,092
- Issue date Aug 13, 2019
- TOSHIBA MEMORY CORPORATION
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory system with wide I/O memory die
- Patent number 10,381,327
- Issue date Aug 13, 2019
- SanDisk Technologies LLC
- Venkatesh P. Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor devices and semiconductor systems including the same
- Patent number 10,366,730
- Issue date Jul 30, 2019
- SK hynix Inc.
- Jaeil Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Advanced memory interfaces and methods
- Patent number 10,228,853
- Issue date Mar 12, 2019
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 10,199,079
- Issue date Feb 5, 2019
- SK hynix Inc.
- Myung Jin Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory macro disableable input-output circuits and methods of opera...
- Patent number 10,186,313
- Issue date Jan 22, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Pankaj Aggarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for write data bus control in a stacked memory de...
- Patent number 10,163,469
- Issue date Dec 25, 2018
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including a voltage generation circuit, and vo...
- Patent number 10,096,369
- Issue date Oct 9, 2018
- Winbond Electronics Corp.
- Hiroki Murakami
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including a redistribution layer
- Patent number 9,940,979
- Issue date Apr 10, 2018
- SK hynix Inc.
- Tae Kyun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-stage read/write 3D architecture for memory devices
- Patent number 9,851,915
- Issue date Dec 26, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuang Ting Chen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240371448
- Publication date Nov 7, 2024
- KIOXIA Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS
- Publication number 20210257008
- Publication date Aug 19, 2021
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUSES FOR SIGNAL TRANSLATION IN A BUFFERED MEMORY
- Publication number 20200287778
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Timothy M. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20200211659
- Publication date Jul 2, 2020
- Toshiba Memory Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20200126603
- Publication date Apr 23, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...
- Publication number 20200117629
- Publication date Apr 16, 2020
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS
- Publication number 20200066311
- Publication date Feb 27, 2020
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20190122708
- Publication date Apr 25, 2019
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MACRO AND METHOD OF OPERATING THE SAME
- Publication number 20190103157
- Publication date Apr 4, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Pankaj AGGARWAL
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20180294038
- Publication date Oct 11, 2018
- Toshiba Memory Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE CONNECTED TO OTHER DEVICE BY SINGLE WIRE AND METHOD OF OPERA...
- Publication number 20180181513
- Publication date Jun 28, 2018
- Samsung Electronics Co., Ltd.
- Jae-shin LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-STAGE READ/WRITE 3D ARCHITECTURE FOR MEMORY DEVICES
- Publication number 20170285990
- Publication date Oct 5, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Kuang Ting Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MACRO CONFIGURATION AND METHOD
- Publication number 20140334235
- Publication date Nov 13, 2014
- Taiwan Semiconductor Manufacturing Co., LTD
- Sergiy ROMANOVSKYY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS
- Publication number 20140313839
- Publication date Oct 23, 2014
- Micron Technology, Inc.
- Koji Sakui
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Width Memory Modules
- Publication number 20140293671
- Publication date Oct 2, 2014
- RAMBUS INC.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20140286110
- Publication date Sep 25, 2014
- KABUSHIKI KAISHA TOSHIBA
- Yuui SHIMIZU
- G11 - INFORMATION STORAGE
Information Patent Application
ADVANCED MEMORY INTERFACES AND METHODS
- Publication number 20140289448
- Publication date Sep 25, 2014
- Micron Technology, Inc.
- Larry J. Koudele
- G11 - INFORMATION STORAGE
Information Patent Application
Multiphase Receiver with Equalization Circuitry
- Publication number 20140286389
- Publication date Sep 25, 2014
- RAMBUS INC.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CLOCK POWER SAVING IN MULTIPORT LATCH ARRAYS
- Publication number 20140177344
- Publication date Jun 26, 2014
- QUALCOMM Incorporated
- Saravanan MARIMUTHU
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE-WIDTH COMMAND/ADDRESS BUS
- Publication number 20140181333
- Publication date Jun 26, 2014
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Modules and Devices Supporting Configurable Data Widths
- Publication number 20130286706
- Publication date Oct 31, 2013
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PORT MEMORY BASED ON DRAM CORE
- Publication number 20130205100
- Publication date Aug 8, 2013
- FUJITSU SEMICONDUCTOR LIMITED
- Ayako Sato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PORT MEMORY BASED ON DRAM CORE
- Publication number 20130201751
- Publication date Aug 8, 2013
- FUJITSU SEMICONDUCTOR LIMITED
- Takaaki Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MACRO CONFIGURATION AND METHOD
- Publication number 20130155785
- Publication date Jun 20, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Sergiy ROMANOVSKYY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiphase receiver with equalization circuitry
- Publication number 20130010855
- Publication date Jan 10, 2013
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Modules and Devices Supporting Configurable Core Organizations
- Publication number 20120134084
- Publication date May 31, 2012
- RAMBUS INC.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MACRO CONFIGURATION AND METHOD
- Publication number 20120057412
- Publication date Mar 8, 2012
- Taiwan Semiconductor Manufacturing Co., LTD
- Sergiy ROMANOVSKYY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON MEMORY DEVICE FOR VARIABLE DEVICE WIDTH AND SCALABLE PRE-FET...
- Publication number 20110261636
- Publication date Oct 27, 2011
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORT MEMORY BASED ON DRAM CORE
- Publication number 20110141795
- Publication date Jun 16, 2011
- FUJITSU SEMICONDUCTOR LIMITED
- Yasurou MATSUZAKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY
- Publication number 20110140741
- Publication date Jun 16, 2011
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Wide data ports

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device

Semiconductor device

Sequential memory operation without deactivating access line signals

Semiconductor device

Memory macro and method of operating the same

Methods and apparatuses for signal translation in a buffered memory

Support for multiple widths of DRAM in double data rate controllers...

Semiconductor device

Memory device with write data bus control

Sequential memory operation without deactivating access line signals

Device connected to other device by single wire and method of opera...

Memory macro which changes operational modes

Methods and apparatuses for signal translation in a buffered memory

Semiconductor memory devices enabling read strobe mode and related...

Semiconductor memory chip, semiconductor memory package, and electr...

Semiconductor device

Memory device with write data bus control

Sequential memory operation without deactivating access line signals

Electronic devices

Semiconductor device

Semiconductor device

Non-volatile memory system with wide I/O memory die

Semiconductor devices and semiconductor systems including the same

Advanced memory interfaces and methods

Semiconductor memory device

Memory macro disableable input-output circuits and methods of opera...

System and method for write data bus control in a stacked memory de...

Semiconductor device including a voltage generation circuit, and vo...

Semiconductor device including a redistribution layer

Two-stage read/write 3D architecture for memory devices

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS

METHODS AND APPARATUSES FOR SIGNAL TRANSLATION IN A BUFFERED MEMORY

SEMICONDUCTOR DEVICE

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...

SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

MEMORY MACRO AND METHOD OF OPERATING THE SAME

SEMICONDUCTOR DEVICE

DEVICE CONNECTED TO OTHER DEVICE BY SINGLE WIRE AND METHOD OF OPERA...

TWO-STAGE READ/WRITE 3D ARCHITECTURE FOR MEMORY DEVICES

MEMORY MACRO CONFIGURATION AND METHOD

SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS

Configurable Width Memory Modules

SEMICONDUCTOR MEMORY DEVICE

ADVANCED MEMORY INTERFACES AND METHODS

Multiphase Receiver with Equalization Circuitry

METHOD AND APPARATUS FOR CLOCK POWER SAVING IN MULTIPORT LATCH ARRAYS

VARIABLE-WIDTH COMMAND/ADDRESS BUS

Memory Modules and Devices Supporting Configurable Data Widths

MULTI-PORT MEMORY BASED ON DRAM CORE

MULTI-PORT MEMORY BASED ON DRAM CORE

MEMORY MACRO CONFIGURATION AND METHOD

Multiphase receiver with equalization circuitry

Memory Modules and Devices Supporting Configurable Core Organizations

MEMORY MACRO CONFIGURATION AND METHOD

COMMON MEMORY DEVICE FOR VARIABLE DEVICE WIDTH AND SCALABLE PRE-FET...

MULTI-PORT MEMORY BASED ON DRAM CORE

INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY