Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store

GPHYSICS G11Information storage G11CSTATIC STORES

G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store

G11C2207/002Isolation gates G11C2207/005Transfer gates G11C2207/007Register arrays G11C2207/06Sense amplifier related aspects G11C2207/061Sense amplifier enabled by a address transition detection related control signal G11C2207/063Current sense amplifiers G11C2207/065Sense amplifier drivers G11C2207/066Frequency reading type sense amplifier G11C2207/068Integrator type sense amplifier G11C2207/10Aspects relating to interfaces of memory device to external buses G11C2207/101Analog or multilevel bus G11C2207/102Compression or decompression of data before storage G11C2207/104Embedded memory devices G11C2207/105Aspects related to pads, pins or terminals G11C2207/107Serial-parallel conversion of data or prefetch G11C2207/108Wide data ports G11C2207/12Equalization of bit lines G11C2207/16Solid state audio G11C2207/22Control and timing of internal memory operations G11C2207/2209Concurrent read and write G11C2207/2218Late write G11C2207/2227Standby or low power modes G11C2207/2236Copy G11C2207/2245Memory devices with an internal cache buffer G11C2207/2254Calibration G11C2207/2263Write conditionally G11C2207/2272Latency related aspects G11C2207/2281Timing of a read operation G11C2207/229Timing of a write operation