with charge regeneration common to a multiplicity of memory cells

Industry

CPC
G11C11/403

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/403with charge regeneration common to a multiplicity of memory cells

Industries

Patents Grantslast 30 patents

Information Patent Grant
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- CHANGXIN MEMORY TECHNOLOGIES, INC.
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Vertical two-transistor single capacitor memory cells and memory ar...
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Information Patent Grant
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with efficient write operations
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- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-port semiconductor memory and first in first out (FIFO) memory...
- Patent number 11,063,048
- Issue date Jul 13, 2021
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for refreshing memory
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- Issue date Jul 13, 2021
- Micron Technology, Inc.
- Yutaka Ito
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of maintaining the state of semiconductor memory having elec...
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and system using the same
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Complementary dual-modular redundancy memory cell
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- Bar-Ilan University
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Information Patent Grant
Apparatuses comprising memory cells, and apparatuses comprising mem...
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Information Patent Grant
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- Micron Technology, Inc.
- James S. Rehmeyer
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Information Patent Grant
Semiconductor device and system using the same
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- Issue date Dec 15, 2020
- Semiconductor Energy Laboratory Co., Ltd.
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for compute components formed over an array...
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- Issue date Dec 1, 2020
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Information Patent Grant
Apparatuses and methods including two transistor-one capacitor memo...
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- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Christopher J. Kawamura
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for performing row hammer refresh operations in...
- Patent number 10,839,885
- Issue date Nov 17, 2020
- Micron Technology, Inc.
- Joosang Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

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- Koji SAKUI
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Information Patent Application
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- Publication number 20230389262
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- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
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- Semiconductor Energy Laboratory Co., Ltd.
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- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK CONVERTING CIRCUIT WITH SYMMETRIC STRUCTURE
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- Samsung Electronics Co., Ltd.
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TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS
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SYSTEM AND METHOD FOR DETECTING MEMORY CELL DISTURBANCE BY MONITORI...
- Publication number 20220284944
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- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
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Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...
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A DRAM MEMORY
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MEMORY COMPONENT WITH EFFICIENT WRITE OPERATIONS
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APPARATUSES AND METHODS FOR CACHE OPERATIONS
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CLOCK CONVERTING CIRCUIT WITH SYMMETRIC STRUCTURE
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SEMICONDUCTOR DEVICE
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- Publication number 20210327880
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- Zeno Semiconductor, Inc.
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CAPACITIVE PROCESSING UNIT
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Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...
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SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME
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- Semiconductor Energy Laboratory Co., Ltd.
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SEMICONDUCTOR DEVICE
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Semiconductor Device and Method for Driving Semiconductor Device
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- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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Information Patent Application
TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS
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- Publication date Mar 19, 2020
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Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...
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- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- H01 - BASIC ELECTRIC ELEMENTS

with charge regeneration common to a multiplicity of memory cells

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory component with efficient write operations

Semiconductor device

Semiconductor device and method for driving semiconductor device

Apparatuses and methods for cache operations

Clock converting circuit with symmetric structure

Semiconductor device and system using the same

Dual row-column major dram

DRAM memory

Systems and methods for improving power efficiency in refreshing me...

System and method for detecting memory cell disturbance by monitori...

Dual-port semiconductor memory and first in first out (FIFO) memory...

Apparatuses and methods for compute components formed over an array...

Semiconductor device and method for driving semiconductor device

Apparatuses and methods for cache operations

Capacitive processing unit

Semiconductor device

Vertical two-transistor single capacitor memory cells and memory ar...

Semiconductor device

Memory component with efficient write operations

Dual-port semiconductor memory and first in first out (FIFO) memory...

Apparatus and methods for refreshing memory

Method of maintaining the state of semiconductor memory having elec...

Semiconductor device and system using the same

Complementary dual-modular redundancy memory cell

Apparatuses comprising memory cells, and apparatuses comprising mem...

Systems and methods for improving power efficiency in refreshing me...

Semiconductor device and system using the same

Apparatuses and methods for compute components formed over an array...

Apparatuses and methods including two transistor-one capacitor memo...

Systems and methods for performing row hammer refresh operations in...

Patents Applicationslast 30 patents

SEMICONDUCTOR-ELEMENT-INCLUDING MEMORY DEVICE

Semiconductor Device and Method For Driving Semiconductor Device

SEMICONDUCTOR DEVICE

CLOCK CONVERTING CIRCUIT WITH SYMMETRIC STRUCTURE

TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS

SYSTEM AND METHOD FOR DETECTING MEMORY CELL DISTURBANCE BY MONITORI...

Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...

A DRAM MEMORY

Semiconductor Device and Method For Driving Semiconductor Device

MEMORY COMPONENT WITH EFFICIENT WRITE OPERATIONS

APPARATUSES AND METHODS FOR CACHE OPERATIONS

CLOCK CONVERTING CIRCUIT WITH SYMMETRIC STRUCTURE

SEMICONDUCTOR DEVICE

Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...

CAPACITIVE PROCESSING UNIT

MEMORY COMPONENT WITH EFFICIENT WRITE OPERATIONS

SYSTEMS AND METHODS FOR IMPROVING POWER EFFICIENCY IN REFRESHING ME...

APPARATUSES AND METHODS FOR COMPUTE COMPONENTS FORMED OVER AN ARRAY...

SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME

Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...

SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME

SEMICONDUCTOR DEVICE

Method of Maintaining the State of Semiconductor Memory Having Elec...

APPARATUS AND METHODS FOR REFRESHING MEMORY

SYSTEMS AND METHODS FOR IMPROVING POWER EFFICIENCY IN REFRESHING ME...

Method of Maintaining the State of Semiconductor Memory Having Elec...

MEMORY DEVICE AND REFRESH INFORMATION COHERENCE METHOD THEREOF

Semiconductor Device and Method for Driving Semiconductor Device

TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS

Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory...