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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/0875with dedicated cache

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Patents Grantslast 30 patents

Information Patent Grant
Instruction prefetch mechanism
- Patent number 12,164,430
- Issue date Dec 10, 2024
- Intel Corporation
- Vasileios Porpodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression metadata assisted computation
- Patent number 12,164,924
- Issue date Dec 10, 2024
- Advanced Micro Devices, Inc.
- Matthew Tomei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling processor
- Patent number 12,164,464
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking streaming engine vector predicates to control processor ex...
- Patent number 12,164,438
- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer display data in a chiplet architecture
- Patent number 12,164,365
- Issue date Dec 10, 2024
- Advanced Micro Devices, Inc.
- Gia Tung Phan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory page markings as logging cues for processor-based execution...
- Patent number 12,164,413
- Issue date Dec 10, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device including a control circuit and at leas...
- Patent number 12,164,772
- Issue date Dec 10, 2024
- Kioxia Corporation
- Masanobu Shirakawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for policy execution processing
- Patent number 12,159,143
- Issue date Dec 3, 2024
- The Charles Stark Draper Laboratory
- Steve E. Milburn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for processing multiple transactions converted from single t...
- Patent number 12,153,952
- Issue date Nov 26, 2024
- MetisX CO., Ltd.
- Kwang Sun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and operation thereof to revoke cache memory states utili...
- Patent number 12,147,349
- Issue date Nov 19, 2024
- Korea University Research and Business Foundation
- Taeweon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure boot up of computing devices
- Patent number 12,147,541
- Issue date Nov 19, 2024
- Hewlett-Packard Development Company, L.P.
- Kang-Ning Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch store filtering
- Patent number 12,141,069
- Issue date Nov 12, 2024
- ARM Limited
- Luca Maroncelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance and reliability of processor store operation data trans...
- Patent number 12,141,071
- Issue date Nov 12, 2024
- International Business Machnes Corporation
- Shakti Kapoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching of logical-to-physical mapping information in a memory sub-...
- Patent number 12,130,748
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quality of service (QoS) control of processor applications
- Patent number 12,130,773
- Issue date Oct 29, 2024
- QUALCOMM Incorporated
- Bharat Kumar Rangarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory page markings as logging cues for processor-based execution...
- Patent number 12,130,725
- Issue date Oct 29, 2024
- MICROSFT TECHNOLOGY LICENSING, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine-grained multithreaded cores executing fused operations in mult...
- Patent number 12,130,744
- Issue date Oct 29, 2024
- Mobileye Vision Technologies Ltd.
- Yosef Kreinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for efficient grouping of cache requests for datapath schedu...
- Patent number 12,124,378
- Issue date Oct 22, 2024
- NVIDIA Corporation
- Gregory A. Muthler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,124,383
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Never stale caching of effective properties
- Patent number 12,117,992
- Issue date Oct 15, 2024
- Ping Identity International, Inc.
- Dirk John Hogan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch target buffer miss handling
- Patent number 12,118,360
- Issue date Oct 15, 2024
- Ventana Micro Systems Inc.
- John G Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One-dimensional zero padding in a stream of matrix elements
- Patent number 12,118,358
- Issue date Oct 15, 2024
- Texas Instruments Incorporated
- Son Hung Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for generating a multi dimensional data cube for...
- Patent number 12,111,809
- Issue date Oct 8, 2024
- Oracle International Corporation
- Midda Dharmika Srinivasulu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for vector permutation
- Patent number 12,105,635
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple interfaces for multiple threads of a hardware multi-thread...
- Patent number 12,106,110
- Issue date Oct 1, 2024
- Ceremorphic, Inc.
- Heonchul Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache aware searching based on files of buckets
- Patent number 12,105,632
- Issue date Oct 1, 2024
- Splunk Inc.
- Ledion Bitincka
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYMBOL ROTATION OF CACHE LINE CODEWORDS FOR INCREASED RELIABILITY W...
- Publication number 20240419550
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Majid Anaraki NEMATI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR VECTOR PERMUTATION
- Publication number 20240419606
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE CONTROL CIRCUIT WITH FETCH HYSTERESIS
- Publication number 20240419324
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Matthew Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
- Publication number 20240411703
- Publication date Dec 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE LATENCY INSTRUCTIONS
- Publication number 20240411559
- Publication date Dec 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL DATA STREAMS SHARING DUAL CACHE ACCESS PORTS
- Publication number 20240403055
- Publication date Dec 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE MULTITHREADED PROCESSORS WITH SHARED DATA CACHE
- Publication number 20240394191
- Publication date Nov 28, 2024
- MOBILEYE VISION TECHNOLOGIES LTD.
- Yosef Kreinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE
- Publication number 20240385840
- Publication date Nov 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Raymond Michael Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS
- Publication number 20240378158
- Publication date Nov 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Soujanya Narnur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATIONS IN A PROCESSOR CACHE BASED ON OCCUPANCY STATE
- Publication number 20240378154
- Publication date Nov 14, 2024
- Nokia Solutions and Networks Oy
- Pranjal Kumar Dutta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH CACHE-LIKE STREAM DATA STORAGE AND LIFETIME T...
- Publication number 20240378056
- Publication date Nov 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-DIMENSIONAL ZERO PADDING IN A STREAM OF MATRIX ELEMENTS
- Publication number 20240378058
- Publication date Nov 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- William Franklin Leven
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR PREDICTING BEHAVIOUR OF CONTROL FLOW INSTRUCTIONS
- Publication number 20240370266
- Publication date Nov 7, 2024
- ARM Limited
- Alexander Cole SHULYAK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE ORGANIZATION FOR TRANSPOSING A MATRIX USING A STREAMING ENGINE
- Publication number 20240370264
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Jonathan (Son) Hung Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS RELATED TO MICROCODE INSTRUCTIONS INDICATING...
- Publication number 20240362020
- Publication date Oct 31, 2024
- Lodestar Licensing Group LLC
- Shawn Rosti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME ADAPTIVE PREFETCHING IN A MANY-CORE SYSTEM
- Publication number 20240354110
- Publication date Oct 24, 2024
- Ampere Computing LLC
- Erika Susana ALCORTA LOZANO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CMB CACHING USING HYBRID SRAM/DRAM DATA PATH
- Publication number 20240354256
- Publication date Oct 24, 2024
- Western Digital Technologies, Inc.
- Stephen GOLD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Based Matrix Multiplication
- Publication number 20240354259
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SORTING VECTOR ELEMENTS USING A COUNT VALUE
- Publication number 20240354260
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MUL...
- Publication number 20240330203
- Publication date Oct 3, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE
- Publication number 20240329885
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH ERROR DETECTION, CORRECTION AND RESTART
- Publication number 20240320094
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID IN-MEMORY/PAGEABLE SPATIAL COLUMN DATA
- Publication number 20240311371
- Publication date Sep 19, 2024
- SAP SE
- Colin FLORENDO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION
- Publication number 20240311149
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SECURE, SIMPLE, AND FAST SPECULATIVE EXECUTION
- Publication number 20240311150
- Publication date Sep 19, 2024
- Purdue Research Foundation
- Mithuna Shamabhat Thottethodi
- G06 - COMPUTING CALCULATING COUNTING

with dedicated cache

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Instruction prefetch mechanism

Compression metadata assisted computation

Multi-threaded, self-scheduling processor

Tracking streaming engine vector predicates to control processor ex...

Buffer display data in a chiplet architecture

Memory page markings as logging cues for processor-based execution...

Semiconductor memory device including a control circuit and at leas...

Multicore shared cache operation engine

Systems and methods for policy execution processing

Method for processing multiple transactions converted from single t...

Cache structure and utilization

Processor and operation thereof to revoke cache memory states utili...

Secure boot up of computing devices

Systolic disaggregation within a matrix accelerator architecture

Prefetch store filtering

Configurable cache for coherent system

Performance and reliability of processor store operation data trans...

Caching of logical-to-physical mapping information in a memory sub-...

Quality of service (QoS) control of processor applications

Memory page markings as logging cues for processor-based execution...

Fine-grained multithreaded cores executing fused operations in mult...

Method for efficient grouping of cache requests for datapath schedu...

Systems and methods for cache optimization

Never stale caching of effective properties

Branch target buffer miss handling

One-dimensional zero padding in a stream of matrix elements

System and method for generating a multi dimensional data cube for...

Method and apparatus for vector permutation

Multiple interfaces for multiple threads of a hardware multi-thread...

Cache aware searching based on files of buckets

Patents Applicationslast 30 patents

SYMBOL ROTATION OF CACHE LINE CODEWORDS FOR INCREASED RELIABILITY W...

METHOD AND APPARATUS FOR VECTOR PERMUTATION

CACHE CONTROL CIRCUIT WITH FETCH HYSTERESIS

PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT

CACHE STRUCTURE AND UTILIZATION

VARIABLE LATENCY INSTRUCTIONS

COMPRESSION TECHNIQUES

DUAL DATA STREAMS SHARING DUAL CACHE ACCESS PORTS

MULTIPLE MULTITHREADED PROCESSORS WITH SHARED DATA CACHE

CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE

METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS

OPERATIONS IN A PROCESSOR CACHE BASED ON OCCUPANCY STATE

STREAMING ENGINE WITH CACHE-LIKE STREAM DATA STORAGE AND LIFETIME T...

TWO-DIMENSIONAL ZERO PADDING IN A STREAM OF MATRIX ELEMENTS

TECHNIQUE FOR PREDICTING BEHAVIOUR OF CONTROL FLOW INSTRUCTIONS

STORAGE ORGANIZATION FOR TRANSPOSING A MATRIX USING A STREAMING ENGINE

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

APPARATUS AND METHODS RELATED TO MICROCODE INSTRUCTIONS INDICATING...

RUNTIME ADAPTIVE PREFETCHING IN A MANY-CORE SYSTEM

CMB CACHING USING HYBRID SRAM/DRAM DATA PATH

Vector Based Matrix Multiplication

SORTING VECTOR ELEMENTS USING A COUNT VALUE

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MUL...

SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE

STREAMING ENGINE WITH ERROR DETECTION, CORRECTION AND RESTART

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

HYBRID IN-MEMORY/PAGEABLE SPATIAL COLUMN DATA

DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION

METHOD FOR SECURE, SIMPLE, AND FAST SPECULATIVE EXECUTION