with global bypass

Industry

CPC
G06F9/3828

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/3828with global bypass

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Coprocessors with bypass optimization, variable grid architecture,...
- Patent number 12,174,785
- Issue date Dec 24, 2024
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessors with bypass optimization, variable grid architecture,...
- Patent number 12,135,681
- Issue date Nov 5, 2024
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduling heterogeneous computation on multithreaded processors
- Patent number 12,118,398
- Issue date Oct 15, 2024
- Imagination Technologies Limited
- Luke Tilman Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit program order
- Patent number 11,977,891
- Issue date May 7, 2024
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction block allocation
- Patent number 11,755,484
- Issue date Sep 12, 2023
- Microsoft Technology Licensing, LLC
- Jan S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coupling wide memory interface to wide write back paths
- Patent number 11,726,912
- Issue date Aug 15, 2023
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation and use of memory access instruction order encodings
- Patent number 11,681,531
- Issue date Jun 20, 2023
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed cluster training method and apparatus
- Patent number 11,636,379
- Issue date Apr 25, 2023
- Alibaba Group Holding Limited
- Jun Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operator registration method and apparatus for deep learning framew...
- Patent number 11,625,248
- Issue date Apr 11, 2023
- BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
- Weihang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessors with bypass optimization, variable grid architecture,...
- Patent number 11,429,555
- Issue date Aug 30, 2022
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for implementing chained tile operations
- Patent number 11,416,260
- Issue date Aug 16, 2022
- Intel Corporation
- Christopher J. Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exception handling
- Patent number 11,403,108
- Issue date Aug 2, 2022
- Graphcore Limited
- James Pallister
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution of cross-lane operations in data processing systems
- Patent number 11,397,624
- Issue date Jul 26, 2022
- ARM Limited
- Luka Dejanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Opportunistic consumer instruction steering based on producer instr...
- Patent number 11,327,763
- Issue date May 10, 2022
- Microsoft Technology Licensing, LLC
- Arthur Perais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 11,163,720
- Issue date Nov 2, 2021
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for dynamic pipeline stage control of...
- Patent number 11,132,201
- Issue date Sep 28, 2021
- Intel Corporation
- Ryan Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block-based processor core composition register
- Patent number 11,126,433
- Issue date Sep 21, 2021
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced processor architecture
- Patent number 11,061,682
- Issue date Jul 13, 2021
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distinct system registers for logical processors
- Patent number 11,016,770
- Issue date May 25, 2021
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coupling wide memory interface to wide write back paths
- Patent number 10,963,379
- Issue date Mar 30, 2021
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dense read encoding for dataflow ISA
- Patent number 10,936,316
- Issue date Mar 2, 2021
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register read/write ordering
- Patent number 10,871,967
- Issue date Dec 22, 2020
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing apparatus, dynamic reconfiguration device, a...
- Patent number 10,782,975
- Issue date Sep 22, 2020
- Fuji Xerox Co., Ltd.
- Masahiro Ishiwata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug support for block-based processor
- Patent number 10,776,115
- Issue date Sep 15, 2020
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block-based processor including topology and control registers to i...
- Patent number 10,768,936
- Issue date Sep 8, 2020
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching instruction blocks
- Patent number 10,719,321
- Issue date Jul 21, 2020
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing processor instructions using minimal dependency queue
- Patent number 10,678,549
- Issue date Jun 9, 2020
- International Business Machines Corporation
- Avraham Ayzenfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for implementing chained tile operations
- Patent number 10,664,287
- Issue date May 26, 2020
- Intel Corporation
- Christopher J. Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tightly coupled processor arrays using coarse grained reconfigurabl...
- Patent number 10,528,356
- Issue date Jan 7, 2020
- International Business Machines Corporation
- Chia-yu Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for adjacency network delivery of operands to...
- Patent number 10,503,515
- Issue date Dec 10, 2019
- Gerald George Pechanek
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPERATOR REGISTRATION METHOD AND APPARATUS FOR DEEP LEARNING FRAMEW...
- Publication number 20220374238
- Publication date Nov 24, 2022
- BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
- Weihang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coprocessors with Bypass Optimization, Variable Grid Architecture,...
- Publication number 20220358082
- Publication date Nov 10, 2022
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coprocessors with Bypass Optimization, Variable Grid Architecture,...
- Publication number 20220350776
- Publication date Nov 3, 2022
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED PROCESSOR ARCHITECTURE
- Publication number 20210406027
- Publication date Dec 30, 2021
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COUPLING WIDE MEMORY INTERFACE TO WIDE WRITE BACK PATHS
- Publication number 20210216454
- Publication date Jul 15, 2021
- Microsoft Technology Licensing, LLC
- Douglas C. Burger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PIPELINE STAGE CONTROL OF...
- Publication number 20210191725
- Publication date Jun 24, 2021
- Intel Corporation
- Ryan Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SOLVING THE PROBLEM OF CLUSTERING USING CELLULAR AUTOMAT...
- Publication number 20210132951
- Publication date May 6, 2021
- YEDITEPE UNIVERSITESI
- Emin Erkan KORKMAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPLEMENTING CHAINED TILE OPERATIONS
- Publication number 20200387383
- Publication date Dec 10, 2020
- Intel Corporation
- Christopher J. HUGHES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coprocessors with Bypass Optimization, Variable Grid Architecture,...
- Publication number 20200272597
- Publication date Aug 27, 2020
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING
- Publication number 20190294571
- Publication date Sep 26, 2019
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...
- Publication number 20190227982
- Publication date Jul 25, 2019
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed Cluster Training Method and Apparatus
- Publication number 20190026657
- Publication date Jan 24, 2019
- ALIBABA GROUP HOLDING LIMITED
- Jun Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING HETEROGENOUS COMPUTATION ON MULTITHREADED PROCESSORS
- Publication number 20180329753
- Publication date Nov 15, 2018
- Imagination Technologies Limited
- Luke Tilman PETERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...
- Publication number 20180137081
- Publication date May 17, 2018
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Migration between Dissimilar Cores
- Publication number 20170068575
- Publication date Mar 9, 2017
- Apple Inc.
- James N. Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH INTER-EXECUTION UNIT INSTRUCTION ISSUE
- Publication number 20140372733
- Publication date Dec 18, 2014
- Horst Diewald
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL SIGNAL PROCESSOR
- Publication number 20140359252
- Publication date Dec 4, 2014
- Media Tek Sweden AB
- Anders Nilsson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-CYCLE INSTRUCTION PIPELINE SCHEDULING
- Publication number 20140325187
- Publication date Oct 30, 2014
- Advanced Micro Devices, Inc.
- Michael D. Estlick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHAINING BETWEEN EXPOSED VECTOR PIPELINES
- Publication number 20140281403
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Thomas W. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHAINING BETWEEN EXPOSED VECTOR PIPELINES
- Publication number 20140281386
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Thomas W. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR FORWARDING LITERAL GENERATED DATA TO DEPEN...
- Publication number 20140281391
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MEMORY-HIERARCHY AWARE PRODUCER-CONSUMER I...
- Publication number 20140208031
- Publication date Jul 24, 2014
- Shlomo Raikin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH EXECUTION UNIT INTEROPERATION
- Publication number 20140089645
- Publication date Mar 27, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Horst DIEWALD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATER STAGE READ PORT REDUCTION
- Publication number 20130339689
- Publication date Dec 19, 2013
- Srikanth T. Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus For Attaching Application Specific Functions...
- Publication number 20130283007
- Publication date Oct 24, 2013
- Altera Corporation
- Gerald George Pechanek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER, HIGH PERFORMANCE, HETEROGENEOUS, SCALABLE PROCESSOR ARCH...
- Publication number 20130238878
- Publication date Sep 12, 2013
- ICELERO INC
- Amit Ramchandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROCESSOR SYSTEM, SYNCHRONIZATION CONTROL SYSTEM, SYNCHR...
- Publication number 20130179666
- Publication date Jul 11, 2013
- Fujitsu Limited
- Koichiro YAMASHITA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY VARIABLE TRANSFER NETWORK FOR FINE GRAINED PARALLELISM...
- Publication number 20130159669
- Publication date Jun 20, 2013
- International Business Machines Corporation
- Miguel Comparan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER SYSTEMS AND METHODS FOR REGISTER-BASED MESSAGE PASSING
- Publication number 20130138930
- Publication date May 30, 2013
- Peter J. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR REDUCING OVERHEAD CAUSED BY COMMUNICATION...
- Publication number 20130124825
- Publication date May 16, 2013
- Min-Wook AHN
- G06 - COMPUTING CALCULATING COUNTING

with global bypass

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Coprocessors with bypass optimization, variable grid architecture,...

Coprocessors with bypass optimization, variable grid architecture,...

Scheduling heterogeneous computation on multithreaded processors

Implicit program order

Instruction block allocation

Coupling wide memory interface to wide write back paths

Generation and use of memory access instruction order encodings

Distributed cluster training method and apparatus

Operator registration method and apparatus for deep learning framew...

Coprocessors with bypass optimization, variable grid architecture,...

Systems and methods for implementing chained tile operations

Exception handling

Execution of cross-lane operations in data processing systems

Opportunistic consumer instruction steering based on producer instr...

Apparatus and method for processing an instruction matrix specifyin...

System, apparatus and method for dynamic pipeline stage control of...

Block-based processor core composition register

Advanced processor architecture

Distinct system registers for logical processors

Coupling wide memory interface to wide write back paths

Dense read encoding for dataflow ISA

Register read/write ordering

Information processing apparatus, dynamic reconfiguration device, a...

Debug support for block-based processor

Block-based processor including topology and control registers to i...

Prefetching instruction blocks

Executing processor instructions using minimal dependency queue

Systems and methods for implementing chained tile operations

Tightly coupled processor arrays using coarse grained reconfigurabl...

Methods and apparatus for adjacency network delivery of operands to...

Patents Applicationslast 30 patents

OPERATOR REGISTRATION METHOD AND APPARATUS FOR DEEP LEARNING FRAMEW...

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

ADVANCED PROCESSOR ARCHITECTURE

COUPLING WIDE MEMORY INTERFACE TO WIDE WRITE BACK PATHS

SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PIPELINE STAGE CONTROL OF...

METHOD FOR SOLVING THE PROBLEM OF CLUSTERING USING CELLULAR AUTOMAT...

SYSTEMS AND METHODS FOR IMPLEMENTING CHAINED TILE OPERATIONS

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING

APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...

Distributed Cluster Training Method and Apparatus

SCHEDULING HETEROGENOUS COMPUTATION ON MULTITHREADED PROCESSORS

APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...

Hardware Migration between Dissimilar Cores

PROCESSOR WITH INTER-EXECUTION UNIT INSTRUCTION ISSUE

DIGITAL SIGNAL PROCESSOR

SINGLE-CYCLE INSTRUCTION PIPELINE SCHEDULING

CHAINING BETWEEN EXPOSED VECTOR PIPELINES

CHAINING BETWEEN EXPOSED VECTOR PIPELINES

METHOD AND APPARATUS FOR FORWARDING LITERAL GENERATED DATA TO DEPEN...

APPARATUS AND METHOD FOR MEMORY-HIERARCHY AWARE PRODUCER-CONSUMER I...

PROCESSOR WITH EXECUTION UNIT INTEROPERATION

LATER STAGE READ PORT REDUCTION

Methods and Apparatus For Attaching Application Specific Functions...

LOW POWER, HIGH PERFORMANCE, HETEROGENEOUS, SCALABLE PROCESSOR ARCH...

MULTI-CORE PROCESSOR SYSTEM, SYNCHRONIZATION CONTROL SYSTEM, SYNCHR...

LOW LATENCY VARIABLE TRANSFER NETWORK FOR FINE GRAINED PARALLELISM...

COMPUTER SYSTEMS AND METHODS FOR REGISTER-BASED MESSAGE PASSING

APPARATUS AND METHOD FOR REDUCING OVERHEAD CAUSED BY COMMUNICATION...