Word-line or row circuits

Industry

CPC
G11C13/0028

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00

Current Industry

G11C13/0028Word-line or row circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...
- Patent number 12,170,110
- Issue date Dec 17, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a split pillar architecture
- Patent number 12,171,105
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell array circuit and method of forming the same
- Patent number 12,165,705
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-I Su
- G11 - INFORMATION STORAGE
Information Patent Grant
Duo-level word line driver
- Patent number 12,165,703
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Po-Hao Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,159,666
- Issue date Dec 3, 2024
- Samsung Electronics Co., Ltd.
- Sungkyu Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level memory programming and readout
- Patent number 12,153,823
- Issue date Nov 26, 2024
- Intel Corporation
- Davide Fugazza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ReRAM memory array that includes ReRAM memory cells having a ReRAM...
- Patent number 12,154,622
- Issue date Nov 26, 2024
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal memory with program detect...
- Patent number 12,154,624
- Issue date Nov 26, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point array IHOLD read margin improvement
- Patent number 12,148,459
- Issue date Nov 19, 2024
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random-access memory (ReRAM) cell optimized for reset and...
- Patent number 12,131,777
- Issue date Oct 29, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operating method thereof
- Patent number 12,087,361
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Bilal Ahmad Janjua
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,080,347
- Issue date Sep 3, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a plurality of stacked memory cells
- Patent number 12,080,345
- Issue date Sep 3, 2024
- SK hynix Inc.
- Dong Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, integrated circuit device and method
- Patent number 12,080,346
- Issue date Sep 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for parallel set and reset of resistive random-access mem...
- Patent number 12,068,028
- Issue date Aug 20, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices with different word lines
- Patent number 12,051,464
- Issue date Jul 30, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoder architecture for memory device
- Patent number 12,051,463
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming memory
- Patent number 12,040,018
- Issue date Jul 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- I-Che Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable resistivity for lines in a memory device
- Patent number 12,040,014
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,033,681
- Issue date Jul 9, 2024
- Winbond Electronics Corp.
- Masaru Yano
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure including a cross-bar router and method
- Patent number 12,027,226
- Issue date Jul 2, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory including metal rails with balanced loading
- Patent number 12,027,204
- Issue date Jul 2, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for initializing resistive memory devices by applying vo...
- Patent number 12,027,206
- Issue date Jul 2, 2024
- Hefei Reliance Memory Limited
- Zhichao Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Program current controller and sense circuit for cross-point memory...
- Patent number 12,002,510
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Andrea Ghetti
- G11 - INFORMATION STORAGE
Information Patent Grant
Switch circuit and memory array having the same
- Patent number 11,996,148
- Issue date May 28, 2024
- Macronix International Co., Ltd.
- Hsin-Yi Ho
- G11 - INFORMATION STORAGE
Information Patent Grant
Electron beam probing techniques and related structures
- Patent number 11,996,336
- Issue date May 28, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Operation methods for ovonic threshold selector, memory device and...
- Patent number 11,990,182
- Issue date May 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hengyuan Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile static random access memory incorporating resistive ra...
- Patent number 11,984,158
- Issue date May 14, 2024
- Powerchip Semiconductor Manufacturing Corporation
- Zih-Song Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory apparatus for mitigating read disturbance and sy...
- Patent number 11,984,159
- Issue date May 14, 2024
- SK hynix Inc.
- Moo Hui Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for error count reporting with scaled error count informati...
- Patent number 11,977,444
- Issue date May 7, 2024
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMPENSATING NON-IDEALITY OF A NEUROMORPHIC MEMORY DEVICE
- Publication number 20240420762
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Benedikt Kersting
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT
- Publication number 20240422992
- Publication date Dec 19, 2024
- STMicroelectronics International N.V.
- Andrea REDAELLI
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL MEMORY DEVICE INCLUDING SELECTOR WITH VARIABLE RESISTIVE M...
- Publication number 20240422991
- Publication date Dec 19, 2024
- Samsung Electronics Co., Ltd.
- Youngsun Song
- G11 - INFORMATION STORAGE
Information Patent Application
NEURAL NETWORK COMPUTATION CIRCUIT, CONTROL CIRCUIT THEREFOR, AND C...
- Publication number 20240411520
- Publication date Dec 12, 2024
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Masayoshi NAKAYAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER...
- Publication number 20240404569
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Marcella CARISSIMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION
- Publication number 20240404594
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Marcella CARISSIMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY AND OPERATION METHOD THEREOF
- Publication number 20240386953
- Publication date Nov 21, 2024
- SK HYNIX INC.
- Kyu Sung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND READING, WRITING AND ERASING METHODS THEREOF
- Publication number 20240379158
- Publication date Nov 14, 2024
- Shanghai IC R&D Center Co., Ltd.
- Lingyi GUO
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSBAR CIRCUITS UTILIZING CURRENT-MODE DIGITAL-TO-ANALOG CONVERTERS
- Publication number 20240379140
- Publication date Nov 14, 2024
- TetraMem Inc.
- Hengfang Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE
- Publication number 20240379157
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...
- Publication number 20240371439
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- JUI-JEN WU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE
- Publication number 20240363160
- Publication date Oct 31, 2024
- Sony Semiconductor Solutions Corporation
- YOTARO MORI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD
- Publication number 20240363159
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen WU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINES
- Publication number 20240355385
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRON BEAM PROBING TECHNIQUES AND RELATED STRUCTURES
- Publication number 20240355685
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Application
SOCKET DESIGN FOR A MEMORY DEVICE
- Publication number 20240347107
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PROGRAMMING MEMORY
- Publication number 20240339156
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- I-Che Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INCLUDING METAL RAILS WITH BALANCED LOADING
- Publication number 20240331771
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...
- Publication number 20240321355
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Andrea Ghetti
- G11 - INFORMATION STORAGE
Information Patent Application
Resistance Compensation Device and Method for Storage Chip, and Sto...
- Publication number 20240304242
- Publication date Sep 12, 2024
- ZHEJIANG HIKSTOR TECHNOLOGY CO., LTD.
- Wei FANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIDEWALL STRUCTURES FOR MEMORY CELLS IN VERTICAL STRUCTURES
- Publication number 20240298553
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSBAR ARRAY DEVICE APPLICABLE TO GRAPH DATA ANALYSIS, NUEROMORPH...
- Publication number 20240298453
- Publication date Sep 5, 2024
- Seoul National University R&DB Foundation
- Cheol Seong Hwang
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...
- Publication number 20240289219
- Publication date Aug 29, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORMING OPERATION METHOD OF RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20240282371
- Publication date Aug 22, 2024
- United Microelectronics Corp.
- Yi Ting Hung
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS
- Publication number 20240268127
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE
- Publication number 20240260279
- Publication date Aug 1, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Li Chiang
- G11 - INFORMATION STORAGE
Information Patent Application
NOVEL RESISTIVE RANDOM ACCESS MEMORY DEVICE
- Publication number 20240237357
- Publication date Jul 11, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Jheng-Hong JIANG
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY APPARATUS AND OPERATING METHOD THEREOF AND MEMORY...
- Publication number 20240233819
- Publication date Jul 11, 2024
- WINBOND ELECTRONICS CORP.
- Ming-Che Lin
- G11 - INFORMATION STORAGE
Information Patent Application
IN-MEMORY COMPUTATION DEVICE HAVING AN IMPROVED CURRENT READING CIR...
- Publication number 20240212751
- Publication date Jun 27, 2024
- STMicroelectronics S.r.l
- Riccardo ZURLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORD LINE DRIVERS FOR MEMORY DEVICES
- Publication number 20240194256
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Brenton P. Van Leeuwen
- G11 - INFORMATION STORAGE

Word-line or row circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...

Memory device with a split pillar architecture

Memory cell array circuit and method of forming the same

Duo-level word line driver

Memory device

Multi-level memory programming and readout

ReRAM memory array that includes ReRAM memory cells having a ReRAM...

Differential programming of two-terminal memory with program detect...

Cross-point array IHOLD read margin improvement

Resistive random-access memory (ReRAM) cell optimized for reset and...

Memory device and operating method thereof

Differential programming of two-terminal resistive switching memory...

Memory device including a plurality of stacked memory cells

Memory device, integrated circuit device and method

Circuitry for parallel set and reset of resistive random-access mem...

Semiconductor memory devices with different word lines

Decoder architecture for memory device

Method for programming memory

Configurable resistivity for lines in a memory device

Semiconductor storage device

Structure including a cross-bar router and method

Memory including metal rails with balanced loading

Techniques for initializing resistive memory devices by applying vo...

Program current controller and sense circuit for cross-point memory...

Switch circuit and memory array having the same

Electron beam probing techniques and related structures

Operation methods for ovonic threshold selector, memory device and...

Non-volatile static random access memory incorporating resistive ra...

Nonvolatile memory apparatus for mitigating read disturbance and sy...

Methods for error count reporting with scaled error count informati...

Patents Applicationslast 30 patents

COMPENSATING NON-IDEALITY OF A NEUROMORPHIC MEMORY DEVICE

MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT

VERTICAL MEMORY DEVICE INCLUDING SELECTOR WITH VARIABLE RESISTIVE M...

NEURAL NETWORK COMPUTATION CIRCUIT, CONTROL CIRCUIT THEREFOR, AND C...

IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER...

IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION

MEMORY AND OPERATION METHOD THEREOF

MEMORY AND READING, WRITING AND ERASING METHODS THEREOF

CROSSBAR CIRCUITS UTILIZING CURRENT-MODE DIGITAL-TO-ANALOG CONVERTERS

CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE

RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...

MEMORY MODULE

MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD

SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINES

ELECTRON BEAM PROBING TECHNIQUES AND RELATED STRUCTURES

SOCKET DESIGN FOR A MEMORY DEVICE

METHOD FOR PROGRAMMING MEMORY

MEMORY INCLUDING METAL RAILS WITH BALANCED LOADING

PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY...

Resistance Compensation Device and Method for Storage Chip, and Sto...

SIDEWALL STRUCTURES FOR MEMORY CELLS IN VERTICAL STRUCTURES

CROSSBAR ARRAY DEVICE APPLICABLE TO GRAPH DATA ANALYSIS, NUEROMORPH...

METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...

FORMING OPERATION METHOD OF RESISTIVE RANDOM ACCESS MEMORY

CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS

MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE

NOVEL RESISTIVE RANDOM ACCESS MEMORY DEVICE

RESISTIVE MEMORY APPARATUS AND OPERATING METHOD THEREOF AND MEMORY...

IN-MEMORY COMPUTATION DEVICE HAVING AN IMPROVED CURRENT READING CIR...

WORD LINE DRIVERS FOR MEMORY DEVICES