Write circuits

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G11C7/1096

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1096Write circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Encoders, decoders, and semiconductor memory devices including the...
- Patent number 12,367,916
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Byongmo Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and memory system with both long and short sub word lines co...
- Patent number 12,367,945
- Issue date Jul 22, 2025
- SK Hynix Inc.
- Sang Woo Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast reference voltage training for I/O interface
- Patent number 12,367,915
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Split array architecture for analog neural memory in a deep learnin...
- Patent number 12,367,386
- Issue date Jul 22, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage of secure data in 6T SRAM cells using hot carr...
- Patent number 12,361,987
- Issue date Jul 15, 2025
- BTQ Technologies Corp.
- Zachary Irving Belateche
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,361,985
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 12,361,988
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture supporting both conventional memory access mode...
- Patent number 12,361,982
- Issue date Jul 15, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge current surge in digital compute in memory
- Patent number 12,354,657
- Issue date Jul 8, 2025
- Mediatek Inc.
- Chetan Deshpande
- G11 - INFORMATION STORAGE
Information Patent Grant
Active current consumption save mode for non-volatile memory using...
- Patent number 12,354,704
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Ke Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,347,518
- Issue date Jul 1, 2025
- Kioxia Corporation
- Shohei Asami
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface level-shifter dual-rail memory architecture
- Patent number 12,340,864
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced circuit area memory device with a half-word memory architec...
- Patent number 12,340,865
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques to mitigate memory die misalignment
- Patent number 12,327,607
- Issue date Jun 10, 2025
- Micron Technology, Inc.
- Jie Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid volatile and non-volatile memory device
- Patent number 12,327,590
- Issue date Jun 10, 2025
- RAMBUS INC.
- Scott C. Best
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wrong way read-before write solutions in SRAM
- Patent number 12,327,608
- Issue date Jun 10, 2025
- Advanced Micro Devices, Inc.
- Russell Schreiber
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system for performing a data alignment operation
- Patent number 12,327,612
- Issue date Jun 10, 2025
- SK hynix Inc.
- Hyun Seung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with scan chain testing of column redundancy logic and multi...
- Patent number 12,327,599
- Issue date Jun 10, 2025
- QUALCOMM Incorporated
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, semiconductor system, and data processing system
- Patent number 12,327,605
- Issue date Jun 10, 2025
- SK Hynix Inc.
- Yong Sang Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,327,606
- Issue date Jun 10, 2025
- Renesas Electronics Corporation
- Motoshige Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining read voltage offset in memory devices
- Patent number 12,322,473
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Robert W. Mason
- G11 - INFORMATION STORAGE
Information Patent Grant
Activate commands for memory preparation
- Patent number 12,315,593
- Issue date May 27, 2025
- Micron Technology, Inc.
- Andreas Schneider
- G11 - INFORMATION STORAGE
Information Patent Grant
Write leveling circuit applied to memory, and method and apparatus...
- Patent number 12,315,595
- Issue date May 27, 2025
- Zhiqiang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device using semiconductor element
- Patent number 12,302,548
- Issue date May 13, 2025
- Unisantis Electronics Singapore Pte. Ltd.
- Masakazu Kakumu
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for mitigating single-event-transients
- Patent number 12,294,363
- Issue date May 6, 2025
- ZERO-ERROR SYSTEMS PTE LTD
- Joseph Sylvester Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device including selective bit line and source l...
- Patent number 12,293,088
- Issue date May 6, 2025
- SK hynix Inc.
- Chan Hui Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage devices and methods of operating storage devices
- Patent number 12,288,590
- Issue date Apr 29, 2025
- Samsung Electronics Co., Ltd.
- Eun Chu Oh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transmission circuit and memory device
- Patent number 12,283,339
- Issue date Apr 22, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Xianjun Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory
- Patent number 12,277,994
- Issue date Apr 15, 2025
- Rohm Co., Ltd.
- Seiji Takenaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of operating the same
- Patent number 12,277,990
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE
- Publication number 20250240192
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Timothy M. Hollis
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250231694
- Publication date Jul 17, 2025
- SK HYNIX INC.
- Chan Hui JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY
- Publication number 20250218481
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- Yorinobu Fujino
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...
- Publication number 20250210079
- Publication date Jun 26, 2025
- SK HYNIX INC.
- Nam Hyeok JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20250210074
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR IMPROVING EFFICIENCY OF MULTI-STORAGE-ROW COM...
- Publication number 20250210078
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiaoyu Sun
- G11 - INFORMATION STORAGE
Information Patent Application
EXTENDED ADDRESS INTERFACE ACTIVATE SEQUENCE USING MODE REGISTER WRITE
- Publication number 20250201285
- Publication date Jun 19, 2025
- Micron Technology, Inc.
- Paul Philip Grahek
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...
- Publication number 20250201287
- Publication date Jun 19, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250190306
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...
- Publication number 20250182834
- Publication date Jun 5, 2025
- MEDIATEK INC.
- Tzu-Hsien Yang
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURATION MEMORY CELL
- Publication number 20250174256
- Publication date May 29, 2025
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SOURCE LINE CONTROL
- Publication number 20250174257
- Publication date May 29, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250166672
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Application
ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS
- Publication number 20250157509
- Publication date May 15, 2025
- Micron Technology, Inc.
- Alberto Troia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND COMPUTATION METHOD THEREOF
- Publication number 20250157508
- Publication date May 15, 2025
- Macronix International Co., Ltd.
- Huai-Mu Wang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...
- Publication number 20250157513
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- Sanguk Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Assemblies Comprising Memory Cells and Select Gates; and Methods of...
- Publication number 20250149072
- Publication date May 8, 2025
- Micron Technology, Inc.
- Ugo Russo
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250149073
- Publication date May 8, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Sheng CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD
- Publication number 20250139026
- Publication date May 1, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING DEVICE, MEMORY CONTROLLER, AND METHOD FOR PERFORMING AN I...
- Publication number 20250124958
- Publication date Apr 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- YU-DER CHIH
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH PROCESSING-IN-MEMORY USING TEST CI...
- Publication number 20250118386
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Shadden Kerstetter
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
- Publication number 20250118345
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20250118346
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS
- Publication number 20250118343
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIAL PASS-THROUGH TECHNIQUES FOR MEMORY DEVICE INTERFACES
- Publication number 20250118344
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Stephen Hanna
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING TIMING CONTROL CIRCUIT
- Publication number 20250118347
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Hideo Shimizu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MODULE
- Publication number 20250104744
- Publication date Mar 27, 2025
- Mitsubishi Electric Corporation
- Nobuo HASHIMOTO
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ARCHITECTURE
- Publication number 20250104747
- Publication date Mar 27, 2025
- STMicroelectronics International N.V.
- Alin RAZAFINDRAIBE
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT AND METHOD
- Publication number 20250104785
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gu-Huan LI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READ-WRITE VERIFICATION METHOD
- Publication number 20250095701
- Publication date Mar 20, 2025
- XIAMEN INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
- Meidong LIU
- G11 - INFORMATION STORAGE

Write circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Encoders, decoders, and semiconductor memory devices including the...

Memory and memory system with both long and short sub word lines co...

Fast reference voltage training for I/O interface

Split array architecture for analog neural memory in a deep learnin...

Non-volatile storage of secure data in 6T SRAM cells using hot carr...

Memory device

Adaptive write operations for a memory device

Memory architecture supporting both conventional memory access mode...

Reducing precharge current surge in digital compute in memory

Active current consumption save mode for non-volatile memory using...

Memory system

Interface level-shifter dual-rail memory architecture

Reduced circuit area memory device with a half-word memory architec...

Techniques to mitigate memory die misalignment

Hybrid volatile and non-volatile memory device

Wrong way read-before write solutions in SRAM

Semiconductor system for performing a data alignment operation

Memory with scan chain testing of column redundancy logic and multi...

Memory device, semiconductor system, and data processing system

Semiconductor device

Determining read voltage offset in memory devices

Activate commands for memory preparation

Write leveling circuit applied to memory, and method and apparatus...

Memory device using semiconductor element

Circuit for mitigating single-event-transients

Nonvolatile memory device including selective bit line and source l...

Storage devices and methods of operating storage devices

Data transmission circuit and memory device

Non-volatile memory

Memory device and method of operating the same

Patents Applicationslast 30 patents

MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE

MEMORY DEVICE AND OPERATING METHOD THEREOF

LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY

MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

SYSTEM AND METHOD FOR IMPROVING EFFICIENCY OF MULTI-STORAGE-ROW COM...

EXTENDED ADDRESS INTERFACE ACTIVATE SEQUENCE USING MODE REGISTER WRITE

NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...

SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF

MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...

CONFIGURATION MEMORY CELL

MEMORY DEVICE WITH SOURCE LINE CONTROL

MEMORY CIRCUIT AND METHOD OF OPERATING SAME

ACTIVATION FUNCTIONS FOR ARTIFICIAL INTELLIGENCE OPERATIONS

MEMORY DEVICE AND COMPUTATION METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN F...

Assemblies Comprising Memory Cells and Select Gates; and Methods of...

SEMICONDUCTOR DEVICE

MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD

COMPUTING DEVICE, MEMORY CONTROLLER, AND METHOD FOR PERFORMING AN I...

SEMICONDUCTOR MEMORY DEVICE WITH PROCESSING-IN-MEMORY USING TEST CI...

MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS

SERIAL PASS-THROUGH TECHNIQUES FOR MEMORY DEVICE INTERFACES

SEMICONDUCTOR DEVICE HAVING TIMING CONTROL CIRCUIT

SEMICONDUCTOR MODULE

NON-VOLATILE MEMORY ARCHITECTURE

NON-VOLATILE MEMORY CIRCUIT AND METHOD

MEMORY READ-WRITE VERIFICATION METHOD