ACCELERATING HIGH-LEVEL BOUNDED MODEL CHECKING

Information

  • Patent Application
  • 20070226665
  • Publication Number
    20070226665
  • Date Filed
    March 22, 2007
    17 years ago
  • Date Published
    September 27, 2007
    17 years ago
Abstract
An accelerated High-Level Bounded Model Checking method that efficiently extracts high-level information from the model, uses that extracted information to obtain an improved verification model, and applies relevant information on-the-fly to simplify the BMC-problem instances.
Description

DESCRIPTION OF THE DRAWING

Further features and advantages will become apparent with reference to the following drawing in which:



FIG. 1 is a flow diagram depicting accelerated High-Level Bounded Model Checking (BMC) according to the present invention;



FIG. 2 show state diagrams for Extended State Finite Machine Models for a) original model M, and b) transformed model M′;



FIG. 3 is a pseudo-code listing of procedure BalancePath according to the present invention;



FIG. 4(
a)-4(d) show execution steps of balancing re-convergence on example a) Reducible Flow Graph G(V,E,vi) where i represents the node vi; b) DAG G(V,Ef,v1) with edge weights (=1 if not otherwise shown) after executing BalancePath procedure; c) weights on back-edges after balancing loops; and d) final balanced flow graph after inserting n−1 NOP states for edge with weights n.


Claims
  • 1. A computer implemented method of verifying whether a correctness property of a design holds true by using a sequential model of the design having a number of reachable control states and data states, said method comprising the steps of: generating a transformed model having fewer reachable control states for at least one depth, while preserving the correctness property and the total number of reachable control states;statically determining which of the reduced number of control states are reachable at each depth in the transformed model; andperforming a verification on the transformed model using the statically determined reachable control states;determining the correctness of the model with respect to the said property.
  • 2. A computer implemented method of verifying whether a correctness property of a design holds true by using a sequential model of the design having a number of reachable control states and data states, said method comprising the steps of: statically determining information about which of the control states are reachable at each depth in the transformed model; andperforming BMC verification using the statically determined control state information to add constraints during BMC unrolling thereby simplifying the BMC problem during BMC unrolling;determining the correctness of the model.
  • 3. The method of claim 2 wherein said BMC constraints include an unreachable block constraint.
  • 4. The method of claim 2 wherein said BMC constraints include a reachable block constraint.
  • 5. The method of claim 2 wherein said BMC constraints include a mutual exclusion constraint.
  • 6. The method of claim 2 wherein said BMC constraints include a forward reachable block constraint.
  • 7. The method of claim 2 wherein said BMC constraints include a backward reachable block constraint.
  • 8. The method of claim 2 wherein said BMC constraints include a block specific invariant constraint.
  • 9. A computer implemented method of verifying whether a correctness property of a design holds true by using a sequential model of the design having a number of reachable control states and data states, said method comprising the steps of: statically determining information about which of the control states are reachable at each depth; andperforming a BMC verification on the model using the statically determined control state information such that the BMC problem size is reduced during BMC unrolling;determining the correctness of the model.
  • 10. The method of claim 9 wherein said BMC verification step includes the step of: performing BMC verification using the statically determined control state information to add constraints during BMC unrolling thereby simplifying the BMC problem.
  • 11. The method of claim 10 wherein said BMC constraints include an unreachable block constraint.
  • 12. The method of claim 10 wherein said BMC constraints include a reachable block constraint.
  • 13. The method of claim 10 wherein said BMC constraints include a mutual exclusion constraint.
  • 14. The method of claim 10 wherein said BMC constraints include a forward reachable block constraint.
  • 15. The method of claim 10 wherein said BMC constraints include a backward reachable block constraint.
  • 16. The method of claim 10 wherein said BMC constraints include a block specific invariant constraint.
  • 17. The method of claim 1 wherein said verification performing step includes the step of: performing a BMC verification on the transformed model using the statically determined control state information such that the BMC problem size is reduced during BMC unrolling.
  • 18. The method of claim 1 wherein said verification step includes the step of: performing BMC verification on the transformed model using the statically determined control state information to add constraints during BMC unrolling thereby simplifying the BMC problem during BMC unrolling.
  • 19. The method of claim 18 wherein said BMC constraints include an unreachable block constraint.
  • 20. The method of claim 18 wherein said BMC constraints include a reachable block constraint.
  • 21. The method of claim 18 wherein said BMC constraints include a mutual exclusion constraint.
  • 22. The method of claim 18 wherein said BMC constraints include a forward reachable block constraint.
  • 23. The method of claim 18 wherein said BMC constraints include a backward reachable block constraint.
  • 24. The method of claim 18 wherein said BMC constraints include a block specific invariant constraint.
  • 25. A computer implemented method of verifying whether a correctness property of a design holds true by using a sequential model of the design having a number of reachable control states and data states, said method comprising the steps of: generating a transformed model having fewer reachable control states for at least one depth, while preserving the correctness property and the total number of reachable control states;statically determining which of the reduced number of control states are reachable at each depth in the transformed model; andperforming BMC verification on the transformed model using the statically determined control state information to add constraints during BMC unrolling such that the BMC problem is reduced and simplified during BMC unrolling; anddetermining the correctness of the model with respect to the said property.
  • 26. The method of claim 25 wherein said BMC constraints include an unreachable block constraint.
  • 27. The method of claim 25 wherein said BMC constraints include a reachable block constraint.
  • 28. The method of claim 25 wherein said BMC constraints include a mutual exclusion constraint.
  • 29. The method of claim 25 wherein said BMC constraints include a forward reachable block constraint.
  • 30. The method of claim 25 wherein said BMC constraints include a backward reachable block constraint.
  • 31. The method of claim 25 wherein said BMC constraints include a block specific invariant constraint.
Provisional Applications (1)
Number Date Country
60743647 Mar 2006 US