Claims
- 1. A cell that is individually addressable by a first addressing line and a second addressing line, the cell comprising,
a substrate for supporting the cell, a polysilicon layer disposed on the substrate, the polysilicon layer for forming a resistor, the polysilicon layer for forming a diode, the polysilicon layer for connecting together the resistor and the diode, the polysilicon layer for connecting the first addressing line to the resistor, an insulating layer disposed on the polysilicon layer for insulating the polysilicon layer, the insulating layer comprising a feed through extending to the polysilicon layer, and a conducting layer disposed on the insulating layer and connected to the polysilicon layer through the feed through for connecting the second addressing line to the diode.
- 2. The cell of claim 1 wherein the polysilicon layer comprises,
a doped region serving to connect the first addressing line to the resistor.
- 3. The cell of claim 1 wherein the polysilicon layer comprises,
a doped region connected to the conducting layer, the doped region for a P-N junction of the diode in the polysilicon layer.
- 4. The cell of claim 1 wherein,
the polysilicon layer is an N− doped polysilicon layer, the polysilicon layer comprises an N+ doped region serving to connect the first addressing line to the resistor, the polysilicon layer comprises a P+ doped region connected to the conducting layer, the P+ doped region interfaces with remaining portions of the N− polysilicon layer for forming a P-N junction of the diode in the polysilicon layer.
- 5. The cell of claim 1 wherein the insulating layer is a silicon oxide insulating layer.
- 6. The cell of claim 1 wherein the conducting layer is a metal conducting layer.
- 7. The cell of claim 1 further comprising,
a fuel layer comprising combustible fuel in proximity to the resistor, the resistor being heated when conducting current when an ignition voltage is applied across the first and second addressing line so as to address the cell and ignite the combustible fuel.
- 8. The cell of claim 6 wherein the insulating layer is a first insulating layer, the cell further comprising,
a second insulating layer disposed between the fuel layer and the conducting layer.
- 9. The cell of claim 1 wherein,
the cell comprises multiple elements, the feed through comprises respective multiple feed throughs in the insulation layer, and the polysilicon layer comprises a pad portion for supporting the multiple elements, the multiple elements each comprise the resistor and the diode, the resistor is formed from respective multiple resistors in the pad portion serving to connect the respective multiple resistors to the first addressing line through the pad portion, the diode is formed from respective multiple diodes connected to the conducting layer.
- 10. The cell of claim 9 wherein,
the multiple elements comprise the respective multiple feed throughs, the respective multiple resistors and the respective multiple diodes, the multiple elements are arranged in a matrix, and the conducting layer comprises conducting fingers each connected to a plurality of elements aligned within the matrix.
- 11. An array of cells individually addressable by row addressing lines and by column addressing lines, the cell comprising,
a substrate for supporting the array of cells, a polysilicon layer disposed on the substrate, the polysilicon layer for forming an array of resistors for the respective cells, the polysilicon layer for forming an array of diodes for the respective cells, the polysilicon layer for connecting together the array of resistors and the array of diodes, the polysilicon layer for forming and respectively connecting the row addressing lines to the array of resistors, an insulating layer disposed on the polysilicon layer for insulating the polysilicon layer, the insulating layer comprising an array of feed throughs extending to the polysilicon layer, and a conducting layer disposed on the insulating layer for forming the column addressing lines respectively connected to the polysilicon layer through the array of feed throughs for respectively connecting the column addressing lines to the array of diodes.
- 12. The array of cells of claim 11, wherein,
the polysilicon layer is an N− doped polysilicon layer, the polysilicon layer comprises an array of N+ doped regions serving to respectively connect the row addressing lines to the array of resistors, and the polysilicon layer comprises an array of P+ doped regions connected to the conducting layer, the array of P+ doped region interfaces with remaining portions of the N− polysilicon layer for forming an array of P-N junctions of the array of diodes in the polysilicon layer.
- 13. The array of cells of claim 11 wherein,
the insulating layer is an oxide layer, and the conducting layer is a metal layer.
- 14. The array of cells of claim 11, wherein,
each of the cells comprise multiple elements, each of the respective feed throughs comprise respective multiple feed throughs in the insulation layer, and the polysilicon layer comprises multiple pad portions for each of the cells, each of multiple pad portions for supporting the multiple elements, the multiple elements comprise the respective resistor and the respective diode for the respective cell, the respective resistor is formed from respective multiple resistors in the pad portion serving to connect the respective multiple resistors to the respective row addressing line through the pad portion, the respective diode is formed from respective multiple diodes connected to the respective column addressing line of the conducting layer.
- 15. The array of cells of claim 14 wherein,
the multiple elements are arranged in a matrix, and the conducting layer comprises conducting fingers each connected to a plurality of elements of the multiple elements, the plurality of elements being aligned within the matrix.
- 16. An array of fuel cells individually addressable by row addressing lines and by column addressing lines, the array of fuel cells for forming microthruster, the array of fuel cells comprising,
a substrate for supporting the cell, a polysilicon layer disposed on the substrate, the polysilicon layer for forming an array of resistors for the respective cells, the polysilicon layer for forming an array of diodes for the respective cells, the polysilicon layer for connecting together the array of resistors and the array of diodes, the polysilicon layer for respectively connecting the row addressing lines to the array of resistors, an insulating layer disposed on the polysilicon layer for insulating the polysilicon layer, the insulating layer comprising an array of feed throughs extending to the polysilicon layer, a conducting layer disposed on the insulating layer for forming the column addressing lines and respectively connected to the polysilicon layer through the array of feed throughs for connecting the second addressing lines to the array of diodes, and a fuel layer comprising an array of fuel packets containing combustible fuel in respective proximity to the array of resistors, the array of resistors being respectively heated when conducting current when an ignition voltage is applied across a respective one of the row addressing lines and a respective one of the column addressing lines so as to address a respective one cell of the array of cells, igniting a respective one of the array of fuel packets.
- 17. The array of cells of claim 16 wherein,
the polysilicon layer is an N− doped polysilicon layer, the polysilicon layer comprises an array of N+ doped regions serving to respectively connect the row addressing lines to the array of resistors, and the polysilicon layer comprises an array of P+ doped regions connected to the conducting layer, the array of P+ doped region interfaces with remaining portions of the N− polysilicon layer for forming an array of P-N junctions of the array of diodes in the polysilicon layer.
- 18. The array of cells of claim 15 wherein,
the insulating layer is an oxide layer, and the conducting layer is a metal layer.
- 19. The array of cells of claim 15 wherein,
each of the cells comprises multiple elements, each of the respective feed throughs comprises respective multiple feed throughs in the insulation layer, and the polysilicon layer comprises multiple pad portions for each of the cells, each of multiple pad portions for supporting the multiple elements, the multiple elements comprise the respective resistor and the respective diode for the respective cell, the respective resistor is formed from respective multiple resistors in the pad portion serving to connect the respective multiple resistors to the respective row addressing line through the pad portion, the respective diode is formed from respective multiple diodes connected to the respective column addressing line of the conducting layer.
- 20. The array of cells of claim 16 wherein,
the multiple elements are arranged in a matrix, and the conducting layer comprises conducting fingers each connected to a plurality of elements of the multiple elements, the plurality of elements being aligned within the matrix.
REFERENCE TO RELATED APPLICATION
[0001] The present application is related to applicant's copending application entitled Diode Isolated Thin Film Array Addressing Method, Ser. No. xx/xxx,xxx, filed yy/yy/yy, by the same inventors.
STATEMENT OF GOVERNMENT INTEREST
[0002] The invention was made with Government support under contract No. F04701-93-C-0094 by the Department of the Air Force. The Government has certain rights in the invention.
Continuations (1)
|
Number |
Date |
Country |
Parent |
09660136 |
Sep 2000 |
US |
Child |
10081559 |
Feb 2002 |
US |