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GPHYSICS G11Information storage G11CSTATIC STORES G11C8/00Arrangements for selecting an address in a digital store

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Patents Grantslast 30 patents

Information Patent Grant
Nonvolatile memory device, read method for nonvolatile memory devic...
- Patent number RE50501
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Chul Bum Kim
Information Patent Grant
Split array architecture for analog neural memory in a deep learnin...
- Patent number 12,367,386
- Issue date Jul 22, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for controlling power assertion in a memory device
- Patent number 12,367,917
- Issue date Jul 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with external clock synchronized operation
- Patent number 12,361,990
- Issue date Jul 15, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory chip and operating method thereof
- Patent number 12,361,993
- Issue date Jul 15, 2025
- AU OPTRONICS CORPORATION
- Hsiang-Chi Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse address decoding circuit, operation method, and memory
- Patent number 12,362,025
- Issue date Jul 15, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Rumin Ji
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Word line structures for three-dimensional memory arrays
- Patent number 12,354,707
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Stephen W. Russell
- G11 - INFORMATION STORAGE
Information Patent Grant
Command address control circuit, and semiconductor apparatus and se...
- Patent number 12,354,687
- Issue date Jul 8, 2025
- SK hynix Inc.
- Ji Hwan Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface level-shifter dual-rail memory architecture
- Patent number 12,340,864
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method for preforming emphasis driving
- Patent number 12,340,868
- Issue date Jun 24, 2025
- Samsung Electronics Co., Ltd.
- Baek Jin Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, drive method, memory system, and electronic device
- Patent number 12,300,306
- Issue date May 13, 2025
- Yangtze Memory Technologies Co., Ltd.
- Danyang Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and memory system
- Patent number 12,300,353
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Seung-Jun Shin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and method of operating same
- Patent number 12,266,424
- Issue date Apr 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Ching Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-deck non-volatile memory architecture with reduced terminatio...
- Patent number 12,254,946
- Issue date Mar 18, 2025
- Intel Corporation
- William K. Waller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arithmetic devices for neural network
- Patent number 12,254,283
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power management for on-chip memory
- Patent number 12,243,622
- Issue date Mar 4, 2025
- ARM Limited
- Edward Martin McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-dimensional (3-D) write assist scheme for memory cells
- Patent number 12,237,050
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chieh Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Address signal transmission circuit, address signal transmission me...
- Patent number 12,224,039
- Issue date Feb 11, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kangling Ji
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Command-differentiated storage of internally and externally sourced...
- Patent number 12,189,523
- Issue date Jan 7, 2025
- RAMBUS INC.
- Thomas J. Sheffler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deferred fractional memory row activation
- Patent number 12,190,990
- Issue date Jan 7, 2025
- RAMBUS INC.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared decoder circuit and method
- Patent number 12,183,432
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- XiuLi Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,176,062
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- He-Zhou Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and electronic device
- Patent number 12,170,125
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Yu Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory circuit and method
- Patent number 12,165,722
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Gu-Huan Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port semiconductor memory and first in first out (FIFO) memory...
- Patent number 12,156,397
- Issue date Nov 26, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data output control circuit and semiconductor device including the...
- Patent number 12,154,658
- Issue date Nov 26, 2024
- SK Hynix Inc.
- Kwang Soon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal sampling circuit and semiconductor memory device
- Patent number 12,148,461
- Issue date Nov 19, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zequn Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address scheduling methods for non-volatile memory devices with thr...
- Patent number 12,147,340
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Chi Weon Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device comprising electrically floating body transistor
- Patent number 12,094,526
- Issue date Sep 17, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE AND METHOD OF CONTROLLING EQUIVALENT RESISTANCE OF BI...
- Publication number 20250239279
- Publication date Jul 24, 2025
- United Microelectronics Corp.
- Chin-Hsun Yeh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250226017
- Publication date Jul 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Ching LIU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND CIRCUITRY FOR HANDLING DEFECTIVE MEMORY CELLS AND WORDLI...
- Publication number 20250226052
- Publication date Jul 10, 2025
- Piecemakers Technology, Inc.
- Ming-Hung Wang
- G11 - INFORMATION STORAGE
Information Patent Application
STACK MEMORY DEVICES COMMUNICATING VIA PACKETS
- Publication number 20250182803
- Publication date Jun 5, 2025
- SK HYNIX INC.
- Choung Ki SONG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...
- Publication number 20250182834
- Publication date Jun 5, 2025
- MEDIATEK INC.
- Tzu-Hsien Yang
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR WRITING STATE INTO SUPERCONDUCTING CIRCUITS...
- Publication number 20250174270
- Publication date May 29, 2025
- William Robert Reohr
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS
- Publication number 20250166681
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Chieh CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH FLYING DECORDER LINES AND METHODS FOR OPERATING...
- Publication number 20250166680
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yen-Hsiang Huang
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND-DIFFERENTIATED STORAGE OF INTERNALLY AND EXTERNALLY SOURCED...
- Publication number 20250165387
- Publication date May 22, 2025
- Rambus Inc.
- Thomas J. Sheffler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20250157503
- Publication date May 15, 2025
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250149076
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20250140294
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES, OPERATION METHODS THEREOF, AND MEMORY SYSTEMS
- Publication number 20250131950
- Publication date Apr 24, 2025
- Yangtze Memory Technologies Co., Ltd.
- Guangyu Bai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250124959
- Publication date Apr 17, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SYSTEM ON CHIP USING THE...
- Publication number 20250104752
- Publication date Mar 27, 2025
- Earth Top International Enterprises Ltd.
- TSAI-CHUNG YU
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT AND METHOD
- Publication number 20250104785
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gu-Huan LI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250078885
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- He-Zhou WAN
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL-SHIFTER HAVING A WIDE OPERATING RANGE, A FAST OUTPUT FALL DEL...
- Publication number 20240405776
- Publication date Dec 5, 2024
- NVIDIA Corporation
- Stefan P. Sywyk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Device Comprising Electrically Floating Body Transistor
- Publication number 20240404585
- Publication date Dec 5, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G11 - INFORMATION STORAGE
Information Patent Application
Decoder Circuits Using Shared Transistors for Low-Power, High-Speed...
- Publication number 20240386931
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yorinobu Fujino
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE PAGE SIZE ARCHITECTURE
- Publication number 20240347088
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED SEMICONDUCTOR DEVICE
- Publication number 20240339134
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Jae Hyung PARK
- G11 - INFORMATION STORAGE
Information Patent Application
POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...
- Publication number 20240312500
- Publication date Sep 19, 2024
- SK HYNIX INC.
- Mino KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20240282346
- Publication date Aug 22, 2024
- Samsung Electronics Co., LTD
- Sanghak SHIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CHIP AND OPERATING METHOD THEREOF
- Publication number 20240265956
- Publication date Aug 8, 2024
- AU OPTRONICS CORPORATION
- Hsiang-Chi CHENG
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...
- Publication number 20240257891
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Ji Hwan PARK
- G11 - INFORMATION STORAGE
Information Patent Application
THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES
- Publication number 20240237364
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING MULTILEVEL COMMAND AND ADDRESS SI...
- Publication number 20240221800
- Publication date Jul 4, 2024
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY DECODING AND INTERCONNECTS
- Publication number 20240185892
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY SUPPORTING A DYNAMICALLY VARIABLE DURAT...
- Publication number 20240170032
- Publication date May 23, 2024
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Nonvolatile memory device, read method for nonvolatile memory devic...

Split array architecture for analog neural memory in a deep learnin...

Systems and methods for controlling power assertion in a memory device

Memory with external clock synchronized operation

Memory chip and operating method thereof

Anti-fuse address decoding circuit, operation method, and memory

Word line structures for three-dimensional memory arrays

Command address control circuit, and semiconductor apparatus and se...

Interface level-shifter dual-rail memory architecture

Semiconductor device and method for preforming emphasis driving

Memory, drive method, memory system, and electronic device

Memory device and memory system

Memory circuit and method of operating same

Multi-deck non-volatile memory architecture with reduced terminatio...

Arithmetic devices for neural network

Dynamic power management for on-chip memory

Three-dimensional (3-D) write assist scheme for memory cells

Address signal transmission circuit, address signal transmission me...

Memory device for supporting command bus training mode and method o...

Command-differentiated storage of internally and externally sourced...

Deferred fractional memory row activation

Shared decoder circuit and method

Memory device

Memory device and electronic device

Non-volatile memory circuit and method

Dual-port semiconductor memory and first in first out (FIFO) memory...

Data output control circuit and semiconductor device including the...

Signal sampling circuit and semiconductor memory device

Address scheduling methods for non-volatile memory devices with thr...

Memory device comprising electrically floating body transistor

Patents Applicationslast 30 patents

MEMORY DEVICE AND METHOD OF CONTROLLING EQUIVALENT RESISTANCE OF BI...

MEMORY CIRCUIT AND METHOD OF OPERATING SAME

METHOD AND CIRCUITRY FOR HANDLING DEFECTIVE MEMORY CELLS AND WORDLI...

STACK MEMORY DEVICES COMMUNICATING VIA PACKETS

MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...

METHODS AND SYSTEMS FOR WRITING STATE INTO SUPERCONDUCTING CIRCUITS...

THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS

MEMORY DEVICES WITH FLYING DECORDER LINES AND METHODS FOR OPERATING...

COMMAND-DIFFERENTIATED STORAGE OF INTERNALLY AND EXTERNALLY SOURCED...

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

SHARED DECODER CIRCUIT AND METHOD

MEMORY DEVICES, OPERATION METHODS THEREOF, AND MEMORY SYSTEMS

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SYSTEM ON CHIP USING THE...

NON-VOLATILE MEMORY CIRCUIT AND METHOD

MEMORY DEVICE

LEVEL-SHIFTER HAVING A WIDE OPERATING RANGE, A FAST OUTPUT FALL DEL...

Memory Device Comprising Electrically Floating Body Transistor

Decoder Circuits Using Shared Transistors for Low-Power, High-Speed...

VARIABLE PAGE SIZE ARCHITECTURE

STACKED SEMICONDUCTOR DEVICE

POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME

MEMORY CHIP AND OPERATING METHOD THEREOF

COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...

THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES

APPARATUSES AND METHODS INCLUDING MULTILEVEL COMMAND AND ADDRESS SI...

MEMORY ARRAY DECODING AND INTERCONNECTS

STATIC RANDOM ACCESS MEMORY SUPPORTING A DYNAMICALLY VARIABLE DURAT...