A claim of priority is made to Korean Patent Application No. 10-2005-0064769, filed on Jul. 18, 2005, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field
Example embodiments relate to an apparatus and method for electrically testing semiconductor packages. For example, example embodiments may relate to an apparatus, a customer tray, and method for conducting a parallel direct current (DC) test on semiconductor packages in-tray or in-situ prior to a burn-in test.
2. Description of the Related Art
Semiconductor packages, for example, memories devices, may go through quality control electrical and/or reliability tests. A burn-in test, which is a type of reliability test, may be used to initially screen defective semiconductor packages.
Generally, semiconductor packages with DC characteristic defects may be detected and removed after a pre-burn-in test. If not, defective semiconductor packages may potentially damage normal adjacent semiconductor packages during a burn-in board test.
Referring to
Electrical test equipment, for example, a handler, may include a pick-and-place tool 10. The pick-and-place tool 10 may further include multiple (for example, four) vacuum suction units 12 for picking up a semiconductor package from the customer tray and transferring the semiconductor packages to a buffer region (S30). The four vacuum suction units 12 may insert semiconductor packages into a plurality of sockets connected to a test board of a tester. A direct current (DC) test may be conducted on the semiconductor packages (S40).
The pick-and-place tool 10 of
As described above, according to the conventional electrical test method, the semiconductor packages in the customer tray may be picked up by a pick-and-place tool in multiple units (for example, four) and inserted into sockets of a test board. Hence, it may take considerable amount time to conduct an electrical test on all the semiconductor packages.
Example embodiments may provide an apparatus for simultaneously conducting a direct current (DC) test on semiconductor packages in an in-tray state, by connecting the semiconductor packages to a plurality of sockets on a test board, thereby enhancing test efficiency.
In an example embodiment, electrical test equipment for testing semiconductor packages may include a loading site configured to receive a customer tray having a plurality of semiconductor packages therein, a test site configured to align the customer tray, and also configured to test all the plurality of semiconductor packages in the customer tray in-situ, a sorting site configured to sort the tested plurality of semiconductor packages in the customer tray, and an unloading site configured to unload the sorted plurality of semiconductor packages in the customer tray.
In another example embodiment, a customer tray used in electrical test equipment for testing semiconductor packages may be configured to hold a plurality of semiconductor packages, the body including a plurality of pockets having an opening therein, and the opening configured to hold one of the plurality of semiconductor packages during an in-tray or in-situ testing.
In another example embodiment, a method of testing semiconductor packages may include loading a plurality of semiconductor packages into a customer tray, connecting the plurality of semiconductor packages in the customer tray to a test board by pressing the plurality of semiconductor packages onto the test board, testing all the semiconductor packages in the customer tray in-situ, removing defective semiconductor packages from the customer tray, and unloading non-defective semiconductor packages from the customer tray.
Example embodiments may become more apparent by the description of the detail example embodiments thereof with reference to the attached drawings in which:
Example embodiments will now be described more fully with reference to the accompanying drawings. Embodiments may, however, be embodied in many different forms and should not be construed as being limited to the example embodiments set forth therein; rather, these example embodiments are provided as working examples.
It will be understood that when an element or layer is referred to as being “on”, “connected to” or “coupled to” another element or layer, it may be directly on, connected or coupled to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,” “directly connected to” or “directly coupled to” another element or layer, there may be no intervening elements or layers present. Like numbers refer to like elements throughout. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatially relative terms, such as “beneath”, “below”, “lower”, “above”, “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. As used herein, the singular forms “a”, “an” and “the” may be intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Example embodiments of the present invention are described herein with reference to cross-section illustrations that may be schematic illustrations of idealized embodiments (and intermediate structures) of the present invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the example embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Referring to
In electrical test equipment 100, the customer tray 102 may be introduced to a loading site, and transferred to a test site for connection with a tester. The semiconductor packages may be connected to a plurality of sockets 114 on a test board 112 of the tester using a presser 116(S120). See
A parallel direct current (DC) test may be conducted on the semiconductor packages in the customer tray 102 (S130). While up to four semiconductor packages at a time may be electrically tested in the conventional electrical test method, all the semiconductor packages in the customer tray 102 may be electrically tested simultaneously in the electrical test method of an example embodiment. 8×10 or 12×16 semiconductor packages may be held in the customer tray 102 depending on the size of semiconductor packages.
When the parallel DC test is completed, the customer tray 102 may be transferred to a sorting site where the semiconductor packages in the customer tray 102 may be sorted into defective and non-defective semiconductor packages (S140). Defective semiconductor packages may be transferred to another customer tray 104. Semiconductor packages may be unloaded from the electrical test equipment 100 at an unloading site (S150).
Referring to
The customer tray 102 may include a plurality of pockets 50; each of the plurality of pockets 50 may hold a semiconductor package. Each semiconductor package may include solder balls 132 at a lower portion thereof. Openings (not shown) may be formed at a bottom surface of each of the pockets 50 such that the solder balls 132 of each semiconductor package may correspond and connect to the socket 114 on the test board 112. A pair of wing-shaped handles 52 may be formed at opposite ends of the customer tray 102 and may be used to transfer the customer tray 102. Slip locks 54 may be formed at each corners of the customer tray 102. Accordingly, when the customer trays 102 are stacked, semiconductor packages in the pockets 50 thereof may be protected.
It should be understood that there may be several tray alignment units 120, for example 4 or 8, and the customer tray 102 may be aligned in various ways.
A plurality of pocket grooves 136 may be formed at bottom surfaces of pockets 50 of the customer tray 102. In addition, a plurality of pocket position alignment units 134 corresponding to the pocket grooves 136 may be formed on the test board 112. Therefore, the customer tray 102 may be aligned by the tray position alignment unit 120 of
As described above, according to example embodiments of the present invention, a parallel DC test may be conducted on semiconductor packages in an in-tray state. In other words, the semiconductor packages may be tested without being removed from a customer tray. Hence, the efficiency of a pre-burn-in test and productivity may be improved. Further, since semiconductor packages may be electrically tested while they are in the customer tray, the semiconductor packages may have reduced visual defects caused by physical damage during an electrical test.
While example embodiments have been particularly shown and described, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from scope of the present following claims.
Number | Date | Country | Kind |
---|---|---|---|
10-2005-0064769 | Jul 2005 | KR | national |