Patent Application
20150042370
An electronic load is often used in the testing of power supplies, batteries, and fuel cells. Such an electronic load is advantageous as it can simulate numerous types of electrical characteristics on the device being tested. An appropriate electronic load may consist of multiple transistors connected in parallel and sharing current equally.
A transistorized electronic load system simulates the current drawn by a device on an electronic power source by using the current control capacity of a field effect transistor (FET). A field effect transistor is an elemental electrical device where the current through the device is controlled by the voltage applied to a specific terminal. An FET-based electronic load may generally consist of a set of FETs mounted in parallel which are controlled by adjusting the gate voltage to produce the desired current flow through the system.
However, a problem can exist when one or more transistors fail, and the current is now shared by a smaller number of transistors. The additional current through each transistor may result in additional heat leading to numerous transistor failures in a cascade effect. Accordingly, for reliability purposes, it is desirable to be able to automatically detect a transistor failure in the load circuit and to reduce or remove any applied circuit as applicable.
Electronic load systems utilizing FETs are known in the prior art. For example, U.S. Pat. Nos. 6,324,042 and 6,697,245, both to Andrews, disclose an electronic load for testing electrochemical energy conversion devices. These patents disclose a device in which analog and digital feedback is provided to adjust the control signal to the FETs to ensure that each remains within its individual safe operating area.
While the prior load systems provide feedback about the operation of FETs in a load system, they do not provide for automatic detection of an FET failure, in particular if the FET has failed to an open state.
The present invention was developed in order to overcome these and other drawbacks of the prior electronic load systems by providing a system that is able to automatically detect a transistor failure in the load circuit.
Accordingly, it is a primary object of the invention to provide an electronic load system that is able to automatically detect a transistor failure in the load circuit, particularly where the transistor fails to an open state. Such an electronic load system in accordance with embodiments of the invention includes a first field effect transistor (FET) module and a second FET module coupled in parallel. The system further includes a positive terminal for connecting to the positive output of the power source to be tested. The positive terminal is connected in parallel to a source terminal of the first and second FET modules. The system also includes a negative terminal for connecting to the negative output of the power source and, in parallel, to a drain terminal of the FET modules. A processor module is connected to the FET modules and applies an external drive signal to the modules.
Each FET module includes an FET and a differential amplifier. The external drive signal from the processor module serves as an input to the amplifier. The amplifier's output is connected to the gate terminal of the FET, and in parallel to the anode of a diode. The FET module also includes a light emitting diode (LED). The FET differential amplifier, diode and light emitting diode are so arranged that the light emitting diode lights when the field effect transistor fails as an open circuit.
A further embodiment of the invention provides a load device for applying a load on a power source including an FET module. The FET module of this embodiment comprises an FET, a first differential amplifier and a second differential amplifier. The first differential amplifier has an external drive signal as an input and an output connected to a gate terminal of the FET. The second differential amplifier has an input connected to the cathode of a diode. The diode is, in turn, connected to the output of the first differential amplifier in parallel with the gate terminal of the FET. A light emitting diode is connected to the output of the second differential amplifier.
In further embodiments of the invention, the processor module includes a digital to analog converter. Embodiments may also include a communication bus that connects the processor module with a computer network interface and/or a manual control interface.
Other objects and advantages of the invention will become apparent from a study of the following specification when viewed in the light of the accompanying drawing, in which:
In an embodiment of the present invention, a transistorized electronic load system simulates the current drawn by a device on an electronic power source by using the current control capacity of a field effect transistor (FET). An FET is an elemental electrical device where the current through the FET is controlled by the voltage applied to a specific terminal.
As shown in
I
drain=Constant*Vgate [Eq. 1]
In embodiments of the invention, the gate terminal 18 may be connected to a digital to analog converter 20 that provides the gate voltage (Vgate) to the gate terminal 18. In this manner, the current 12 across the source 14 and drain 16 terminals can be controlled. The digital to analog converter 20 may be connected to a processor by a bus 22.
As shown in
As further illustrated in
V
gate=Constant*Vbinary [Eq. 2]
Combining Eq. 1 with Eq. 2, it can be seen that the current across an FET 10 is proportional to the binary digital pattern:
I
drain=Constant*Vbinary [Eq. 3]
As discussed above, the user may control the applied load current 112 using a processor connected to a computer network interface 124. Alternatively, the user may control the current 112 through the use of a manual control interface 128 that is also connected to the communication bus 126, or which may be connected directly to the processor module.
Embodiments of the present invention include a circuit capable of automatically detecting a failed FET device.
Embodiments also include a differential amplifier 240. In the embodiment illustrated in
Embodiments of the invention may also include a diode 248. The anode of the diode is connected to the output of the first amplifier 240 in parallel with the gate terminal 218 of the FET device 210. The cathode of the diode 248 is connected to the inverting input (−) 254 of a second amplifier 250, which is also connected to ground. A 15 volt DC power supply is also applied across the second amplifier. In the illustrated embodiment, the non-inverting input (+) 252 of the second amplifier is connected to a +15 VDC reference voltage 258. The output 256 of the second amplifier 250 is connected to the cathode of a light emitting diode (LED) 260. A +15 VDC voltage is applied to the cathode of the LED. Further resistors and other components may be employed as shown in
An embodiment of the circuit illustrated in
In an alternative embodiment, the inverting input 254 of amplifier 250 is connected to the parallel combination of several different diodes 248, each of which is connected to the gate voltage 218 of an individual transistor 210. In addition the LED indicator 260 may be optically coupled to a logic input on the electronic load system's processor interface.
While the preferred forms and embodiments of the invention have been illustrated and described, it will be apparent to those of ordinary skill in the art that various changes and modifications may be made without deviating from the inventive concepts set forth above.
