Claims
- 1. A tiered power regulation system comprising:an intermediate power regulator; and a regulator array comprising a plurality or power regulators, wherein at least a portion of said plurality of power regulators are coupled to a common voltage source, wherein said plurality of power regulators is configured to couple to a plurality of portions of a microprocessor, and at least one of said regulators is configured to provide power to the microprocessor at a rate greater than about 500 MHz.
- 2. The tiered power regulation system of claim 1, wherein said intermediate power regulator is a switching regulator.
- 3. The tiered power system of claim 1, wherein at least one of said plurality of regulators is a linear power regulator.
- 4. The tiered power regulation system of claim 1, wherein said regulator array is coupled to said microprocessor using bump technology.
- 5. The tiered power regulation system of claim 1, wherein said regulator array is formed using a compound semiconductor substrate.
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority to United States Provisional Application Ser. No. 60/178,421, filed Jan. 27, 2000, entitled “Apparatus for Regulating Power to an Integrated Circuit.”
US Referenced Citations (16)
Foreign Referenced Citations (1)
Number |
Date |
Country |
0 922 636 |
Jun 1999 |
EP |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/178421 |
Jan 2000 |
US |