Patent Application
20090040595
The invention relates to an array of spatial light modulators and a method of production of a spatial light modulator device. More specifically, it relates to arrays of spatial light modulators as can be used in maskless lithography systems.
For the production of semiconductor devices, lithographic technologies are used. The most common approaches are based on the step-principle or on the step-and-scan-principle. Both approaches are working with masks providing the structure to be projected onto a substrate. The masks have to show a high degree of accuracy and are very expensive.
To avoid such high costs, especially for testing and producing only small numbers of semiconductor devices of one structure, so-called maskless lithography has been developed. Instead of masks, programmable spatial light modulators (SLMs) are used. This technology is explained in detail in U.S. Pat. No. 6,312,134 B1, which is herein incorporated by reference. Possible SLMs are for example deformable micro-mirror devices for working in the reflection mode or liquid crystal light valves for working in the transmission mode.
A SLM comprises a multitude of units like deformable mirror-devices or liquid crystal light valves, each corresponding to a pixel of the structure to be illuminated. Every pixel can be switched between the two states, i.e. illuminating or not illuminating the corresponding point on the wafer surface. Some SLMs have units with also an intermediate state, illuminating the corresponding point on the substrate surface with an intermediate intensity.
The digitalized structure to be projected is provided by a control unit, that controls every pixel and can switch the corresponding unit into the necessary state. If the structure to be projected is changed, the states of the units of the SLM are changed, too, where necessary.
For larger structures or multiple simultaneous projection of a structure on a substrate, a plurality of SLMs have to be arranged in a planar configuration with very tight specifications in terms of x- and y-position and planarity.
The known approach for meeting these specifications is based on using sophisticated combinations of transducers and multiple stages.
It is an object of the present invention to provide an easy to handle array of SLMs that is easy to produce.
In a first aspect of the present invention, there is provided a method for the production of a SLM device, comprising the step of mounting a spatial light modulator on a substrate of the same material as the main material of the SLM array to be juxtaposed with the substrate. Particularly, silicon based SLMs are mounted on a silicon substrate.
A SLM device may comprise a single or a plurality of SLMs, leading to an array of SLMs. The present invention is independent of the number of SLMs used and works as well for a single SLM array as for a plurality of SLMs.
The special choice of the substrate material leads to a perfect thermal match of substrate and SLM. This is a very important step in achieving the severe specifications with respect to position and planarity for use in a maskless lithography system. During illumination of the SLM device, impinging photons deposit energy in the SLM device inducing a substantial thermal load. Different coefficients of thermal expansion of the substrate and the SLMs would lead to major deformations of the SLM device, thus making it eventually impossible to reach the specifications. By selecting the substrate material to match the material of the SLMs, specifically the main material to be juxtaposed with the substrate, e.g. a carrier substrate of the SLM itself, both substrate and SLM behave in the same way, when heated, such that only a scale effect with respect to x- and y-positions has to be taken into account during illumination, but no deformations.
In preferred embodiments of the present invention, the SLM is mounted by using surface mount technology, preferably by soldering. This has the advantage, especially if using a solder with high surface tension, that the self-aligning effect of solder during reflow due to minimizing the surface energy of the solder provides SLM devices of low variation with respect to position and planarity. This helps meeting the severe specifications and lowers production cost.
In preferred embodiments of the present invention, the substrate is preformed to provide it with an opening for exposing the SLM. Preferably, only one side of the substrate is provided with the infrastructure for the SLM such as electronic circuits, connectors etc. The other side can be processed to be optimized for optical use like having a defined reflection or absorption characteristic.
Both measures arc especially useful, when arranging the SLM in a flip-chip geometry. Then, the optically active side of the SLM is oriented such that it is exposed to the light, when being illuminated, as well as the side of the substrate optimized for optical use, while all the infrastructure is on the other side of the substrate. This has the advantage, that the infrastructure is not endangered by the light, particularly when using deep ultra-violet light, and that the infrastructure does not impede a correct illumination e.g. by generating stray light.
In a further aspect of the present invention, an array of SLMs on a substrate is provided, wherein the substrate is of the same material as the main material of the SLMs to be juxtaposed with the substrate. The SLMs may be mounted on the substrate by means of solder-defined self-aligning connections and/or be arranged in flip-chip geometry, the substrate laving openings for exposing the SLMs, the infrastructure for the SLMs being provided on one side of the substrate, while the other side has a defined reflection or absorption function.
In a last aspect to the present invention, a maskless lithography system with such an array of SLMs is provided.
A detailed description of the invention is provided below. Said description is provided by way of a non-limiting example to be read with reference to the attached drawings in which:
a,b show a solder connection before and after reflow;
It will be noted, that the described method works not only for a single SLM, but also for two, three, or a plurality of SLMs.
Once the substrate material is chosen, in a next step 102, the side of the substrate opposite to the light side (so-called dark side) is provided with all the necessary infrastructure for the SLM, e.g. flex connections, preamplifiers, electrical circuitry, thin film interconnects, connection pads, microconnectors etc. Some components have to be quite near to the SLM like preamplifiers, whereas other components can be farther away and connected with the SLM by thin film interconnects and/or flex connectors.
Following the pre-forming and preprocessing of the substrate, the substrate is pre-formed (step 103) to provide it with an opening corresponding to the size of the optically active surface of the SLM to be used, and preprocessed to provide one side of the substrate (so-called light side) with a finishing layer for providing defined absorption or reflection characteristics. Preferably, the finishing layer is an anti-reflection layer, such as for example a chromium oxide layer as is used on photomasks. Another advantageous possibility is to use a UV light absorbing layer, especially an absorbing polymer layer as is used in integrated circuit fabrication processes.
Then, the actual mounting of the SLM on the substrate can take place. In step 104, the solder lands are accurately defined and the solder bumps carefully controlled, before placing substrate and SLM accurately together in step 105. The solder lands or solderable interconnect pads are defined on both the substrate and the carrier substrate of the SLM, whereas the solder bumps are placed only on the solder lands of either the substrate or the SLM. Solder lands are accurately defined by etching windows in e.g. a silicon nitride passivation layer on the substrate, using photolithography and reactive ion etching. Preferably, a solder with high surface tension is used. Very much preferred are solders, which have a high tin content.
The last step 106 is the reflow leading to self-alignment of the SLM with respect to the substrate. One possible reflow process could be the following: First, the SLM device is preheated to gradually heat it up. The device is then kept at a temperature near to the temperature at which solder bonding can occur till all parts of the SLM device have reached the same temperature. The actual reflow is, when the device is heated to a temperature above the melting point of the solder for bonding. Afterwards, the SLM device is cooled evenly to avoid thermal shock. The reflow process may occur in an inert or eventually reducing atmosphere, in order to prevent oxidation of the solder bumps, which in turn would hamper the self-aligning process.
The self-alignment during reflow is illustrated in more detail in
Calculated examples show that submicron accuracy, especially a x- and y-position accuracy equal or better than 0,5 μm, can be achieved, when using a fair number of bumps. It has been derived that the expectation value of accuracy scales with the number of bumps used. For example, a 40 mm square chip with 1600 IOs has two rows of solder lands and bumps at pitch of 200 μm. The solder land diameter is 100 μm. The nominal stand-off is 80 μm with an individual spread in the order of several micrometers. In order to have a resulting angle less than 7 μrad, the variation in bump height should be less than 2 μm. It allows for a 3% variation in deposited solder volume per bump.
The infrastructure for the SLM 2 is provided on the dark side 5, e.g. a preamplifier 11, flex connections 10, that can be oriented in any direction, fine pitch thin film interconnects 13 and electrical circuitry 12. Dividing the SLM device into a light side 6 and a dark side 5 has two major advantages: The infrastructure is protected from the illuminating light 4, and the infrastructure does not impede the imaging process, as it is hidden.
One will notice, that the SLMs 2 of the optically active area 31 are arranged in an irregular manner in
Although having described several preferred embodiments of the invention, those skilled in the art would appreciate that various changes, alterations, and substitutions can be made without departing from the spirit and concepts of the present invention. The invention is, therefore, claimed in any of its forms or modifications with the proper scope of the appended claims. For example various combinations of the features of the following dependent claims could be made with the features of the independent claim without departing from the scope of the present invention. Furthermore, any reference numerals in the claims shall not be construed as limiting scope.
| Number | Date | Country | Kind |
|---|---|---|---|
| 04105607.8 | Nov 2004 | EP | regional |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/IB05/53588 | 11/3/2005 | WO | 00 | 5/2/2007 |
