Patent Application
20070291885
A sampler 13 samples signal under test 18 at a time based on strobe signals from an asynchronous sampling strobe generator 27 and a variable delay 23. Asynchronous sampling strobe generator 27 also provides a strobe signal to variable delay 21 and variable delay 22. The strobe signal that asynchronous sampling strobe generator 27 provides to variable delay 21, variable delay 22 and variable delay 23 is asynchronous to signal under test 18. Samples from sampler 11 are converted from an analog signal to a digital signal by an analog-to-digital (A/D) converter 31. Samples from sampler 12 are converted from an analog signal to a digital signal by an A/D converter 32. Samples from sampler 13 are converted from an analog signal to a digital signal by an A/D converter 33. A processor 28 receives signals from A/D converter 31, A/D converter 32 and A/D converter 33. Processor 28 also controls the amount of delay in each of variable delay 21, variable delay 22 and variable delay 23 as well as the timing of asynchronous sampling strobe generator 27. Each of samplers 11 through 13 is, for example, a sampler similar to that disclosed in U.S. Pat. No. 4,956,568 or another type of sampler as is selected to be optimal for a particular application.
In a block 302, the duration of a timing event is determined. For example, the timing event may be the leading edges of pulses from the synchronous timing signal 17. Alternatively, the timing event may be the trailing edges of pulses within synchronous timing signal 17 or some other timing event within synchronous timing signal 17.
For example, when the timing event is the rising edge of a pulse within synchronous timing signal 17, the duration of each timing event is equal to the risetime of the rising edge of each pulse. The duration of the timing event is established by sweeping timing of variable delays 21 and 22 while obtaining samples from sampler 11 and sampler 12. From the acquired samples, the maximum rate (dV/dt) of the rising edge of each pulse of synchronous timing signal 17 is tracked. From monitoring this, the duration of the risetime (which is the duration of the timing event) is established. Duration of the timing event when the timing event is other than the rising edge of a pulse, can be established in a similar manner.
In a step 303, processor 28 sets the relative sampler delay within time establishing samplers 10. For example, processor 28 sets the delay duration of variable delay 21 and variable delay 22 so that the time between when sampler 11 samples synchronous timing signal 17 and when sampler 12 samples synchronous timing signal 17 is equal to one half the timing event established in block 302. Alternatively, processor 28 can set the delay duration of variable delay 21 and variable delay 22 so that the time between when sampler 11 samples synchronous timing signal 17 and when sampler 12 samples synchronous timing signal 17 is some other value; however, typically processor 28 will set the delay duration of variable delay 21 and variable delay 22 so that the time between when sampler 11 samples synchronous timing signal 17 and when sampler 12 samples synchronous timing signal 17 is less than the timing event established in block 302.
In a block 304, processor 28 receives samples from sampler 11, sampler 12 and sampler 13, where a delay duration produced by variable delay 23 is swept throughout a predetermined range relative to delay duration values of variable delay 21 and variable delay 22. For each timing event of asynchronous sampling strobe generator 27, a sampling triplet consisting of a sample from each of sampler 11, sampler 12 and sampler 13 is received by processor 28.
In a block 305, each sampling triplet for which timing relative to synchronous timing signal 17 is not uniquely established is discarded. For example, when the timing event is the rising edge of pulses within synchronous timing signal 17, timing relative to synchronous timing signal 17 can be uniquely established when the value of samples received from sampler 11 and sampler 12 indicate that both samples were taken during the rising edge of a pulse. Alternatively, depending upon the consistency and clarity of pulses within synchronous timing signal 17, it may be possible to uniquely establish the timing relative to synchronous timing signal 17 for a sampling triplet whenever the voltage value of a sample received from sampler 11 is a predetermined amount less (or greater) than the voltage value of a sample received from sampler 12.
For sampling triplets not thrown away in block 305, it is possible to uniquely determine timing for the sampling triplet relative to synchronous timing signal 17. In a block 306, for sampling triplets not thrown away in block 305, the sampling data from sampler 13 and the timing data from samplers 11 and 12 are used to provide-a value of signal under test 18 for an established time within the cycle of synchronous timing signal 17. The resulting samples of signal under test 18 can be aligned to reconstruct signal under test 18. The alignment can be done, for example, using interpolation.
While
For example,
A sampler 43 samples signal under test 48 at a time based on strobe signals from an asynchronous sampling strobe generator 57 and a variable delay 53. Asynchronous sampling strobe generator 57 also provides a strobe signal to variable delay 51 and variable delay 52. The strobe signal that asynchronous sampling strobe generator 57 provides to variable delay 51, variable delay 52 and variable delay 53 is asynchronous to signal under test 48. Samples from sampler 41 are converted from an analog signal to a digital signal by an A/D converter 61. Samples from sampler 42 are converted from an analog signal to a digital signal by an A/D converter 62. Samples from sampler 43 are converted from an analog signal to a digital signal by an A/D converter 63. A processor 58 receives signals from A/D converter 61, A/D converter 62 and A/D converter 63. Processor 58 also controls the amount of delay in each of variable delay 51, variable delay 52 and variable delay 53 as well as the timing of asynchronous sampling strobe generator 57.
In the embodiment shown in
In alternative embodiments of the present invention, the number of samplers can be varied. In addition, a filter can be added before the time establishing samplers to expand the timing event.
For example,
A sampler 73 samples signal under test 78 at a time based on strobe signals from an asynchronous sampling strobe generator 87 and a variable delay 83. A sampler 74 samples signal under test 78 at a time based on strobe signals from asynchronous sampling strobe generator 87 and a variable delay 84. Asynchronous sampling strobe generator 87 also provides a strobe signal to variable delay 81 and variable delay 82. The strobe signal that asynchronous sampling strobe generator 87 provides to variable delay 81, variable delay 82 variable delay 83 and variable delay 84 is asynchronous to signal under test 78. Samples from sampler 71 are converted from an analog signal to a digital signal by an A/D converter 91. Samples from sampler 72 are converted from an analog signal to a digital signal by an A/D converter 92. Samples from sampler 73 are converted from an analog signal to a digital signal by an A/D converter 93. Samples from sampler 74 are converted from an analog signal to a digital signal by an A/D converter 94. A processor 88 receives signals from A/D converter 91, A/D converter 92 and A/D converter 93. Processor 88 also controls the amount of delay in each of variable delay 81, variable delay 82, variable delay 83 and variable delay 84 as well as the timing of asynchronous sampling strobe generator 87.
For example,
An asynchronous sampling strobe generator 127 provides a strobe signal to variable delay 121, variable delay 122, variable delay 123 and variable delay 124. The strobe signal that asynchronous sampling strobe generator 127 provides to variable delay 121, variable delay 122, variable delay 123 and variable delay 124 is asynchronous to signal under test 118. Samples from sampler 111 are converted from an analog signal to a digital signal by an A/D converter 131. Samples from sampler 112 are converted from an analog signal to a digital signal by an A/D converter 132. Samples from sampler 113 are converted from an analog signal to a digital signal by an A/D converter 133. Samples from sampler 114 are converted from an analog signal to a digital signal by an A/D converter 134. A processor 128 receives signals from A/D converter 131, A/D converter 132 and A/D converter 133. Processor 128 also controls the amount of delay in each of variable delay 121, variable delay 122, variable delay 123 and variable delay 124 as well as the timing of asynchronous sampling strobe generator 127.
In alternative embodiments of the present invention, each sampler can use a separate strobe to provide a sampling trigger. This allows flexibility in using different timing characteristics. For example, separately controlling the sampling aperture used by each of samplers allows flexibility in the sampling duration at which each sampler performs samples. For example, for a typical linear feedforward equalizer, each time an input signal is sampled, it is sampled for a uniform sampling duration. In this case, the sampling apertures used by samplers can be adjusted to allow for each sample duration to be equal. On the other hand, for some applications, it is desirable to vary the sampling duration so that different samplers take samples at different sampling durations. For such applications, the sampling apertures used by the samplers can be varied to achieve optimal and varied sampling durations. For example, sampling aperture is controlled by the width of a pulse used to trigger a sampler to obtain a sample. The wider the width of the pulse, the longer the duration during which a sampler obtains a sample. The smaller the width of the pulse, the shorter the duration during which a sampler obtains a sample.
A sampler 143 samples signal under test 148 at a time based on strobe signals from a strobe generator 173 and a variable delay 153. A strobe generator 171 provides a strobe signal to variable delay 151. A strobe generator 172 provides a strobe signal to variable delay 152. The strobe signals generated by strobe generator 171, strobe generator 172 and strobe generator are synchronous to each other, but asynchronous to signal under test 148. Variable delay 151, variable delay 152 and variable delay 153 are optional, as the needed variable delay can also be generated by varying the timing of strobes from strobe generator 171, strobe generator 172 and strobe generator 173, respectively.
Samples from sampler 141 are converted from an analog signal to a digital signal by an analog-to-digital (A/D) converter 161. Samples from sampler 142 are converted from an analog signal to a digital signal by an A/D converter 162. Samples from sampler 143 are converted from an analog signal to a digital signal by an A/D converter 163. A processor 158 receives signals from A/D converter 161, A/D converter 162 and A/D converter 163. Processor 158 also controls the amount of delay in each of variable delay 151, variable delay 152 and variable delay 153 as well as separately controlling the timing characteristics of each of strobe 171, strobe 172 and strobe 173.
The foregoing discussion discloses and describes merely exemplary methods and embodiments of the present invention. As will be understood by those familiar with the art, the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Accordingly, the disclosure of the present invention is intended to be illustrative, but not limiting, of the scope of the invention, which is set forth in the following claims.
