Patent Application
20230244483
The present disclosure belongs to the field of decimal electronic computers under general concept of electronic computer (including decimal computer software, a hardware system architecture, a crossbar controller group between register groups specially needed by the decimal computer, a decimal computer instruction system, a decimal computation register and various auxiliary systems in the decimal computer architecture, an operating system of the decimal electronic computer and a storage system of the decimal electronic computer).
Since Americans firstly invented modern electronic computers (including embedded microcomputers, various personal computers and various huge super computers) in 1946, from original 4-bit electronic computers, 8-bit electronic computers, 16-bit electronic computers, 32-bit electronic computers to current 64-bit electronic computers, binary codding and computation are adopted in all of the electronic computers in the market, and almost all of binary computers are computers with a Von Neumann architecture. There are only two numbers 0 and 1 in a binary system, and all of other numbers, characters, control symbols, various instructions, data storage, and other technical schemes and implementations that any of other computers needs to use are realized with various complicated arrangements and combinations of 0 and 1.
1. At present, computers we generally talk about are all traditional binary computers that originated in 1946. Largest inconvenience of the binary computer is that data is too simple and each data bit has only one BIT which has only two states: 0 and 1. Therefore, if complex content is desired to be expressed, very complicated logical combination has to be made so as to express its uniqueness.
2. At present, computation is generally made in a decimal manner, and carry relationships in a decimal system (unit place, ten place, hundred place, thousand place, ten thousand place, etc.) are particularly easy to understand and learn. However, it is particularly troublesome to understand binary numbers, and binary data needs to be converted into a decimal form so as to be understood, so generally ordinary non-professionals don't interact with binary numbers, and most people can't read them.
3. A binary system has an advantage of being conveniently expressed on a machine, and both binary digits 0 and 1 can be correctly expressed by using a high and low level of a data BIT. Therefore, before the disclosure, no good way is found, and there was no reasonable register model that could express unit decimal data, that is to say, there was no good way to directly express unit data by using registers.
4. Due to reasons 1 to 3 listed above, although the decimal system has a very special advantage compared with the binary system, a decimal computer has not been developed, and even no one has developed the decimal computer at all.
The following is description of core technical principle and schemes of this disclosure.
1. New expression of 10 states of unit data in decimal computer technology is developed in this disclosure. A register of this disclosure, like a binary register, can be configured to express states of 10 numbers very accurately.
2. More than 10 numbers are expressed through a single-bit decimal register in this disclosure. Then the single-bit decimal register can be combined into a multi-bit register group and to be a smallest core unit of the decimal computer of this disclosure.
3. Register group: various types of registers such as addition registers, subtraction registers, multiplication registers and division registers and register groups required by the decimal computer can be combined into a multi-bit register through above two basic register implementations, and finally all types of register groups required can be realized.
4. A computer composed of decimal registers outputs states of 10 BITs, so various modules are needed between different functional register groups and different functional modules to control transmission and exchange of data, which are called crossbars. Because the decimal computer has technical characteristics in aspects 1 to 4, a whole core computing structure model and an auxiliary crossbar controller model are completely different from various previous binary control modules, and there will be many new things designed according to needs that were completely absent before.
5. Because there are 10 BITs for data bit, only one of them is needed when used as a number. However, there are more than 1000 combinations of 10 BITs, and with various combinations except the one for the number, other 2 to 9 BITs can be combined to realize unit data for expressing complex codes such as characters, operators, control symbols and UNICODE codes (using 2 data bits). These operators, control symbols and Unicode codes constitute an instruction set system that can be expressed by one bit of data.
6. By controlling operations of a hardware register group with the above instruction set system, all types of necessary computation can be completed, and combined with a data storage system, an input and output (IO) system, an external interface, a power supply and other necessary subsystems of the computer required by decimal data, a whole system of the decimal computer according to this disclosure can be obtained.
Description of the beneficial effects of the disclosure is listed below.
1. The decimal system is much easier to be understood and learnt than the binary system, and there is no need to learn those complicated things for binary system. The binary system is basically difficult to be understood completely, but the decimal system can be sufficiently understood through addition, subtraction, multiplication and division.
2. The decimal computer has high computation accuracy. Some of (actually most of) decimal fractions can't be accurately expressed as binary fractions, for example, in PYTHON, 0.1+0.2=0.30000000000000004, and a result is not equal to 0.3 as generally understood. There is always a problem of conversion accuracy in computation of a decimal number in a binary manner, but conversion is not required for the decimal system and thus absolute computation accuracy can be ensured in computing.
3. At present, the binary computer is 64-bit (binary number) at most (it takes decades from 4-bit to 8-bit, to 16-bit, and then to 32-bit, and finally to 64-bits). If 128-bit or 256-bit binary computer is developed, complexity of design work is unimaginable. 64 bits in the binary computer can be converted to only 20 bits in the decimal computer, and the decimal computer can be easily designed to be 100-bit, 1000-bit, or more according to actual needs, and it is very convenient to complete design and computation, just using physical superposition.
4. The binary computer computation is configured to compute based on simple registers cyclically switching according to machine instruction and to compute serially. The decimal computer can directly perform multi-bit parallel computation, with a computation speed and efficiency reaching thousands to tens of thousands times that of the binary computer.
5. Ultra-low power consumption. The decimal computation is simple, and power supply of computer registers can be controlled by bit, and the power consumption is only a few tenths of that of ordinary computers, while power consumption of large computers is only a few thousand to a few tens of thousands with same computing power.
6. Inputting and outputting via an I/O port of the computer. In the past, the binary computer needs to be configured with a register and to perform inputting or outputting in multiple steps. The decimal computer according to this disclosure only needs to be configured with a register and to perform inputting or outputting in one step.
7. High computational efficiency. The decimal computer can realize parallel computation of N-bit data, and machine language without complex transformation can be directly executed.
8. Computer data bit of the decimal computer has 10 BITs, which can express more than 1000 states, and in this way, numbers, characters, UNICODE, operators and functions are all can be expressed. Complex binary combination is not required for the data, and all computations are controlled by one data bit, which maximizes data efficiency and subsequent computation efficiency.
9. The decimal computer is with simple and efficient programming. The machine language is a high-level language (the machine language can be configured to directly operate underlying basic hardware registers to compute), and the high-level language can be directly programmed to be an executable code, and one line of code can serve to complete computation that the binary computer needs tens to hundreds of lines of code to complete, and a primary school student can undertake professional programming work of college graduates after learning addition, subtraction, multiplication and division.
10. An existing computer operating system structure model is changed, address lines with a width of more than 40 bits is introduced, and decimal data lines with a width of more than 100 bits is introduced, and the decimal computer has a TB-level direct addressing space. All large-scale applications with several GB that need external storage can directly resides in memory RAM. It takes at least a few minutes to start and execute large-scale applications using the binary computer, and it takes less than 0.001 second using a decimal computer and they can be clicked and opened.
11. The decimal computer changes a database operation mode, and database with several GB to several tens of GB can resides in the memory, and a response speed of querying data and providing data services can be improved by tens of thousands of times compared with the binary computer.
12. Calling between different software in the decimal computer is as fast and efficient as operating software. For example, XX can be forwarded to WeChat Moments without any pause or delay. A case where an Android machine may slow down after a period of use will never exist in the future.
13. At present, the most advanced Sunway computer in China may only need a small case of a personal computer in a new system according to this disclosure, and a computer with cost of several billion yuan will only takes less than 10 thousand yuan in the system according to this disclosure.
14. At present, a manufacturing process of high-end chips has reached a dead end of 3 to 5 nm with extremely high cost, and one tape-out takes tens of millions of dollars to hundreds of millions of dollars. The decimal computer has high computation efficiency and low power consumption, so there is no need to use the complex manufacturing process of 3 to 5 nm, and only needs very common production technology and extremely low production and manufacturing cost to reach a level of a current highest-performance computer.
In this figure, reference number 1 represents an output port of a single-bit decimal register. Reference number 2 represents 10 BITs representing an output end of a single-bit decimal register. Reference number 3 represents an output end of a register in a carry state. Reference number 4 represents an input end of a decimal register for computation data. Reference number 5 represents an output end of a decimal register in a carry state. Reference number 6 represents 10 BITs representing a carry output end of a decimal register. Reference number 7 represents an internal core logic circuit representing a decimal register.
In the figure, reference number 1 represents an operation register group. Reference number 2 represents a memory where 10 BITs enter and exit data storage. Reference number 3 represents an input and output interface of a decimal computer; and reference number 4 represents various crossbar controllers of a decimal computer.
1. A core component CPU of a decimal computer is designed using a basic register, a register group and a support controller according to the disclosure.
2. The CPU of this design is connected directly with various peripheral devices of an existing binary computer to directly drive various ready-made peripheral devices so as to complete application of a new decimal computer.
3. Because the computing core used in the present disclosure contains various decimal register groups, machine code of an internal instruction set is required to be converted into a corresponding decimal register, and if an operating system of other existing computers need to be used on this decimal computer hardware system, underlying machine instructions and some computing code logic need to be adjusted accordingly. However, all types of computer codes designed in high-level language need to use hardware instructions that interface with the decimal computer in bottom-level compilation.
4. Because unit data of this computer is 10-BIT, stored 8-BIT codes and numbers used by traditional computers can be directly compatible and used after adjustment in this system. However, the 10-BIT data stored in this system as the decimal computer can't be stored or recognized and opened in a traditional binary computer, so the decimal computer can be compatible in data with data application of the traditional binary computer.
Specific registers, data expressions, operators, control symbols and other related descriptions of this scheme are described in the following.
(I) Hardware implementation of decimal computer, an overall structural model is shown in the above description and
1. A decimal addition register, subtraction register and other required hardware register groups are designed in hardware circuit.
2. A crossbar controller is designed in hardware circuit, all types of registers for computation are connected through the crossbar controller.
3. A address line is more than 40-bit wide (combined according to actual needs) and a data line is more than 100-bit wide (combined according to actual needs), and an addressing space for direct hardware addressing is established, which can be used as an internal FLASH address, a RAM address, and used for other fast hardware addressing.
4. An external input and output system of the computer (an IO input and output, a keyboard, a display, etc.) is established by connecting external common IO ports, UART serial ports, USB ports, I2C interfaces, SPI interfaces, HDMI interfaces, SATA interfaces and other external interfaces via crossbars and latches.
5. External hard disks and other special memories using decimal data are externally connected through SATA and USB ports.
6. A hardware structure system described above can be started as a complete decimal computer system through a special BIOS boot program.
(II) Operating system of decimal computer. Operating system implementations from an embedded micro-system to a large supercomputer are classified according to needs of application scenarios, and are used matching products loaded with different hardware modules, and bit lengths and numbers of the related registers loaded in the CPU of a hardware part are different. The following is only for explanation of specially improved design over the binary computer, and other things not specified can be referred to mature technology of existing binary computers.
a) A data width of 80 to 100 bits is adopted, each with 10 BITs.
b) It can be expressed from (D1,0-D1,9); (D2,0-D2,9); . . . and (D100,0-D100,9).
c) 40 bits are reserved for an address line; 30 bits indicates 1G, and the width of 80 bits indicates a total width of 80 G, with a maximum hardware addressing space of 1024×80 G.
d) A dedicated chip can be directly placed in this addressable address as a database cache in RAM. If the dedicated chip is designed as the database cache, a DMA channel can be established between the chip and an external storage device for storage management.
e) BIOS address. 1 M starting from 0 is used as internal BIOS and internal ROM (FLASH) addresses, and a large system is with the data width of 80/100 bits, which indicates a total storage space of 80 M/100 M.
f) The system can be adapted to multi-user application needs.
a) A data width of 60 bits is adopted, each with 10 BITs.
b) It can be expressed from (D1,0-D1,9); (D2,0-D2,9); . . . and (D60,0-D60,9).
c) 40 bits are reserved for an address line; 30 bits indicates 1G, and the width of 60 bits indicates a total width of 60 G, with a maximum hardware addressing space of 1024×60 G.
d) A dedicated chip can be directly placed in this addressable address as a database cache in RAM. If the dedicated chip is designed as the database cache, a DMA channel can be established between the chip and an external storage device for storage management.
e) BIOS address. 1 M starting from 0 is used as internal BIOS and internal ROM (FLASH) addresses, and a large system is with the data width of 60 bits, which indicates a total storage space of 60 M.
f) The system can be adapted to multi-user application needs.
a) A data width of 40 bits is adopted, each with 10 BITs.
b) It can be expressed from (D1,0-D1,9); (D2,0-D2,9); . . . and (D40,0-D40,9).
c) 40 bits are reserved for an address line; 30 bits indicates 1G, and the width of 40 bits indicates a total width of 60 G, with a maximum hardware addressing space of 1024×40 G, space can be allocated from this addressing space as a database in RAM.
d) BIOS address. 1 M starting from 0 is used as internal BIOS and internal ROM (FLASH) addresses, and a small system is with the data width of 40 bits, which indicates a total storage space of 40 M.
a) A data width of 20 bits is adopted, each with 10 BITs, and a data line is with 200 BITs.
b) It can be expressed from (D1,0-D1,9); (D2,0-D2,9); . . . and (D20,0-D20,9).
c) 40 bits are reserved for an address line; 30 bits indicates 1G, and the width of 20 bits indicates a total width of 20 G, with a maximum hardware addressing space of 1024×20 G.
d) 1 M starting from 0 is used as internal BIOS and internal ROM (FLASH) addresses, and a micro system is with the data width of 20 bits, which indicates a total storage space of 20 M, and startup information and programs can be stored in this space.
5. Core principles and architectures of the above systems are all the same, and instructions used are all the same (for part of large-scale computation registers, which is not used for the small system), and files and file formats used are all the same. There is no direct difference between systems, but different modules are loaded according to different needs and requirements of different hardware modules. Some of the modules does need to be loaded for some of the system, and some of the systems are only loaded with modules with different functions. As for debugging and display output parts, there can be a display, or printed results executed by the program are only output through a serial port, or the printed results are output to an image display desktop as required or not output to the display desktop.
Basic Bootloader BIOS, which is solidified using a mask or burned using a basic serial port.
7. Call of software modules. Same various functional modules are provided and the application module market is opened, and developers can choose to call according to their needs, thus greatly simplifying application development.
8. Peripheral devices and interfaces of this computer do not need to be improved. This computer can be directly interfaced with existing mature products, and interfaces requiring improvement are designed in a compatible way, and newly developed products are gradually upgraded to latest ones.
9. External Hardware Interfaces Supported by Default.
A. RAM, Different systems support different bit widths of addresses and different data linewidths, and only 10-BIT ones are considered in this disclosure.
B. External interface, which is a standard serial port and for which 50 to 200 ports can be supported, and actual chip development can be expanded as required.
C. External interface, which is a USB port 2.0 or a USB port 3.0 and for which up to 200 to 500 ports can be supported as needed, and actual chip development can be expanded as required.
D. External interface, which is an I2C interface and for which 20 to 50 interfaces can be supported, each interface supports XX addresses, and actual chip development can be expanded as required.
E. External interface, which is a SPI interface and for which 20 to 50 interfaces can be supported, and actual chip development can be expanded as required.
F. External interface, which is a single-wire data interface and for which sending data back and forth can be supported, and actual chip development can be expanded as required.
G. External storage interface, which is a SATA and optical fiber interface.
H. External interface, for which a display adopts an HDMI interface and 6 to 20 standard dot matrix display screens can be supported by default, with a refresh frequency not lower than 100 to 200 HZ. Different systems only support several resolutions by default, and other resolutions are supported by software expanding and software splicing.
I. External interface, which is a 10M to 80G optical network interface.
J. Other external interfaces, which is a WAN port and is extended with USB2.0 or USB 3.0.
10. Providing corresponding software virtual machine, in which an old operating system can be run on the machine of this disclosure; and a calculator can manage super-large hardware addressable addresses, and large application software and some data reside in the memory.
11. Cross-platform calling between software, in which with authorization, different software can directly call other software-related interfaces according to addresses in RAM. Calling is performed firstly, and then data is synchronized to external storage or network storage through a relevant process manager. In fact, it becomes a cloud operating system, providing a second-operating experience, even if it is offline, using may not be affected.
12. Designing an operating system with a new architecture and adding a memory address allocation table, in which for large-scale application software, if users desire, RAM with a fixed address can be can allocated to their specific application software, so that large-scale application software allocated with a fixed RAM address can be started in seconds (even if the computer restarts, this part of content residing in memory does not need to be reloaded unless the software fails and needs to be reloaded); and when other software needs to be called or accessed, the fixed memory address can be firstly queried and calling authorization is applied, and reading, writing, modifying and deleting authorization is applied for RAM internal database.
13. Improving existing database and establishing a new database application architecture, in which part of databases resides in memory, and a special chip with a capacity of 10 to 40 GB or more can be even directly provided as a RAM internal database if there is no requirement for cost, and all databases related to personal application software and external databases are copied to an internal database to establish multiple database models (application software defining the database models); and only a part of RAM addresses are allocated as the database when limited in cost, and databases of a network and an external storage are directly copied to the RAM, and firstly, the database is operated quickly in a near end, and then the database automatically transmits and records data to the external storage (a DMA channel is established for the internal database to be stored externally) and network storage is synchronized, but the internal database is directly read and used every time the data is not changed and there is no need to synchronize firstly, thus greatly reducing network data traffic, showing no delay in operating and using, and providing users with ultimate experience.
14. Establishing file indexes of an external storage space in an internal direct addressing space, in which because data and address line bandwidth of the CPU are sufficient, a large amount of data can be stored in the direct addressing space, but some super-large data still need to be stored in external storage devices (such as existing hard disks), so directory indexes of the external file storage can be established synchronously with an external storage in a built-in storage, so that data stored in the external storage can be quickly found and read and written, which will greatly improve a speed of reading, writing and storing operations of the external storage.
1. A decimal data storage mode with a 10-BIT bit width per bit is adopted.
2. A single storage unit can store data and other various symbols.
3. Establishing a new cloud storage and computing system, in which a storage system for a system COPY of a whole computer from file to hardware and synchronous data is established on the network for a personal computer and other common electronic devices to replace a previous network cloud disk so as to ensure security of personal data. Meanwhile, tasks that cannot be completed for the personal computer (such as compilation of Android and LINUX systems, which takes days and nights to complete with the personal computer) can be completed by a larger supercomputer through personal device mapping, so that individuals can use supercomputers, which makes the supercomputers be more fully utilized, makes the individuals work more efficiently, and realize more rational use of social resources and generate economic benefits.
(IV) Data expression and supplementary description, in which the data expression involves digital expression, calculated character expression, operator expression, control symbol expression, Unicode code expression, and other code expression.
a) Decimal Numbers.
b) Nine-bit operator (with meaning specified when it can be used).
c) Two-bit combination operator (with meaning specified when it can be used).
d) Eight-bit combination operator (with meaning specified when it can be used).
E) Three-bit combination operator (120 bits in total) (with meaning determined when it can be used).
f) four-bit, five-bit or six-bit operators are combined into a Uicode code (meaning of the code can be determined when specifically used).
g) Seven-bit combination operators and control symbols (120 in total, for which specific meaning can be determined when used).
h) Other Description.
1. Digital representation method. A normal number contains a series of numbers from 0 to 9. If there is a decimal number, the decimal point can be counted from front to back or from back to front.
A. Normal number writing (a decimal number): −1045.235.
B. A 10 decimal machine recognizes a writing 01045235(−3), in which “0” in the front indicates this is a negative number, and (−3) indicates that a decimal point is before a third to last bit of the number.
Coding scheme (combinatorial coding by using symbols occupying 4, 5 and 6 bits): using 2-bit symbols or 2-bit symbols and 1-bit numbers as the UNICODE code, in which there are 4-bit coding symbols (210 symbols), 5-bit coding symbols (252 symbols) and 6-bit coding (210 symbols), with a total of 252×210×2×2=211680 codes; and if the 1-bit number is added, there may be a total of 2116800+211680 codes.
1. With technical schemes listed above, basic registers and instruction sets can be directly arranged and combined to design a complete computer CPU. Then, with aid of peripheral computer hardware devices, a complete computer can be formed.
2. The decimal computer cooperates with corresponding software code of hardware registers and instructions of the decimal computer so as to design the operating system of the decimal computer.
3. The decimal computer cooperated with the above hardware and software system may greatly improve efficiency of computing performance compared with the traditional binary computer, and unit cost may be greatly reduced. Moreover, it can complete similar applications to those of the binary computer in any industry or field.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202011074626.9 | Oct 2020 | CN | national |
This application is a continuation of International Patent Application No. PCT/CN2020/121715 with a filing date of Oct. 17, 2020, designating the United States, now pending, and further claims priority to Chinese Patent Application No. 202011074626.9 with a filing date of Oct. 10, 20201. The content of the aforementioned applications, including any intervening amendments thereto, are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/CN2020/121715 | Oct 2020 | US |
| Child | 18297695 | US |
