This application claims the priority benefit of Italian patent application serial number MI2012A000333, filed on Mar. 2, 2012, which is hereby incorporated by reference to the maximum extent allowable by law.
1. Technical Field
The present disclosure relates to a battery charger.
2. Discussion of the Related Art
Nowadays mobile phones, digital cameras, notebooks, netbooks, tablets etc. have become daily used electronic devices. The power of the batteries of these electronic devices determines a length of time use of the electronic device. Electronic devices such as mobile phones, digital cameras, notebooks, netbooks, tablets etc. should be used with corresponding battery chargers. Generally, these battery chargers are unique to the corresponding electronic devices.
Typically, each battery charger is provided with an input terminal, such as a USB terminal, for connection to the power line for charging the battery and simultaneously powering the device connected to the battery, as shown in
The battery charger 20 in
The control block receives an enable signal CEN an a shut-down signal SD and comprises a current modulation block adapted to control the transistor M4. Also the control block 10 is able to send an enable signal EN to a LDO block configured to supply an external load with a constant voltage by means of the output terminal Ld.
Also the battery charger comprises circuits to operate the battery disconnection when an alarm such as battery over discharge current (OCD) or battery over discharge voltage (OVD) happens, especially in the case of cheap batteries without internal protection, or when the battery will not be used for a long time to avoid battery discharge, that is the so called “shipping mode”.
In view of the state of the art, embodiments provide a battery charger device that reduces the battery discharge when a battery alarm occurs or during shipping mode.
According to an embodiment, there is provided of a battery charger comprising an input supply terminal configured to receive a supply signal, a battery terminal configured to be connected to a battery and at least one output terminal, a switch arranged in the electrical path between the battery terminal and said at least one output terminal, an element configured to store information data representative of an alarm condition of the battery and to open the switch when said alarm condition occurs, with the supply signal being absent and the battery supplying said at least one output terminal, and to close the switch when said supply signal is received at the input supply terminal.
The features and advantages of the present invention will become apparent from the following detailed description of an embodiment thereof, illustrated only by way of non-limitative example in the annexed drawings, in which:
A battery charger device according to an embodiment is shown in
The battery charger comprises an input supply terminal IS, for example a USB terminal, configured to receive a supply signal Vdd, a battery terminal BT configured to be connected to a battery 100, at least one output terminal SYS, Ld, a switch M3 arranged in the electrical path 11 between the at least one output terminal SYS, Ld and said battery terminal BT.
In one embodiment, the battery charger comprises two output terminal SYS and Ld and two switches M1 and M2 arranged in the electrical path 12 between the input supply terminal IS and the output terminals SYS, Ld. Preferably a circuit block LDO is connected to the electrical path 12, downstream the switches M1 and M2, an provides to supply the output terminal Ld with a constant voltage. The switches M1 and M2 are controlled by a control circuit block 40.
The battery charger comprises an element 30, for example a latch, configured to store data representative of an alarm condition, where the alarm condition is a malfunctioning condition of the battery when the battery 100 supplies the block LDO and the output terminal SYS or a shipping condition, that is when the battery is not used for a long time.
The malfunctioning condition is an over current discharge (OCD) condition or an over voltage discharge (OVD) condition which are detected by first 41 and second 42 means, in one embodiment belonging to the battery charger; the shipping condition is controlled by an external signal SD. Therefore at the presence of the signal SD or when the first 41 or second 42 means output signals OC, OV representative of the OCD or OVD condition and the battery 100 supplies the block LDO and the output terminal SYS, the alarm condition occurs and the latch 30 stores data representative of said alarm condition and opens the switch M3 when said alarm condition occurs, with the supply signal Vdd being absent.
A further switch M4 is arranged in the path 11 between the terminal BT and the switch M3; the switch M4 allows charging the battery 100 when the supply voltage Vdd is present at the input supply terminal IS and is controlled by a control circuit 45. The switches M3 and M4 are preferably PMOS transistors and the first means 41 comprise a comparator having the inverting and non-inverting input terminals connected with the drain terminals of the transistors M3 and M4 and outputting the signal OC when the signal at the inverting input is higher than the signal at the non-inverting input terminal, that is there is an over current discharge condition.
The second means 42 comprise a comparator having the inverting and non-inverting input terminals connected with the drain terminal of the transistor M4 and a voltage reference REF and outputting the signal OV when the signal at the inverting input is higher than the signal REF, that is there is an over voltage discharge condition.
A logic circuit block 15 is configured to receive the signal OC and OV from the first and second means 41, 42 and the signal SD and to generate a signal S_SH in response to the received signal only when the battery 100 supplies the block LDO and the output terminal SYS; the signal S_SH is sent to the latch 30 to store the information.
Also the logic circuit block 15 is configured to reset the latch 30 by means of a signal R_SH when the supply signal Vdd is received at the input supply terminal IS. The battery charge according to an embodiment comprises a voltage detector 43 configured to detect the presence of the supply voltage Vdd at the supply input terminal IS and to emit a signal Dect-Vdd in response to the detection.
The logic block is supplied by the block LDO and receives the signal SH at the output from the latch 30. The logic circuit block 15 is preferably a digital circuit block configured to receive a clock signal CLK deriving from an oscillator 46 supplied from the block LDO; preferably the digital circuit block is implemented by a microcontroller, a memory element storing a firmware able to set the microcontroller.
The signals S_SH, R_SH and SD are preferably pulse signals, as shown in
When the pulse of the signals S_SH and SD is present at the gate terminal of the transistor MS, the latch 30 is set and the signal SH turns off the transistor M3, while when the pulse of the signal R_SH is present at the gate terminal of the transistor MR, the latch 30 is reset and the signal SH turns on the transistor M3.
The battery charger according to an embodiment operates according to the following method, as shown in
When, in the step A1, an OCD, OVD or a shipping mode condition is present, that is when one among the signal OC, OV and SD is received by the circuit block 15 and the battery 100 supplies the block LDO and the output terminal SYS, the circuit block 15 sets the latch 30 by the signal S_SH; the latch 30 turns off the transistor M3.
If the supply voltage Vdd is detected at the supply input terminal IS by the signal Dect-Vdd, the control circuit 40 turns on the transistors M1 and M2 so that the terminals SYS and the block LDO are supplied by the voltage Vdd in the step A2.
The block LDO supplied by the signal Vdd supplies in turn the digital circuit block 15 in the step A3; the last sends a reset signal R_SH to the gate terminal of the transistor MR to reset the latch 30 and the signal SH turns on the transistor M3. The transistor M4 is turned on by the charger block 45 supplied by the block LDO; in this way the battery 100 is supplied by the voltage Vdd via the electrical path 11.
If the input terminal IS is disconnected from the supply voltage Vdd in the step A4, the terminal SYS and the block LDO are supplied by the battery 100 with the transistors M3 and M4 turned on.
The advantage of the battery charger according to an embodiment is that the current consumption in the case of said alarm condition is near to zero.
Having thus described at least one illustrative embodiment of the invention, various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description is by way of example only and is not intended as limiting. The invention is limited only as defined in the following claims and the equivalents thereto.
Number | Date | Country | Kind |
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MI2012A0333 | Mar 2012 | IT | national |
Number | Name | Date | Kind |
---|---|---|---|
5039931 | Wieland | Aug 1991 | A |
5177426 | Nakanishi et al. | Jan 1993 | A |
5319298 | Wanzong et al. | Jun 1994 | A |
5666040 | Bourbeau | Sep 1997 | A |
5790961 | Ingram et al. | Aug 1998 | A |
5818201 | Stockstad et al. | Oct 1998 | A |
6191498 | Chang | Feb 2001 | B1 |
6329796 | Popescu | Dec 2001 | B1 |
7276881 | Okumura et al. | Oct 2007 | B2 |
7391184 | Luo et al. | Jun 2008 | B2 |
7495416 | Sato et al. | Feb 2009 | B2 |
8441230 | Boyles et al. | May 2013 | B2 |
8665572 | Liu | Mar 2014 | B2 |
8729868 | Odaohhara | May 2014 | B2 |
8994341 | Voorwinden et al. | Mar 2015 | B2 |
20030169021 | Kashine | Sep 2003 | A1 |
20030220026 | Oki et al. | Nov 2003 | A1 |
20050269992 | Lai et al. | Dec 2005 | A1 |
20060181244 | Luo et al. | Aug 2006 | A1 |
20060267576 | Ooshita et al. | Nov 2006 | A1 |
20070103143 | Ooshita et al. | May 2007 | A9 |
20080150488 | Lu et al. | Jun 2008 | A1 |
20090009138 | Ahmad et al. | Jan 2009 | A1 |
20090027013 | Odaohhara | Jan 2009 | A1 |
20100085014 | Saeki et al. | Apr 2010 | A1 |
20120086407 | Voorwinden et al. | Apr 2012 | A1 |
20130038275 | Chen et al. | Feb 2013 | A1 |
20130057217 | Chen et al. | Mar 2013 | A1 |
20130057221 | Shibata | Mar 2013 | A1 |
20130229145 | Alessandro et al. | Sep 2013 | A1 |
20130241488 | Dao | Sep 2013 | A1 |
Entry |
---|
International Search Report and Written Opinion dated Oct. 1, 2012.from corresponding Italian Application No. IT MI20120333. |
Italian Search Rport and Written Opinion dated Nov. 22, 2012 from related Italian Application No. MI2012A 000332. |
Number | Date | Country | |
---|---|---|---|
20130229145 A1 | Sep 2013 | US |