The technical field of the invention is power conversion systems using solid state switching. For example, inverters which convert DC power to AC power for applications such as electric vehicles and solar power. Such systems require an optimized interface between the DC bus and the solid state switch module (or modules) to achieve the best possible performance.
Semiconductor switch modules are comprised of an insulating case with external metal positive and negative input terminals which must be separated by sufficient spacing to comply with regulatory agency requirements for strike distance (through air) and creepage distance (over a solid insulating surface in air) based on the operating voltage. Typical commercially available modules are half-bridges or full-bridges with the positive and negative input terminals deployed in side-by-side or in-line configurations. In both cases, the input geometry is dictated by the terminal spacing with air as the dielectric, which has a significant contribution to the equivalent series inductance (ESL) seen by the semiconductor switches. Alternative topologies including strip line input configurations have also been demonstrated, but the terminal spacing and ESL is still dictated by the same requirements as described above.
Minimizing the ESL is critical to manage voltage overshoot which occurs at switch turn-off and can lead to catastrophic device failure. Overshoot is defined by the relationship V=L×dl/dt where V is the voltage in Volts, L is the inductance in Henries, and dl/dt is the rate of current change in Amperes per second. For a given dl/dt value, reducing the value of L results in a lower value of V. Reducing the overshoot voltage allows safely operating at higher DC voltages, which improves the power handling capability of the switch module. While prior art does address teachings of how to make lower inductance bus structures (U.S. Pat. Nos. 8,193,449 and 7,798,833), the issue of reducing dielectric clearances to improve ESL has not been addressed. The uniqueness of the present invention is in the use of a bus structure to facilitate placement of solid insulation between the terminals of a switch module (which is otherwise designed with tab-style connections) to eliminate the air strike distance created by the tab geometry and allow for reduced spacing and lower inductance without violating regulatory agency requirements for creepage and strike distance.
Voltage overshoot occurring at switch turn-off limits the safe DC operating voltage of solid state switch modules used for power conversion applications. The voltage overshoot is defined as V=L×dl/dt where V is the voltage in Volts, L is the inductance in Henries, and dl/dt is the rate of current change in Amperes per second. For a given dl/dt condition, the overshoot voltage can be reduced by making the value of the inductance L smaller. According to Maxwell's equations, the inductance is defined by the loop area of the connection between the semiconducting switch input terminals. As such a larger terminal spacing results in a larger inductance. For conventional switch modules, the terminal spacing is defined by the strike (through air) and creepage (through air over an insulating surface) distances between the positive and negative input terminals to meet regulatory requirements for a given operating voltage. The problem is thus that the inductance of the semiconductor switch connection is limited by the dielectric strength of air. Further discussion of inductance for switch module inputs is provided elsewhere [1-3].
The present invention uses a novel bus and insulation scheme to eliminate the air-insulated strike and creepage paths between traditional tabbed switch module input terminals. A terminal geometry is created using parallel conducting plates (one positive polarity and one negative polarity) separated by a layer of solid insulation sufficient to hold off the required operating voltage. Additional insulation layers can be added on the outside faces of the conducting plates to facilitate edge sealing. Through-hole connections are made between each polarity plate and the corresponding polarity input terminals on the switch module. Note that the “throat” regions where a connection of one polarity passes through a plate of the opposite polarity utilize edge sealing insulation to minimize the spacing while providing the required insulation level. Note further that conducting bushings are often utilized to facilitate compression of metal to metal contacts between the bus plates and switch module terminals.
A novel conformal insulating layer is applied to the bus plate which contacts the switch module. This insulation is secured by the compression of the input terminal mounting screws or by adhesive bonding and serves to eliminate any strike or creepage paths through air between the positive and negative terminals. As such, the tabbed switch module terminal spacing is now defined by the properties of the solid insulating layer and can be dramatically reduced without violating any air strike or creepage limits. While the idea of using solid insulation to reduce spacing between conductors at different potentials is well known, the present invention is unique in that the bus structure serves as the substrate for the solid insulation. As such, the solid insulation does not achieve the desired function unless it is integrated with the bus structure for interfacing with the switch module. This technique can be applied to an existing commercially available single or multi-phase switch module utilizing tabbed connections or utilized to allow fabrication of new modules with reduced terminal spacing. In either case, significantly reduced ESL is achieved such that operating voltages can be increased without the traditional limit of voltage overshoot.
Elimination air as the limiting dielectric between the switch module terminals allows for reduction of the terminal spacing. This in turn reduces the inductance and allows for safe operation at higher DC voltages without fear of voltage overshoot causing switch failure at switch turn off. As such, the power density of the converter is improved by allowing safe operation at higher voltage. This has significant impact on cost, weight, and size for power conversion systems.
In order to clearly define the present invention, factors that dominate the terminal spacing of semiconductor switch modules must be understood. A “side-by-side” input configuration of a half-bridge switch is shown in
The strike and creepage paths ([11] and [12] from
The present invention eliminates air as the dielectric limit between the positive and negative terminals with one embodiment as illustrated in
The industry typically provides high-power semiconductor switch modules in three packages—small flexible modules with pin connections, high power modules with low inductance through holes or tabs, and multi-switch modules with tab style input connections. The present invention provides for a way to connect to a half-bridge or multi-switch module while mitigating the typically high inductances created by tab to tab connections. The invention provides this benefit without violating regulatory agency guidelines for creepage and strike distances between terminals (such as UL).
Not Applicable
Not Applicable
U.S. Pat. No. 8,193,449 (Esmaili et al)
U.S. Pat. No. 7,798,833 (Holbrook)
[1] E. D. Sawyer, “Low Inductance—Low Temp Rise DC Bus Capacitor Properties Enabling the Optimization of High Power Inverters”, Proceedings of PCIM, Nuremberg, Germany, May 2010, http://www.sbelectronics.com/technology/technical-papers/
[2] M. A. Brubaker, T. A. Hosking, and E. D. Sawyer, “Characterization of Equivalent Series Inductance for DC Link Capacitors and Bus Structures”, Proceedings of PCIM, Nuremberg, Germany, May 2012, http://www.sbelectonics.com/technology/technical-papers/
[3] M. A. Brubaker, H. C. Kirbie, and T. A. Hosking, “Integrated DC Link Capacitor/Bus Structures to Minimize External ESL Contribution to Voltage Overshoot”, Proceedings of the 1st Annual IEEE Transportation Electrification Conference, June 18-22, Dearborn Mich., 2012, http://www.sbelectronics.com/technology/technical-papers/
Not applicable
Number | Date | Country | Kind |
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61881724 | Sep 2013 | US | national |
Filing Document | Filing Date | Country | Kind |
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PCT/US14/56468 | 9/19/2014 | WO | 00 |