Patent Application
20240213306
This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2022-0186384, filed on Dec. 27, 2022, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety.
The disclosure relates to a capacitor and a semiconductor device including the same.
With the down-scaling of integrated circuit devices, the available space to be occupied by a capacitor has been also reduced. Capacitors include upper and lower electrodes and a dielectric film therebetween, and a high-permittivity dielectric material is used to obtain high capacitance. However, as the thickness of the dielectric film decreases a leakage current may flow in the capacitor, thereby resulting in a reduction in capacitance and/or charge retention in the capacitor. Therefore, a technique for minimizing the capacitance reduction while reducing the leakage current flowing in the capacitor is required.
Provided is a capacitor having high permittivity and superior leakage current blocking characteristics.
Provided is a semiconductor device including a capacitor having high permittivity and superior leakage current blocking characteristics.
However, the disclosure is not limited thereto.
Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments of the disclosure.
According to an aspect of the disclosure, a capacitor includes a first electrode, a dielectric layer over the first electrode, a second electrode between the first electrode and the dielectric layer, and a third electrode over the dielectric layer and in contact with the dielectric layer such that the dielectric layer is between the second electrode and the third electrode, in which a thermal expansion coefficient of the first electrode is greater than a thermal expansion coefficient of the dielectric layer, and a work function of the second electrode is higher than a work function of the first electrode.
The thermal expansion coefficient of the first electrode may be greater than or equal to 6.0×10−6/K and less than or equal to 8.0×10−6/K.
A work function of the second electrode may be greater than or equal to 4.0 eV and less than or equal to 7.0 eV.
A thickness of the second electrode may be less than or equal to 1/10 of a thickness of the first electrode.
A thickness of the first electrode may be greater than or equal to 10 nm.
A thickness of the second electrode may be less than or equal to 1 nm.
The dielectric layer may include an oxide of at least one of hafnium (Hf), zirconium (Zr), titanium (Ti), barium (Ba), or strontium (Sr).
The first electrode may include at least one of titanium (Ti), nickel (Ni), aluminum (Al), tantalum (Ta), molybdenum (Mo), vanadium (V), niobium (Nb), or magnesium (Mg).
The first electrode may include at least one of a metal, an oxide, or a nitride.
The second electrode may include at least one of tantalum (Ta), nickel (Ni), tungsten (W), platinum (Pt), palladium (Pd), gold (Au), iridium (Ir), or ruthenium (Ru).
The second electrode may include at least one of a metal, an oxide, or a nitride.
The dielectric layer may be tensile-strained in a thickness direction of the dielectric layer.
A magnitude of the tensile strain in the dielectric layer may be based on a difference between the thermal expansion coefficient of the first electrode and the thermal expansion coefficient of the dielectric layer.
A phase of the dielectric layer may be a tetragonal phase.
The first electrode may be rod-shaped, the second electrode may surround the first electrode, the dielectric layer may surround the second electrode, and the third electrode may surround the dielectric layer.
According to another aspect of the disclosure, a semiconductor device includes a transistor and a capacitor electrically connected to the transistor, in which the capacitor includes a first electrode, a dielectric layer on the first electrode, a second electrode between the first electrode and the dielectric layer, and a third electrode on the dielectric layer and in contact with the dielectric layer such that the dielectric layer is between the second electrode and the third electrode, in which a thermal expansion coefficient of the first electrode is greater than a thermal expansion coefficient of the dielectric layer, and a work function of the second electrode is higher than a work function of the first electrode.
The thermal expansion coefficient of the first electrode may be greater than or equal to 6.0×10−6/K and less than or equal to 8.0×10−6/K.
A work function of the second electrode may be greater than or equal to 4.0 eV and less than or equal to 7.0 eV.
A thickness of the second electrode may be less than or equal to about 1/10 of a thickness of the first electrode.
A magnitude of a tensile strain in the dielectric layer may be based on a difference between the thermal expansion coefficient of the first electrode and the thermal expansion coefficient of the dielectric layer.
The above and other aspects, features, and advantages of certain embodiments of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
Reference will now be made in detail to some embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the present embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the embodiments are merely described below, by referring to the figures, to explain aspects. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.
Hereinafter, various embodiments disclosed herein will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals denote like components, and sizes of components in the drawings may be exaggerated for convenience of explanation. Meanwhile, embodiments to be described are merely examples, and various modifications may be made from such embodiments.
When an expression “above” or “on” may include not only “directly on/under/at left/right contact”, as well as “on/under/at left/right contactless” unless expressly indicated otherwise. For example, it will be understood that such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures, and that the device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative terms used herein interpreted accordingly. Singular forms include plural forms unless apparently indicated otherwise contextually. When a portion is referred to as “comprises” a component, the portion may not exclude another component but may further include another component unless stated otherwise. When the terms “about” or “substantially” are used in this specification in connection with a numerical value, it is intended that the associated numerical value includes a manufacturing tolerance (e.g., ±10%) around the stated numerical value. Further, regardless of whether numerical values are modified as “about” or “substantially,” it will be understood that these values should be construed as including a manufacturing or operational tolerance (e.g., ±10%) around the stated numerical values.
The use of the terms of “the above-described” and similar indicative terms may correspond to both the singular forms and the plural forms. When there is an explicit description of the order of operations of the method or there is no description contrary thereto, these operations may be performed in an appropriate order and the order is not necessarily limited to the described order.
The functional elements described herein using terms such as “unit” indicate a unit for processing at least one function or operation, and may be implemented in processing circuitry such as hardware, software, and/or a combination of hardware and software. For example, the processing circuitry more specifically may include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a System-on-Chip (SoC), a programmable logic unit, a microprocessor, application-specific integrated circuit (ASIC), etc. The processing circuitry may include electrical components such as at least one of transistors, resistors, capacitors, etc., and/or electronic circuits including said components. For example, the processing circuitry may include electrical components such as logic gates including at least one of AND gates, OR gates, NAND gates, NOT gates, etc., and/or electronic circuits including said components.
Terms such as “first”, “second”, and the like may be used to describe various elements, but the elements should not be limited to those terms. These terms may be used to distinguish one element from another element.
Connections of lines or connection members between components shown in the drawings are illustrative of functional connections and/or physical or circuit connections, and in practice, may be represented as alternative or additional various functional connections, physical connections, or circuit connections.
The use of all examples or exemplary terms is only to describe technical spirit in detail, and the scope is not limited by these examples or terms unless limited by the claims.
Referring to
A material of the first electrode 110 may be selected to guarantee conductivity as an electrode and to maintain stable capacitance performance even after a high-temperature process in a process of manufacturing the capacitor 100. For example, the material of the first electrode 110 may be, or include, a metallically conductive material selected based on the lattice parameters, the stability of the material, the interaction of the material with other contacting materials, and/or the like.
The first electrode 110 may include metal, a conductive metal nitride, a conductive metal oxide, and/or a combination thereof. For example, the first electrode 110 may include Ti, Ni, Al, Ta, Mo, V, Mg, Nb, TiN, MoN, CoN, TaN, W, Ru, RuO2, SrRuO3, Ir, IrO2, Pt, PtO, and/or a combination thereof.
The second electrode 120 may be arranged between the first electrode 110 and the dielectric layer 130. The second electrode 120 may be provided on the first electrode 110. The second electrode 120 may directly contact the first electrode 110. The second electrode 120 may have a material selected based on a desired capacitance. For example, the material may be selected based on the permittivity of the material and the thickness of the capacitor 100 to implement a capacitor with the desired capacitance. As the degree of integration of an integrated circuit device included in the capacitor 100 increases, a space occupied by the capacitor 100 gradually decreases and thus a high-permittivity dielectric may be required. The second electrode 120 may use a metal oxide including at least one metal selected from among Ca, Sr, Ba, Sc, Y, La, Ti, Hf, Zr, Nb, Ta, Ce, Pr, Nd, Gd, Dy, Yb, and/or Lu. For example, the second electrode 120 may include HfO2, ZrO2, CeO2, La2O3, Ta2O3, or TiO2. However, the disclosure is not limited thereto.
A thickness of the first electrode 110 may be greater than that of the second electrode 120. In at least one embodiment, a ratio of the thickness of the first electrode 110 and the second electrode 120 is set such that the second electrode 120 does not prevent the formation of strain in the dielectric due to a difference in thermal expansion coefficients between the first electrode 110 and the dielectric layer 130, as described below in further detail. For example, in at least one embodiment, the thickness of the second electrode 120 may be less than or equal to about 1/10 of that of the first electrode 110.
For example, in at least one embodiment, the thickness of the first electrode 110 may be greater than or equal to 10 nm, and the thickness of the second electrode 120 may be less than or equal to about 1 nm.
The dielectric layer 130 included in the capacitor 100 needs to minimize a leakage current resulting from high integration.
In this regard, by inserting a high work function material between a dielectric layer (e.g., the dielectric layer 130) and an electrode including a conductive material such as metal (e.g., the first electrode 11), a leakage current may be minimized.
For example, a work function of the second electrode 120 may be higher than that of the first electrode 110. For example, the work function of the second electrode 120 may be about 4.0 eV or higher and about 7.0 eV or lower. For example, without being necessarily limited thereto, in at least one example, the work function of the second electrode 120 may be about 4.5 eV.
The leakage current of the capacitor 100 may be reduced or minimized due to the high work function of the second electrode 120. Work function characteristics of the second electrode 120 may be classified as electrical characteristics that may be manifested in case of relatively thin thicknesses, unlike mechanical characteristics.
The dielectric layer 130 may be arranged above the first electrode 110 and the second electrode 120.
The dielectric layer 130 may include at least one of a hafnium oxide, a zirconium oxide, a titanium oxide, a barium oxide, and/or a strontium oxide. In at least one embodiment, the dielectric layer 130 includes a different material than the second electrode 120. The materials of the dielectric layer 130 and the second electrode 120 may be selected based on the thermal expansion coefficients and work functions of the materials, as described in further detail below.
For meet the demands for applications in an electronic device or a semiconductor device (e.g., as a component of dynamic random-access memory (DRAM)) with high integration requirements, a dielectric layer of a capacitor must have both high permittivity and low leakage current characteristics even in cases with thin thicknesses (less than about 15 nm). However, the disclosure is not limited thereto.
The third electrode 140 may be arranged on the dielectric layer 130.
The third electrode 140 may include metal, a conductive metal nitride, a conductive metal oxide, and/or a combination thereof, like the first electrode 110. In at least one embodiment, the third electrode 140 may comprise one or more material layers.
For example, the third electrode 140 may use a metal oxide including at least one metal selected from among Ca, Sr, Ba, Sc, Y, La, Ti, Hf, Zr, Nb, Ta, Ce, Pr, Nd, Gd, Dy, Yb, and/or Lu. However, the disclosure is not limited thereto.
In at least one example embodiment, the third electrode 140 may include HfO2, ZrO2, CeO2, La2O3, Ta2O3, and/or TiO2. For example, the third electrode 140 may include at least one layer of HfO2, ZrO2, CeO2, La2O3, Ta2O3, or TiO2. However, the disclosure is not limited thereto.
Referring to
The thermal expansion coefficient may refer to a result of calculating a change in length and/or volume as result in a change in the temperature of a material by 1° C. with respect to a length (or volume) at a temperature of 0° C. of the material. A material having a higher thermal expansion coefficient may experience more changes in physical length or volume for a change in unit temperature.
For example, when a material with a relatively high thermal expansion coefficient adjoins a material with a relatively low thermal expansion coefficient, strain may occur between the materials during a temperature change from a high-temperature state to a low-temperature state, because of the different degrees of thermal expansion between the materials.
More specifically, because a material with a high thermal expansion coefficient contracts much faster than a material with a relatively low thermal expansion coefficient an in-plane strain (e.g., compressive strain) may occur in the material with the high thermal expansion coefficient and out-of-plane strain (e.g., tensile strain) may occur in perpendicular to a contact surface in the material with the low thermal expansion coefficient while the materials cool from the high-temperature state. For example, in at least one embodiment, the temperature of the first electrode 110 may be increased to a high-temperature during the deposition of the dielectric layer 130 onto the second electrode 120. Then, during a cooling process, strain is created due to the difference in thermal expansion coefficients. In at least one embodiment, the strain is maintained even during temperature fluctuations occurring during the normal operation of the capacitor 100.
In at least one embodiment, the rate of cooling is controlled to prevent delamination and/or to control the rate of change in and magnitude of the in-plane and/or out-of-plane stress. In at least one embodiment, the second electrode 120 may serve as an intermediary or buffer layer, such that the second electrode 120 mitigates and/or prevents delamination during the heating and cooling periods. In at least one embodiment, the second electrode 120 serves as a buffer to mitigate or prevent the occurrence of the in-plane and out-of-plain strain from temperature fluctuations occurring during the normal operation of the capacitor 100. Further, as described above, in at least one embodiment, the second electrode 120 increases the work function for leakage current in the capacitor 100.
As such, in at least one embodiment, a phase change in the material of the dielectric layer 130 is induced due to the stress resulting from the thermal expansion coefficient of the first electrode 110 being higher than that of the dielectric layer 130. In at least one embodiment, the stress may help stabilize the phase of the dielectric layer 130.
In at least one embodiment, the thermal expansion coefficient of the first electrode 110 may be greater than or equal to 6.0×10−6/K and/or less than or equal to about 8.0×10−6/K. For example, in at least one example embodiment, the thermal expansion coefficient of the first electrode 110 may be greater than or equal to 7.3×10−6/K, without being limited thereto.
The thermal expansion coefficient of the dielectric layer 130 may be less than or equal to about 6.0×10−6/K, without being limited thereto.
As the thermal expansion coefficient of the first electrode 110 is higher than that of the dielectric layer 130, a physical change of the first electrode 110 may be even higher than that of the dielectric layer 130 during a temperature change from a high temperature back to a low temperature in the process of manufacturing the capacitor 100 as described above. Thus, in-plane strain in a direction parallel to the contact surface between the first electrode 110 and the dielectric layer 130 may occur, and out-of-strain in a direction perpendicular to the contact surface may occur. That is, strain in a certain direction may occur due to mismatch in thermal expansion coefficient between materials included in different layers.
The hafnium oxide, the zirconium oxide, the titanium oxide, the barium oxide, and the strontium oxide included in the dielectric layer 130 may react to strain change in terms of permittivity (dielectric constant).
For example, in the hafnium oxide and/or the zirconium oxide of the dielectric layer 130, as the out-of-plane strain (or tensile strain) in the direction perpendicular to the contact surface between the first electrode 110 and the dielectric layer 130 increases, lattice strain occurs, which increases the permittivity (dielectric constant) of the dielectric layer 130.
The tensile strain applied to the dielectric layer 130 may be determined according to a difference in thermal expansion coefficient between the first electrode 110 and the dielectric layer 130, and the tensile strain may be applied in a thickness direction of the first electrode 110.
Mismatch in thermal expansion coefficient may occur according to a difference in thermal expansion coefficient between materials included in different layers, and lattice strain may occur due to certain strain occurring with the mismatch, and the permittivity of the dielectric layer 130 included in the capacitor 100 may change with the lattice strain.
The thermal expansion coefficient characteristics of the first electrode 110 may be mechanical characteristics, and may be expressed strongly in the thickness direction of the capacitor, unlike the electrical characteristics. In spite of thick thickness or presence of an additional insertion film in the thickness direction, the mechanical characteristics may be expressed. Thus, in case of insertion of the second electrode 120 between the first electrode 110 and the dielectric layer 130 as well as direct contact between the first electrode 110 and the dielectric layer 130, strain and mechanical characteristic expression may occur due to a difference in thermal expansion coefficient between the first electrode 110 and the dielectric layer 130.
Referring to
The hafnium oxide included in the dielectric layer 130 may include, for example, HfO2, which may have a tetragonal and/or orthogonal system according to a certain condition. In at least one embodiment, the rate of cooling may be controlled such that the dielectric layer includes HfO2 primarily of the tetragonal phase. HfO2 having the tetragonal system may have a higher permittivity (dielectric constant) and a more unstable phase than those of HfO2 having the orthogonal system.
As the in-plane strain in the direction parallel to the contact surface between the dielectric layer 130 and the first electrode 110 is applied, an area of the contact surface may be reduced, which leads to reduction in an energy difference between the tetragonal system and the orthogonal system, thereby stabilizing the more unstable tetragonal phase.
As the dielectric layer with the high permittivity is required with high integration of the capacitor, HfO2 having the tetragonal system with a relatively high permittivity (dielectric constant) may be stabilized in terms of energy and an energy difference between two phases may almost disappear with further reduction in the area of the contact surface.
Referring to
The aforementioned in-plane strain in the direction parallel to the contact surface may generate the out-of-plane strain in the direction perpendicular to the contact surface according to the Poisson's ratio.
In the zirconium oxide included in the dielectric layer 130, a permittivity (dielectric constant (represented by varepsilono or εo)) increases as the out-of-plane strain increases. Thus, the in-plane strain may contribute to improvement of the permittivity (dielectric constant) of the dielectric layer 130 as well as to energy stabilization of the aforementioned tetragonal system.
The capacitor 100 of
Referring to
Referring to
For example, one of electrodes of the capacitor 100 and one of a source 320 or a drain 330 of the transistor 300 may be electrically connected to each other by the contact 62. The contact 62 may include an appropriate conductive material, e.g., tungsten, copper, aluminum, polysilicon, etc.
The transistor 300 may include a substrate including the source 320, the drain 330, and a channel 310, and a gate electrode 350 opposing the channel 310. A gate insulating layer 340 may be further included between the substrate and the gate electrode 350.
The source 320 and the drain 330 may be formed of a conductive material, and each of which may independently include, for example, metal, a metal compound, or a conductive polymer. In at least one example embodiment, channel 310, the source 320, and/or the drain 330 may be formed by doping the substrate.
The source 320, the drain 330, the channel 310, the substrate, and the gate electrode 350 may be the same as those of a typical field-effect transistor.
Arrangement of the capacitor 100 and the transistor 300 may be changed variously. For example, the capacitor 100 may be arranged on the substrate or may be buried in the substrate.
A semiconductor element and a semiconductor device may be applied to various electronic devices. For example, the field-effect transistor, the capacitor, or the combination thereof described above may be applied as a logic element and/or a memory element in various electronic devices. A semiconductor element according to embodiments may be useful in terms of efficiency, speed, and power consumption, thus responding to demands for miniaturization and integration of electronic devices. More specifically, the semiconductor element and the semiconductor device may be used for arithmetic operations, program execution, temporary data retaining, etc., in an electronic device such as a mobile device, a computer, a laptop computer, a sensor, a network device, a neuromorphic device, etc. The semiconductor element and the semiconductor device according to embodiments may be useful for electronic devices with large data transmission volume and continuous data transmission.
Referring to
Each of the memory unit 1010, the ALU 1020, and the control unit 1030 may independently include the above-described semiconductor device (a field-effect transistor, a capacitor, etc.). For example, each of the ALU 1020 and the control unit 1030 may independently include the above-described field-effect transistor, and the memory unit 1010 may include the above-described capacitor, field-effect transistor, or a combination thereof. The memory unit 1010 may include both a main memory and a cache memory. The electronic device architecture (chip) 1000 may be an on-chip memory processing unit.
Referring to
Depending on a circumstance, the electronic device architecture may be implemented in a form where computing-unit devices and memory-unit devices are adjacent to each other in one chip, without distinction of sub-units.
The capacitor according to at least one embodiment may minimize the leakage current thereof by the electrode having a high work function. The capacitor according to at least one embodiment may improve a permittivity (dielectric constant) of the dielectric layer through lattice strain caused by strain occurring due to a difference in thermal expansion coefficient between the electrode and the dielectric layer. However, effects of the disclosure are not limited to the above disclosure.
While the above-described capacitor, semiconductor device, and the electronic device including the same have been described with reference to the embodiments described in the drawings, it will be understood by those of ordinary skill in the art that various modifications and equivalent other embodiments are possible therefrom. Therefore, the disclosed embodiments should be considered in a descriptive sense rather than a restrictive sense. The scope of the present specification is not described above, but in the claims, and all the differences in a range equivalent thereto should be interpreted as being included.
Although the embodiments have been described above, these are merely examples and various changes may be made therefrom by those of ordinary skill in the art.
It should be understood that embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments. While one or more embodiments have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2022-0186384 | Dec 2022 | KR | national |
