Patent Application
20190172649
This disclosure generally relates to a ceramic-wound-capacitor, and more particularly relates to a ceramic-wound-capacitor with an antiferroelectric lead-lanthanum-zirconium-titanate dielectric material.
It is known that the class of high voltage, film wound-capacitors, used in today's electric vehicle invertors, require large packaging volumes. The primary feature driving the physical size of the film wound-capacitor is the thickness of the film upon which the capacitive elements are applied and subsequently wound. The film also performs the function of a substrate, or carrier-strip, during fabrication of the wound-capacitor. Typical carrier-strips are polymer materials that have thicknesses greater than 50 micrometers (50 μm), and are many times thicker than the layers that make up or form the capacitive elements. When wound, the thick carrier-strip becomes the largest contributor to the diameter of the finished capacitor. Disadvantageously, fabricating film wound-capacitors using thinner carrier-strips is more expensive, due to the increased cost of the thinner material, and due to the greater occurrence of film breakage during manufacturing, leading to increased equipment down-time. Another disadvantage of today's film capacitors, is that the service temperature is limited by the film material, which can be as low as 85 degrees Celsius (85° C.).
Described herein is a high voltage ceramic-wound-capacitor that can be wound without including the carrier-strip in the final assembly and is manufactured using film capacitor fabrication methods.
In accordance with one embodiment, a ceramic-wound-capacitor is provided. The ceramic-wound-capacitor includes a first-electrically-conductive-layer that defines an exposed-surface. The ceramic ceramic-wound-capacitor also includes an antiferroelectric dielectric-layer formed of lead-lanthanum-zirconium-titanate in direct contact with the first-electrically-conductive-layer opposite the exposed-surface. The ceramic-wound-capacitor also includes a second-electrically-conductive-layer in direct contact with the dielectric-layer opposite the first-electrically-conductive-layer. The ceramic-wound-capacitor also includes a protective-coating in direct contact with the exposed-surface. The protective-coating is characterized by a thickness of less than 10 micrometers, wherein the first-electrically-conductive-layer, the dielectric-layer, the second-electrically-conductive-layer, and the protective-coating form a capacitive-element, and the capacitive-element is wound to form a ceramic-wound-capacitor.
Further features and advantages will appear more clearly on a reading of the following detailed description of the preferred embodiment, which is given by way of non-limiting example only and with reference to the accompanying drawings.
The present invention will now be described, by way of example with reference to the accompanying drawings, in which:
The ceramic-wound-capacitor 10 includes a first-electrically-conductive-layer 20. By way of example and not limitation, the first-electrically-conductive-layer 20 may be deposited by the known electron-beam evaporation process. Preferably the first-electrically-conductive-layer 20 is aluminum, with a thickness of 100 nanometers (nm) to a thickness of 200 nm, and preferably 120 nm. Alternatively, the first-electrically-conductive-layer 20 may be formed of platinum, copper, or nickel. The first-electrically-conductive-layer 20 preferably allows oxygen molecules to permeate its cross section.
A first-side of the first-electrically-conductive-layer 20 defines an exposed-surface 25. An opposite-side 26 of the first-electrically-conductive-layer 20 that is opposite the exposed-surface 25 is in direct contact with a dielectric-layer 30. The dielectric-layer 30 is advantageously formed of an antiferroelectric lead-lanthanum-zirconium-titanate which is may be, by way of non-limiting example only, (Pb0.97 La0.02 )(Zr0.92 Sn0.05 Ti0.03 )O3. The antiferroelectric lead-lanthanum-zirconium-titanate is a ceramic material that has a high dielectric constant and is capable of operating at temperatures as high as 150° C. The antiferroelectric lead-lanthanum-zirconium-titanate is generally considered to have a flat distribution of capacitance over voltage, frequency and temperature. Empirical testing has indicated that a thickness for the antiferroelectric lead-lanthanum-zirconium-titanate layer of 8 μm provides for a good balance between dielectric breakdown and reliability. The use of antiferroelectric lead-lanthanum-zirconium-titanate has demonstrated low dielectric loss, low coercive field, low remnant polarization, high energy density, high material efficiency, and fast discharge rates.
A second-electrically-conductive-layer 40, is in direct contact with the dielectric-layer 30, on the side opposite of the first-electrically-conductive-layer 20. Aluminum, with a thickness of 100 nanometers (nm) to a thickness of 200 nm, and preferably 200 nm, may form the second-electrically-conductive-layer 40. Alternatively, the second-electrically-conductive-layer 40 may be formed of platinum, copper, or nickel.
A protective-coating 50 of less than 10 μm is in direct contact with the exposed-surface 25 of first-electrically-conductive-layer 20. The protective-coating 50 may be formed of a poly-para-xylylene, such as one from the PARYLENE® family of coatings manufactured by Specialty Coating Systems of Somerville, N.J., USA. The thickness of the protective-coating 50 is ideally less than ten micrometers (10 μm ), to minimize the diameter of the ceramic-wound-capacitor 10. The protective-coating 50 preferably allows oxygen molecules to permeate its cross section. The minimum thickness of the protective-coating 50 is dependent upon the designed maximum applied voltage across the ceramic-wound-capacitor 10, and the dielectric properties of the protective-coating-material, and can be calculated by one skilled in the art of capacitor design.
The first-electrically-conductive-layer 20, the dielectric-layer 30, the second-electrically-conductive-layer 40, and the protective-coating 50, form a capacitive-element 60, and the capacitive-element 60 is wound to form the ceramic-wound-capacitor 10. Upon winding the capacitive-element 60, the protective-coating 50 and the second-electrically-conductive-layer 40 are placed in direct contact.
By way of example, one non-limiting embodiment of a seven-hundred micro-Farad (700 μF) ceramic-wound-capacitor 10 would use a 2.4 μm thickness of a poly-para-xylylene for the protective-coating 50. The resulting capacitor would have a diameter of 6.0 centimeters (cm), compared to a diameter of 11.5 cm for the equivalent capacitor fabricated with a 50 μm thick carrier-strip 80 that is left in place. This results in a 48 percent reduction in the diameter of the capacitor, which translates into a 73 percent reduction in the volume of the ceramic-wound-capacitor 10, and would have a significant benefit in packaging the component.
Another non-limiting embodiment would utilize a layer of an antiferroelectric lead-lanthanum-zirconium-titanate, which may be, by way of non-limiting example only, (Pb0.97 La0.02 )(Zr0.92 Sn0.05 Ti0.03 )O3 as the protective-coating 50. As with the poly-para-xylylene coating material previously described, the minimum thickness of the antiferroelectric lead-lanthanum-zirconium-titanate for the protective-coating 50 is dependent upon the designed maximum applied voltage across the ceramic-wound-capacitor 10, and the dielectric properties of the antiferroelectric lead-lanthanum-zirconium-titanate.
Step 75, FEED CARRIER STRIP, may include a carrier-strip 80 formed of a polymeric compound, such as a polyimide or a polyester, with a thickness of 50 μm. The width of the carrier-strip 80 may vary from the designed width for one instance of the ceramic-wound-capacitor 10, or several wound-capacitors to allow for a subsequent slitting operation.
Step 90, DEPOSIT SACRIFICIAL LAYER, may include a photoresist material, such as AZ4999® from AZ Electronic Materials Corporation of Somerville, N.J., USA. The photoresist may be applied using the manufacturer's spray, soft-bake and ultra-violet (UV) light exposure recommendations. The sacrificial-layer 95 with a thickness of 5 μm to a thickness of 15 μm, and preferably 10 μm, is adequate to provide a stable and flexible substrate on which to deposit the subsequent layers.
Step 100, DEPOSIT FIRST ELECTRICALLY CONDUCTIVE LAYER, may be one of platinum, nickel, copper, and aluminum, utilizing an evaporative deposition process, such as electron-beam evaporation. Preferably the first-electrically-conductive-layer 20 is aluminum, with a thickness of 100 nm to a thickness of 200 nm, and preferably 120 nm, which provides adequate electrical conductivity and flexibility. The first-electrically-conductive-layer 20 preferably allows oxygen molecules to permeate its cross section.
Step 110, DEPOSIT DIELECTRIC LAYER, is performed by an aerosol spray process at a temperature between 10 degrees Celsius and 38 degrees Celsius. The dielectric-layer 30 is advantageously formed of antiferroelectric lead-lanthanum-zirconium-titanate. The antiferroelectric lead-lanthanum-zirconium-titanate is a ceramic material that has a high dielectric constant and is capable of operating at temperatures as high as 150° C. The antiferroelectric lead-lanthanum-zirconium-titanate has a flat distribution of capacitance over voltage, frequency and temperature. Empirical testing has indicated that a thickness for the antiferroelectric lead-lanthanum-zirconium-titanatelayer of 8 μm provides for a good balance between dielectric breakdown and reliability. This deposition process is desirable in that the antiferroelectric lead-lanthanum-zirconium-titanatematerial is a ceramic that would typically require a firing process in excess of 650° C. to sinter the particles into a solid monolithic structure. The aerosol spray process creates friction between the air-born ceramic antiferroelectric lead-lanthanum-zirconium-titanate particles to generate the required heat to sinter the particles together upon deposition onto the first-electrically-conductive-layer 20. Using conventional ceramic processing methods, the firing temperatures required to sinter the antiferroelectric lead-lanthanum-zirconium-titanate particles, would melt the carrier-strip 80 when formed of a polymer. Advantageously, it is the ability to deposit the antiferroelectric lead-lanthanum-zirconium-titanate at temperatures below the melting point of the carrier-strip 80 when formed of polymer that enables the film processing method 200 described herein.
Step 120, DEPOSIT SECOND ELECTRICALLY CONDUCTIVE LAYER, may be one of platinum, nickel, copper, and aluminum, utilizing an evaporative deposition process, such as electron-beam evaporation. Aluminum, with a thickness of 100 nanometers (nm) to a thickness of 200 nm, and preferably 200 nm, may form the second-electrically-conductive-layer 40, and provides adequate electrical conductivity and flexibility.
Step 130, SEPARATE ARRANGEMENT, may include the use of a solvent to dissolve the sacrificial-layer 95, such as AZ Kwik Strip® manufactured by AZ Electronic Materials Corporation of Somerville, N.J., USA. The solvent may be applied by spray, or by immersion of the arrangement 140 coupled to the carrier-strip 80 into a solvent bath, and does not deleteriously affect the capacitive-element 60. After separation from the arrangement 140, the carrier-strip 80 is now devoid of the sacrificial-layer 95.
Step 135, WIND CARRIER STRIP, the carrier-strip 80 is collected on the carrier-strip-take-up-reel 180 where it can be recycled to the beginning of the process.
Step 150, APPLY PROTECTIVE COATING, may utilize a spray process of a poly-para-xylylene, such as one from the PARYLENE® family of coatings manufactured by Specialty Coating Systems of Somerville, N.J., USA. The thickness of the protective-coating 50 is ideally less than ten micrometers (10 μm), to minimize the diameter of the ceramic-wound-capacitor 10. The protective-coating 50 preferably allows oxygen molecules to permeate its cross section. The minimum thickness of the protective-coating 50 is dependent upon the designed maximum applied voltage across the ceramic-wound-capacitor 10, and the dielectric properties of the protective-coating-material, and can be calculated by one skilled in the art of capacitor design.
Step 170, WIND ARRANGEMENT, is conducted by a capacitor-take-up-reel 175. The ceramic-wound-capacitor 10 is wound to a predetermined diameter, based on the desired capacitance of the ceramic-wound-capacitor 10. Alternatively, the arrangement 140 may be wound onto a spool for processing into individual capacitors at a later time. Upon winding the capacitive-element 60, the protective-coating 50 and the second-electrically-conductive-layer 40 are placed in direct contact.
Accordingly, a ceramic-wound-capacitor 10, an apparatus 70 for winding the ceramic-wound-capacitor 10, and a method 200 for winding a ceramic-wound-capacitor 10 is provided. By eliminating the carrier-strip 80 from the final capacitor assembly, a smaller diameter ceramic capacitor can be fabricated using a polymer film manufacturing process.
While this invention has been described in terms of the preferred embodiments thereof, it is not intended to be so limited, but rather only to the extent set forth in the claims that follow.
This application is a continuation-in-part application of U.S. patent application Ser. No. 15/447,857, filed on Mar. 2, 2017 and claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 62/323,893, filed Apr. 18, 2016, the entire disclosures of which are hereby incorporated herein by reference in their entirety.
This is an invention jointly developed by Argonne National Lab and Delphi Automotive System, LLC. The United States Government has rights in this invention pursuant to Contract No. DE-AC02-06CH11357 between the United States Government and UChicago Argonne, LLC representing Argonne National Laboratory and pursuant to Sub Contract No. 4F-31041 between the United States Government/Department of Energy (Argonne National Laboratory) and Delphi Automotive Systems, LLC.
| Number | Date | Country | |
|---|---|---|---|
| 62323893 | Apr 2016 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 15447857 | Mar 2017 | US |
| Child | 16190477 | US |
