Claims
- 1. A method for manufacturing a charge transfer device comprising the steps:preparing a semiconductor substrate having a semiconductor layer of a first conductivity type formed on a principal surface thereof; forming a first semiconductor region of a second conductivity type opposite to said first conductivity type, in said semiconductor layer of said first conductivity type; forming a first insulator film to cover said first semiconductor region of said second conductivity type; forming a plurality of first transfer electrodes on said first insulator film, with predetermined intervals; removing said first insulator film which is not covered with said first transfer electrodes; forming a second insulator film to cover said first semiconductor region of said second conductivity type between each pair of adjacent first transfer electrodes, and a third insulator film to cover a top surface and a side surface of each of said first transfer electrodes; introducing an impurity of said second conductivity type into said first semiconductor region of said second conductivity type, using said first transfer electrodes and said third insulator film as a mask, to form a second semiconductor region of said second conductivity type; and forming a plurality of second transfer electrodes each formed on said second insulator film on said second semiconductor region of said second conductivity type between each pair of adjacent first transfer electrodes and having opposite ends to partially overlap an adjacent end of the pair of adjacent first transfer electrodes.
- 2. A method claimed in claim 1 wherein said ion implantation of said impurity of said second conductivity type is carried out at a desired incident angle inclined in a charge transfer direction so that said first semiconductor region of said second conductivity type remains to extend from under each of said first transfer electrodes and said third insulator film, to under said second insulator film on which there is located said second transfer electrode which cooperates said first transfer electrode to form a transfer electrode pair.
- 3. A charge transfer device claimed in claim 2 wherein said first semiconductor region extends under said second insulator film by a distance in the range of 0.5 times to 2.0 times of a thickness of said second insulator film.
- 4. A method claimed in claim 1 wherein said ion implantation of said impurity of said second conductivity type is carried out at a desired incident angle inclined in a charge transfer direction and at another desired incident angle inclined in a direction opposite to said charge transfer direction, so that a third semiconductor region and a fourth semiconductor region are formed at opposite ends of said second semiconductor region, respectively, in conjunction with said second semiconductor region.
- 5. A method claimed in claim 4 wherein each of said third semiconductor region and said fourth semiconductor region has a size in the range of 0.5 times to 2.0 times of a thickness of said second insulator film.
- 6. A method claimed in claim 1 wherein said semiconductor layer of said first conductivity type is constituted of a well of said first conductivity type formed at a surface of a semiconductor substrate of said second conductivity type, or of a semiconductor substrate of said first conductivity type.
- 7. A method claimed in claim 1 wherein said second insulator film and said third insulator film are formed in the same step.
- 8. A method claimed in claim 1 wherein said second insulator film and said third insulator film are formed of the same material.
- 9. A method claimed in claim 1, wherein the first conductivity type is a P-type conductivity type and the second conductivity type is an N-type conductivity type.
- 10. A method claimed in claim 1, wherein the impurity of said second conductivity type comprises phosphorous ions.
- 11. A method claimed in claim 10, wherein the first conductivity type is a P-type conductivity type and the second conductivity type is an N-type conductivity type.
- 12. A method claimed in claim 1, wherein each of said first charge transfer electrodes is formed to cover an N−− type semiconductor region and each of the second charge transfer electrodes is formed to cover an N-type semiconductor region.
- 13. A method claimed in claim 1, wherein the first semiconductor region comprises an N−− region and the second semiconductor region comprises an N− region.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9-172387 |
Jun 1997 |
JP |
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Parent Case Info
The present Application is a Divisional Application of U.S. patent application Ser. No. 09/106,005, filed Jun. 29, 1998 now U.S. Pat. No. 6,097,044.
US Referenced Citations (22)
Foreign Referenced Citations (3)
Number |
Date |
Country |
62-71273 |
Apr 1987 |
JP |
3-6836 |
Jan 1991 |
JP |
4-247629 |
Sep 1992 |
JP |
Non-Patent Literature Citations (2)
Entry |
C.K. Kim, “Two-Phase Charge Coupled Linear Imaging Devices with Self-Aligned Implanted Barrier”, IEDM Technical Digest, 1974, pp. 55-58. |
Japanese Office Action dated Jun. 1, 1999 with partial translation. |