The present invention relates to a chip-like electric component and a manufacturing method of the chip-like electric component.
In a chip resistor, which is a kind of comparatively large chip-like electric component, a resistor body or the like is formed of a thick film. Soldering electrodes are also each formed of a thick film. In some comparatively small resistors, electrodes and resistor bodies are formed, using only a thin-film forming technology. Further, in some comparatively small resistors, soldering electrodes are formed by a combination of a thick film and a thin film.
In a chip resistor manufacturing method described in Japanese Patent Application Publication No. 1988-172401 (JP1988-172401A), an alumina substrate for obtaining a large number of or multiple chip resistors is employed. The alumina substrate is capable of being cut and separated in order to obtain individual chip substrates. First, a plurality of thick-film resistor body layers made of RuO2 are formed on the surface of the alumina substrate in a longitudinal direction at constant intervals, by screen printing or the like. Next, at least one pair of C-letter shaped side electrodes are formed so that the side electrodes continuously cover both end portions of the thick-film resistor body layers, both side surfaces of the alumina substrate, and both end portions of the back surface of the alumina substrate. Thin-film forming techniques such as sputtering and ion plating are used in forming the side surface electrodes. Further, a glass coat is formed to cover the entire surface of each resistor body. The glass coat is formed as a protection film when resistance trimming is performed. After the glass coat has been formed, laser trimming is performed. After the trimming has been finished, a protection coat made of glass or the like is formed on the surface of each glass coat. Then, the alumina substrate is cut into individual chip substrates, thereby completing the manufacture of the chip resistors. According to this related art, the thickness of each electrode may be reduced. Consequently, the size of the chip resistor may be reduced.
Japanese Patent Application No. 11-307304 (JP11-307304A) discloses a structure of a chip resistor and a manufacturing method of the chip resistor. In the chip resistor, a pair of surface electrodes are formed on the surface of a ceramic substrate using a thick film. A base electrode layer is then formed on each surface electrode using a thin-film forming technique such as sputtering. A plated Layer is further formed on the base electrode layer.
However, the more the size of the component is reduced, a comparatively large height difference is made between a soldering electrode portion and an overcoat even when each of the surface electrodes is formed of the thick film as in the chip resistor or chip-like electric component described in JP11-307304A. Due to the presence of this height difference, the following problem arises. When the component is suctioned by a vacuum suction nozzle, a force applied to the insulating substrate may cause a crack or fracture of the insulating substrate. An additional layer may be formed on the surface electrodes in order to reduce such a height difference. However, when the size of the component is reduced, a problem arises that manufacture of the component becomes difficult and the cost of the component is increased.
An object of the present invention is to provide a chip-like electric component that has solved the above-mentioned problems.
A specific object of the present invention is to provide a chip-like electric component such as a chip resistor which is easy to manufacture and in which cracks or fractures of an insulating substrate have been prevented without increasing the cost.
A chip-like electric component targeted by the present invention uses an insulating substrate made of ceramic, including a front surface and a back surface facing the front surface. A pair of surface electrodes based on metal glaze is provided at both end portions of the front surface of the insulating substrate. The pair of surface electrodes based on metal glaze may be formed by printing a paste by screen printing. The paste may be obtained by kneading conductive powder of Ag or the like into glass, for example. The chip-like electric component has an electrical element layer electrically connected to the pair of surface electrodes and formed on the front surface. The electric element layer is a resistor layer when the chip-like electric component is a chip resistor. When the chip-like electric component is an inductor, the electrical element layer is a conductor layer. The chip-like electric component may be a capacitor or the like. The chip-like electric component includes an insulating protective layer made of an electrical insulating material. The insulating protective layer covers entirely the electrical element layer and partly the pair of surface electrodes adjacent to the electrical element layer. The chip-like electric component further includes a thin-film conductive layer for covering at least portions of the pair of surface electrodes that are not covered with the insulating protective layer. The thin-film conductive layer includes at least one plated layer. A soldering electrode portion is formed of each surface electrode and the thin-film conductive layer.
In the present invention, the pair of surface electrodes are formed so that thicknesses of the pair of surface electrodes increase from the electrical element layer toward a pair of end portions of the insulating substrate positioned in a direction in which the pair of surface electrodes are arranged. When the surface electrodes of such a shape are employed, a plating reservoir is formed between each surface electrode and the insulating protective layer. For that reason, a plated metal pools in the plating reservoir when the at least one plated layer is formed. The at least one plated layer may work to reduce to some extent a height difference between the soldering electrode portion and the protective layer. Accordingly, the height difference may be reduced without providing an additional layer for reducing the height difference. The larger the number of layers of the at least one plated layer is, the more the height difference is reduced.
Preferably, the thin-film conductive layer may include a base conductive layer formed by sputtering or evaporation for covering the portions of the surface electrodes that are not covered with the insulating protective layer and the at least one plated layer formed on the base conductive layer. With this arrangement, the at least one plated layer may be formed only on the base conductive layer without fail.
The base conductive layer may include extended conductive portions for covering side surfaces of the end portions of the insulating substrate adjacent to the surface electrodes. In this case, the at least one plated layer includes extended plated portions for covering the extended conductive portions. The extended plated layer portions form side surface electrodes of the insulating substrate. Thus, soldering strength may be increased.
The extended conductive portions may further extend to part of the back surface of the insulating substrate. In this case as well, the extended plated portions further extend to cover the extended conductive portions which extend to part of the back surface. As a result, the extended plated layer portions formed on the back surface of the insulating substrate work as back surface electrodes of the insulating substrate. The soldering strength may be further increased.
Preferably, the base conductive layer may include Cu, Ni, and Cr. Further, preferably, the at least one plated layer may be of a two-layer structure in which an Sn plated layer is formed on a Ni plated layer. With this structure, the base conductive layer and the at least one plated layer may be formed without fail.
When the specific chip resistor is formed of the chip-like electric component of the present invention, the electrical element layer should be formed of the resistor layer. Then, preferably, the insulating protective layer may comprise a glass layer for covering the resistor layer and an insulating resin layer for covering the glass layer. With this arrangement, resistance of the resistor layer may be prevented from varying after the resistor layer has been trimmed may be prevented.
A method of manufacturing a chip-like electric component of the present invention includes the following steps. In a first step, a plurality of electrode layers are formed on a front surface of a large-sized insulating substrate made of ceramic at predetermined intervals by screen printing, using a conductive paste based on metal glaze, to constitute columns of electrode layers and rows of electrode layers. In a next step, an electrical element layer is formed on the front surface of the large-sized insulating substrate by printing so that the electrical element layer extends across adjacent electrode layers included in the rows of electrode layers. In a next step, an insulating protective layer is formed by printing using an electrical insulating material so that the insulating protective layer covers entirely the electrical element layer and partly the pairs of electrode layers adjacent to the electrical element layer. In a next step, a plurality of slits are formed in the large-sized insulating substrate so as to halve each of the electrode layers included in the columns of electrode layers at a central portion of each electrode layer and then form a pair of surface electrodes at both end portions of the electrical element layer. In a next step, a base conductive layer is formed, by sputtering or evaporation, for covering portions of the pair of surface electrodes that are not covered with the insulating protective layer and inner surfaces of the slits. Then, in a next step, chip pieces each including the pair of surface electrodes, the electrical element layer, and the insulating protective layer are separated after the conductive layer has been formed. In a final step, at least one plated layer is formed on the base conductive layer of each of the separated chip pieces. Each electrode layer is formed by screen printing in a doomed shape in which the height of the central portion thereof is the highest, or a shape that is smoothly convex in a direction away from the front surface of the insulating substrate. When such a method of halving the electrode layer at the central portion of the electrode layer is employed, each of the pair of surface electrodes may be readily shaped to have a thickness that increases toward the end portions of the insulating substrate.
A chip-like electric component according to an embodiment of the present invention will be described below in detail with reference to drawings.
Reference numeral 3 in
In the step of
Next, as shown in
After the insulating protective layer 15 has been formed, a plurality of slits 25 are formed in the large-sized insulating substrate 3, as shown in
Next, as shown in
Then, after the base conductive layer 27 has been formed as shown in
Finally, at least one plated layer 33 is formed on the base conductive layer 27 of each separated chip piece 31. The plated layer 33 is formed on the extended conductive portions 27A of the base conductive layer 27 as well. Portions of the plated layer 33 formed on the extended conductive portions 27A constitute extended plated portions 33A. In this embodiment, the plated layer 33 is configured to have a two-layer structure in which an Sn plated layer 37 is formed on a Ni plated layer 35. The Ni plated layer 35 is formed by nonelectrolytic plating. The base conductive layer 27 and the plated layer 33 thus formed constitute a thin-film conductive layer 32, as shown in
The plated layer 33 is formed on the extended conductive portions 27A of the base conductive layer 27 as well, as shown in
In the chip resistor or chip-like electric component manufactured by the manufacturing method in this embodiment, thicknesses of the pair of the surface electrodes 21 and 23 increase from the resistor layer 13 toward a pair of the end portions 30 of the insulating substrate 29 positioned in a direction in which the pair of the surface electrodes 21 and 23 are arranged. When the surface electrodes 21 and 23 of such a shape are used, a plating reservoir S is formed between the insulating protective layer 15 and the surface electrode 21 or 23. For that reason, when forming the at least one plated layer 33 which includes the plated layers 35 and 37, the plated metal pools in the plating reservoir S. The at least one plated layer 33 may work to reduce to some extent a height difference between a soldering electrode portion, which is formed of the surface electrode 21 or 23, the base conductive layer 27, and the plated layer 33, and the insulating protective layer 15. Consequently, according to this embodiment, unlike a related art, the height difference may be reduced, without providing an additional layer for reducing the height difference. The larger the number of layers of the at least one plated layer 33 is, the more the height difference is reduced.
The insulating protective layers 15 and 115 are each formed of two layers in the above-mentioned embodiments. Of course, the insulating protective layers 15 and 115 may have a single-layer structure.
In the present invention, each pair of surface electrodes are formed so that the thicknesses of the pair of surface electrodes increase from the electrical element layer toward the end portions of the insulating substrate positioned in the direction in which the pair of surface electrodes are arranged. Accordingly, when the surface electrodes of such a shape are employed, the plating reservoir is formed between each surface electrode and the insulating protective layer. For that reason, when forming the at least one plated layer, the plated metal pools in the plating reservoir. The at least one plated layer may work to reduce the height difference between the soldering electrode portion and the protective layer. Accordingly, the height difference maybe reduced without providing the additional layer for reducing the height difference. The larger the number of layers of the at least one plated layer is, the more the height difference is reduced.
In the manufacturing method of the present invention, a method of halving each electrode layer at the central portion of the electrode layer is adopted. Consequently, a shape may be readily formed where the pair of surface electrodes become thicker toward the end portions of the insulating substrate.
Number | Date | Country | Kind |
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2008-148287 | Jun 2008 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2009/059952 | 6/1/2009 | WO | 00 | 12/2/2010 |
Publishing Document | Publishing Date | Country | Kind |
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WO2009/148009 | 12/10/2009 | WO | A |
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4792781 | Takahashi et al. | Dec 1988 | A |
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7825769 | Nomura et al. | Nov 2010 | B2 |
20040164842 | Kuriyama et al. | Aug 2004 | A1 |
Number | Date | Country |
---|---|---|
63-172401 | Jul 1988 | JP |
63-188903 | Aug 1988 | JP |
11-307304 | Nov 1999 | JP |
2000-091101 | Mar 2000 | JP |
2004-158696 | Jun 2004 | JP |
2004-259863 | Sep 2004 | JP |
2004-288806 | Oct 2004 | JP |
2007-042953 | Feb 2007 | JP |
2007-189122 | Jul 2007 | JP |
2008-084905 | Apr 2008 | JP |
Number | Date | Country | |
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20110080251 A1 | Apr 2011 | US |