Claims
- 1. A circuit block for use in programmable logic devices, comprising:
- a decoder;
- a random access memory having a plurality of bits addressed by said decoder;
- a read buffer connected to said random access memory for reading data output therefrom;
- a write driver connected to said random access memory for inputting data thereto;
- means for configuring the circuit block to function as user-writable memory or to provide a logic function; and
- a plurality of input lines into the circuit block, wherein said input lines provide control signals when the circuit block is configured to provide a logic function, and wherein said input lines provide control and data signals when the circuit block is configured to function as user-writable memory.
- 2. The circuit block of claim 1, wherein a first subset of said input lines are used to provide data signals when the circuit block is configured to provide a user-writable memory and are not used when the circuit block is configured to provide a logic function.
- 3. The circuit block of claim 2, wherein a second subset of said input lines provide control signals when the circuit block is configured either to function as user-writable memory or to provide a logic function.
- 4. The circuit block of claim 1, wherein said random access memory provides a plurality of outputs, each corresponding to a column of memory, and wherein said read buffer provides a separate read buffer for each memory column.
- 5. The circuit block of claim 4, wherein each column of random access memory has a separate decoder for addressing the bits of the column.
- 6. The circuit of claim 5, wherein each column of random access memory further has an independently addressable write driver connected thereto.
- 7. The circuit block of claim 4, wherein said memory columns are capable of being configured to provide parallel outputs.
- 8. The circuit block of claim 4, wherein said memory has n columns each having m bits of storage.
CROSS-REFERENCE TO RELATED APPLICATIONS
This is a division of application Ser. No. 07/414,695, filed Sept. 29, 1989 now issued as U.S. Pat. No. 4,975,601.
US Referenced Citations (8)
Divisions (1)
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Number |
Date |
Country |
Parent |
414695 |
Sep 1989 |
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