This Application claims priority of Taiwan Patent Application No. 102141404, filed on Nov, 14, 2013, the entirety of which is incorporated by reference herein.
1. Field of the Invention
The invention relates to a circuit-design method, and more particularly to a circuit-design method of a printed circuit board (PCB).
2. Description of the Related Art
In electronic products, especially computers, communications products, and so on, the net number of a printed circuit board (PCB) is usually in the thousands. Furthermore, in order to obtain good signal quality, the layout requirements of high-frequency signals are more stringent on PCBs.
Traditionally, after the specifications and the components of an electronic product are selected, a constraint parameter table is established manually, so as to design the PCB of the electronic product. In general, it takes 4-6 days to establish a constraint parameter table. In addition, when a circuit diagram or the constraint parameter table is modified, the circuit diagram or the constraint parameter table may not present the modification immediately and synchronously, such that the manufacturer cannot immediately check the correctness of the layout design of the PCB. Thus, it takes more time to verify the layout design of the PCB.
Therefore, a design method for a PCB is desired to standardize the management and ensure the consistency of the constraint parameters.
A circuit-design method and a circuit-design simulation system for a printed circuit board (PCB) are provided. An embodiment of a circuit-design method for a PCB is provided. A first user input is obtained via a user interface of a layout tool, wherein the first user input indicates that an object of a circuit diagram of the PCB is selected in the user interface. A plurality of constraint settings corresponding to an attribute are obtained from a database according to the attribute of the object. The plurality of constraint settings are displayed in a window of the user interface. A second user input is obtained via the user interface, wherein the second user input indicates that one of the plurality of constraint settings is selected in the window. At least one constraint parameter corresponding to the selected constraint setting is assigned to the object, and a tag corresponding to the attribute of the object is attached to the object of the circuit diagram.
Furthermore, an embodiment of a circuit-design simulation system for a PCB is provided. The circuit-design simulation system includes: a display, displaying the user interface of a layout tool; a storage device, including a database; and a processor coupled to the display and the storage device, obtaining a first user input and a second user input via the user interface, wherein the first user input indicates that the object of the circuit diagram of the PCB is selected in the user interface. The processor obtains a plurality of constraint settings corresponding to an attribute from the database according to the attribute of the object. The processor displays the plurality of constraint settings in a window of the user interface, and the second user input indicates that one of the plurality of constraint settings is selected in the window. The processor assigns at least one constraint parameter corresponding to the selected constraint setting to the object, and attaches a tag corresponding to the attribute of the object to the object of the circuit diagram.
A detailed description is given in the following embodiments with reference to the accompanying drawings.
The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
Furthermore, the second group 220 includes a plurality of constraint settings CB, wherein each constraint setting CB includes a plurality of design rules and/or rule sets, which defines the constraint parameters of a bus corresponding to a specific function on the PCB. Specifically, in the circuit diagram, the objects (e.g. the nets and pins) corresponding to the same function can be defined as the same constraint setting CB, wherein the constraint setting CB includes multiple constraint settings CA of the first group 210. For example, on the PCB, the nets and pins that form a PCI Express (PCIe) bus have the same constraint parameters, i.e. corresponding to the same constraint setting CB. Similarly, various standard buses (e.g. USB, UART, HDMI, SPI, I2C etc.) of the circuit diagram correspond to the individual constraint setting CB, respectively. Furthermore, the third group 230 includes a plurality of constraint settings CC, wherein each constraint setting CC includes a plurality of design rules and/or rule sets, which defines the constraint parameters corresponding to a specific device or a specific module on the PCB. Specifically, the objects (e.g. nets and pins) corresponding to the same device or module in the circuit diagram can be defined as the same constraint setting CC, wherein the constraint setting CC includes multiple constraint settings CB of the second group 220 and/or multiple constraint settings CA of the first group 210. For example, on the PCB, the objects (e.g. nets and pins) connecting to a CPU or a display port will correspond to the same constraint setting CC. Similarly, various types of devices and modules (e.g. RTC, HDMI port, power management module etc.) of the circuit diagram correspond to the individual constraint setting CC, respectively. Therefore, according to various device information and the PCB specifications, the user can define different constraint settings CA in advance, and establish the corresponding constraint settings CB and the corresponding constraint settings CC according to various requirements of each electronic product. By establishing the constraint settings CA of the first group 210 and establishing the correlations between the constraint settings CA of the first group 210, the constraint settings CB of the second group 220 and the constraint settings CC of the third group 230, the constraint parameters of the PCB are standardized. Therefore, design time and verify time are decreased, and the correct constraint parameter table is generated quickly for subsequent layout design of the PCB.
According to the embodiments of the invention, the constraint parameter can be generated automatically by attaching the tag corresponding to the constraint parameter to the object in the circuit diagram. Specifically, PCB design is standardized by establishing the constraint setting of the first, second, and third groups and the corresponding constraint parameters, and the same objects can be linked to the same constraint parameters of the database automatically. Therefore, a mistake caused by manually generating the constraint parameter table is avoided, and debugging time is decreased for related products. Simultaneously, the objects without tags attached can also be displayed in the circuit diagram, so as to filter the omitted objects for the user. Furthermore, in the database, when the constraint parameter of the first group is modified, the processor will automatically update the constraint setting of the second group and the third group that comprise the modified constraint parameter of the first group. Therefore, it is a more flexible and consistent way to manage constraint parameters.
While the invention has been described by way of example and in terms of the preferred embodiments, it should be understood that the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Number | Date | Country | Kind |
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102141404 | Nov 2013 | TW | national |