Claims
- 1. A memory device comprising:means for inputting a programming voltage; means for inputting control signals indicative of an operational mode of said memory device; means for determining from said control signals whether the program voltage is being input from an external interface or from an internal signal line of said memory device; and means for preventing the program voltage from being sent to the external interface while allowing the program voltage to reach the programmable element if it is determined that the program voltage is being input from the internal signal line.
- 2. The memory device of claim 1, further comprising means for passing the programming voltage to the signal line if it is determined that the program voltage is being input from the external interface.
- 3. The memory device of claim 1, wherein said means for inputting the programming voltage comprises means for inputting the programming voltage from a bond pad of the memory device.
- 4. The memory device of claim 1, wherein said means for inputting the programming voltage comprises inputting the programming voltage from a probe being applied directly to the signal line.
- 5. A processor system comprising:a processor; and a memory device coupled to said processor, said memory device comprising: means for inputting a programming voltage, means for inputting control signals indicative of an operational mode of said memory device, means for determining from said control signals whether the program voltage is being input from an external interface or from an internal signal line of said memory device, and means for preventing the program voltage from being sent to the external interface while allowing the program voltage to reach the programmable element if it is determined that the program voltage is being input from the internal signal line.
- 6. The system of claim 5, wherein said memory device further comprises means for passing the programming voltage to the signal line if it is determined that the program voltage is being input from the external interface.
- 7. The system of claim 5, wherein said means for inputting the programming voltage comprises means for inputting the programming voltage from a bond pad of the memory device.
- 8. The system of claim 5, wherein said means for inputting the programming voltage comprises inputting the programming voltage from a probe being applied directly to the signal line.
Parent Case Info
This application is a continuation of application Ser. No. 10/147,037, filed on May 17, 2002, now U.S. Pat. No. 6,657,905 is hereby incorporated by reference in its entirety.
US Referenced Citations (10)
Continuations (1)
|
Number |
Date |
Country |
Parent |
10/147037 |
May 2002 |
US |
Child |
10/686771 |
|
US |