This application relates to the following commonly-assigned U.S. patent application Ser. No. 11/075,141, filed Mar. 7, 2005, and entitled “Bipolar Device Compatible with CMOS Process Technology,” which application is hereby incorporated herein by reference.
This invention relates generally to image sensors, and more particularly to image sensors formed of logic bipolar transistors.
Active-pixel image sensors are widely used in image devices, such as cameras, video recorders, and the like. Conventionally, active-pixel sensors are formed of charge-coupled devices (CCDs). As an alternative, active-pixel sensors may also be formed of photo diodes using complementary metal-oxide-semiconductor (CMOS) processes.
The operation of the cell is discussed as follows. First, a logic high signal is applied to the gate of reset transistor M1, so that photo diode PD is reverse-biased by power supply voltage VDD. A cross-sectional view of photo diode PD is schematically illustrated in
During the operation of photo diode PD, it may or may not be exposed to light. If photo diode PD is exposed to light, electron-hole pairs are generated in depletion region DR, and hence the charges stored at node NA are discharged to the ground by a current flowing through photo diode PD. Accordingly, the voltage at node NA is brought down. If, however, photo diode PD is not exposed to light, no electron-hole pairs are generated in depletion region DR, and the charges stored at node NA remain. Accordingly, the voltage at node NA is at least higher than if photo diode PD is exposed to the light. Such a voltage difference may be used to determine whether the respective cell is exposed to light.
The charges at node NA affect the operation of source follower M2, which acts as an amplifier amplifying the state at node NA without draining the charges at node NA. If photo diode PD is exposed to light, the voltage at node NB will be lower, otherwise, it will be higher. When line RS′ is set to logic high, select-gate transistor M3 is turned on to connect node NB to a column line. Accordingly, the voltage at the column line reflects whether photo diode PD is exposed to light or not.
The sensor array as shown in
In accordance with one aspect of the present invention, an integrated circuit structure includes an image sensor cell, which further includes a photo transistor configured to sense light and to generate a current from the light. Other embodiments are also disclosed.
Depending on the embodiments, the advantageous features of the present invention include improved sensitivity of the image sensor array. Accordingly, the area of each of the image sensor cells may be reduced, and the resolution of the image sensor array may be increased.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
The making and using of the embodiments of the present invention are discussed in detail below. It should be appreciated, however, that the embodiments provide many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention and do not limit the scope of the invention.
A novel CMOS image sensor and the method of forming the same are presented. The variations and the operation of the embodiment are then discussed. Throughout the various views and illustrative embodiments of the present invention, like reference numbers are used to designate like elements.
Photo transistor PT as shown in
To maximize the sensitivity of image sensor cell 20 as shown in
In the operation of image sensor cell 20 as shown in
If, however, no light is projected onto photo transistor PT, current Iph, if any, will be significantly smaller than if the light is projected onto photo transistor PT. As a result, collector current Beta*Iph will also be much smaller, which in turn results in a significantly lower voltage at output end EB of trans-impedance amplifier TIA.
In an embodiment, image sensor cells 20 may sense light row by row.
Next, as shown in
Although in the embodiments provided in the preceding paragraphs, NPN photo transistors are discussed, one skilled in the art will realize that PNP phototransistors may also be used. It is realized, however, that the current gain Beta of PNP photo transistors may be lower than that of NPN photo transistors.
The embodiments of the present invention have several advantageous features. By using photo transistors instead of photo diodes as light-sensing devices, the sensitivity of the image sensor array may be improved. Accordingly, the area of each of the image sensor cells may be reduced. This means that the resolution of the image sensor array may be further improved.
Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, and composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. In addition, each claim constitutes a separate embodiment, and the combination of various claims and embodiments are within the scope of the invention.
This application claims the benefit of U.S. Provisional Application No. 61/221,959 filed on Jun. 30, 2009, entitled “CMOS Image Sensors Formed of Logic Bipolar Transistors,” which application is hereby incorporated herein by reference.
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