Patent Application
20090295423
The present invention relates to solid-state electroluminescent flat-panel displays and more particularly to such displays having ways to compensate for the aging of the organic light emitting display components.
Electroluminescent (EL) devices are a promising technology for flat-panel displays. For example, Organic Light Emitting Diodes (OLEDs) have been known for some years and have been recently used in commercial display devices. EL devices use thin-film layers of materials coated upon a substrate that emit light when electric current is passed through them. In OLED devices, one or more of those layers includes organic material. Using active-matrix control schemes, a plurality of EL light-emitting devices can be assembled into an EL display. EL pixels, each including an EL device and a drive circuit, are typically arranged in two-dimensional arrays with a row and a column address for each pixel, and are driven by a data value associated with each pixel to emit light at a brightness corresponding to the associated data value. To make a full-color display, one or more pixels of different colors are grouped together, e.g. red, green, and blue. The collection of all the pixels of a particular color is commonly called a “color plane.” A monochrome display can be considered to be a special case of a color display having only one color plane.
Typical large-format displays (e.g. having a diagonal of greater than 12 to 20 inches) employ hydrogenated amorphous silicon thin-film transistors (a-Si TFTs) formed on a substrate to drive the pixels in such large-format displays. Amorphous Si backplanes are inexpensive and easy to manufacture. However, as described in “Threshold Voltage Instability Of Amorphous Silicon Thin-Film Transistors Under Constant Current Stress” by Jahinuzzaman et al. in Applied Physics Letters 87, 023502 (2005), the a-Si TFTs exhibit a metastable shift in threshold voltage (Vth) when subjected to prolonged gate bias. This shift is not significant in traditional display devices such as LCDs, because the magnitude of current required to switch the liquid crystals in LCD display is relatively small. However, for LED applications, much larger currents must be switched by the a-Si TFT circuits to drive the EL materials to emit light. Thus, EL displays employing a-Si TFT circuits generally exhibit a significant Vth shift as they are used. This Vth shift can result in decreased dynamic range and image artifacts. Moreover, the organic materials in OLED and hybrid EL devices also deteriorate in relation to the integrated current density passed through them over time, so that their efficiency drops while their resistance to current, and thus forward voltage, increases. These effects are described in the art as “aging” effects.
These two factors, TFT and EL aging, reduce the lifetime of the display. Different organic materials on a display can age at different rates, causing differential color aging and a display whose white point varies as the display is used. If some EL devices in the display are used more than others, spatially differentiated aging can result, causing portions of the display to be dimmer than other portions when driven with a similar signal. This can result in visible burn-in. For example, this occurs when the screen displays a single graphic element in one location for a long period time. Such graphic elements can include stripes or rectangles with background information, e.g. news headlines, sports scores, and network logos. Differences in signal format are also problematic. For example, displaying a widescreen (16:9 aspect ratio) image letterboxed on a conventional screen (4:3 aspect ratio) requires the display to matte the image, causing the 16:9 image to appear on a middle horizontal region of the display screen and black (non-illuminated) bars to appear on the respective top and bottom horizontal regions of the 4:3 display screen. This produces sharp transitions between the 16:9 image area and the non-illuminated (matte) areas. These transitions can burn in over time and become visible as horizontal edges. Furthermore, the matte areas are not aged as quickly as the image area in these cases, which can result in the matte areas' being objectionably brighter than the 16:9 image area when a 4:3 (full-screen) image is displayed.
One approach to avoiding the problem of voltage threshold shift in TFT circuits is to employ circuit designs whose performance is relatively constant in the presence of such voltage shifts. For example, U.S. Patent Application Publication No. 2005/0269959 by Uchino et al, describes a pixel circuit having a function of compensating for characteristic variation of an electro-optical element and threshold voltage variation of a transistor. The pixel circuit includes an electro-optical element, a holding capacitor, and five-channel thin-film transistors. Alternative circuit designs employ current-mirror driving circuits that reduce susceptibility to transistor performance. For example, U.S. Patent Application Publication No. 2005/0180083 by Takahara et al. describes such a circuit. However, such circuits are typically much larger and more complex than the two-transistor, single capacitor (2T1C) circuits otherwise employed, thereby reducing the aperture ratio (AR), the percent of the area on a display available for emitting light. The decrease in AR decreases the display lifetime by increasing the current density through each EL device.
Other methods used with a-Si TFTs rely upon measuring the threshold-voltage shift. For example, U.S. Patent Application Publication No. 2004/0100430A1 by Fruehauf describes an OLED pixel circuit including a conventional 2T1C pixel circuit and a third transistor used to carry a current to an off-panel current measurement circuit. As Vth shifts and the OLED ages, the current decreases. This decrease in current is measured and used to adjust the data value used to drive the pixel. Similarly, U.S. Pat. No. 6,433,488 B1 by Bu, describes using a third transistor to measure the current flowing through an OLED device under a test condition and comparing that current to a reference current to adjust the data value. Additionally, Arnold et al., in commonly-assigned U.S. Pat. No. 6,995,519, teach using a third transistor to produce a feedback signal representing the voltage across the OLED, permitting compensation of OLED aging but not Vth shift. However, although these schemes do not require as many transistors as pixel circuits with internal compensation, they do require additional signal lines on a display backplane to carry the measurements. These additional signal lines reduce aperture ratio and add assembly cost. For example, these schemes can require one additional data line per column. This doubles the number of lines that have to be bonded to driver integrated circuits, increasing the cost of an assembled display, and increasing the probability of bond failure, thus decreasing the yield of good displays from the assembly line. This problem is particularly acute for large-format, high-resolution displays, which can have over two thousand columns. However, it also affects smaller displays, as higher bondout counts can require higher-density connections, which are more expensive to manufacture and have lower yield than lower-density connections.
Alternative schemes for reducing image burn-in have been addressed for televisions using a cathode ray tube display. U.S. Pat. No. 6,359,398, describes methods and apparatus that are provided for equally aging a cathode ray tube (CRT). Under this scheme, when displaying an image of one aspect ratio on a display of a different aspect ratio, the matte areas of the display are driven with an equalization video signal. In this manner, the CRT is uniformly aged. However, the solution proposed requires the use of a blocking structure such as doors or covers that can be manually or automatically provided to shield the matte areas from view when the equalization video signal is applied to the otherwise non-illuminated region of the display. This solution is unlikely to be acceptable to most viewers because of the cost and inconvenience. U.S. Pat. No. 6,359,398 also discloses that matte areas can be illuminated with gray video having luminance intensity matched to an estimate of the average luminous intensity of the program video displayed in the primary region. As indicated therein, however, such estimation is not perfect, resulting in a reduced, but still present, non-uniform aging.
U.S. Pat. No. 6,369,851 describes a method and apparatus for displaying a video signal using an edge modification signal to reduce spatial frequency and minimize edge burn lines, or a border modification signal to increase brightness of image content in a border area of a displayed image, where the border area corresponds to a non-image area when displaying images with a different aspect ratio. However, these solutions can cause objectionable image artifacts, for example reduced sharpness or visibly brighter border areas in displayed images.
The general problem of regional brightness differences due to burn-in of specific areas due to video content has been addressed in the prior art, for example by U.S. Pat. No. 6,856,328. This disclosure teaches that the burn-in of graphic elements as described above can be prevented by detecting those elements in the corners of the image and reducing their intensity to the average display load. This method requires the detection of static areas and cannot prevent color-differentiated burn-in. An alternative technique is described in Japanese Publication No. 2005-037843 A by Igarashi et al. entitled “Camera and Display Control Device”. In this disclosure, a digital camera is provided with an organic EL display that is prevented from burning in by employing a DSP in the digital camera. The DSP changes the position of an icon on the organic EL display by changing the position of the icon image data in a memory every time that the camera is turned on. Since the degree to which the display position is changed is approximately one pixel, a user cannot recognize the change in the display position. However, this approach requires a prior knowledge and control of the image signal and does not address the problem of format differences.
U.S. Patent Application Publication No. 2005/0204313 A1 by Enoki et al. describes a further method for display screen burn prevention, wherein an image is gradually moved in an oblique direction in a specified display mode. This and similar techniques are generally called “pixel orbiter” techniques. Enoki et al. teach moving the image as long as it displays a still image, or at predetermined intervals. Kota et al., in U.S. Pat. No. 7,038,668, teach displaying the image in a different position for each of a predetermined number of frames. Similarly, commercial plasma television products advertise pixel orbiter operational modes that sequentially shift the image three pixels in four directions according to a user-adjustable timer. However, these techniques cannot employ all pixels of a display, and therefore can create a border effect of pixels that are brighter than those pixels in the image area that are always used to display image data.
Existing methods for mitigating image burn-in on EL displays generally either require additional display circuitry or manipulate the displayed image. Methods requiring additional display circuitry can reduce the lifetime of the display, increase its cost, and reduce manufacturing yield. Methods manipulating the displayed image cannot correct for all burn-in. Accordingly, there is a need for an improved method and apparatus for providing improved display uniformity in electroluminescent flat-panel display devices.
It is therefore an object of the present invention to compensate for aging and efficiency changes in electroluminescent emitters in the presence of transistor aging.
This object is achieved by a method of determining characteristics of transistors and electroluminescent devices in an electroluminescent display, comprising:
(a) providing an electroluminescent display having a two-dimensional array of electroluminescent devices arranged in rows and columns, wherein each electroluminescent device is driven by a drive circuit in response to a drive signal;
(b) providing for pairs of electroluminescent devices a first drive circuit associated with the first electroluminescent device, a second drive circuit associated with the second electroluminescent device, and a single readout line, each drive circuit including a drive transistor having first, second, and gate electrodes, and a readout transistor having first, second, and gate electrodes, with each readout transistor of a pair being electrically connected to the readout line;
(c) providing a first voltage source and a first switch for selectively connecting the first voltage source to the first electrodes of the drive transistors;
(d) providing a second voltage source and a second switch for selectively connecting the electroluminescent devices to the second voltage source;
(e) providing a current source and a third switch for selectively connecting the current source to the second electrode of the readout transistors;
(f) providing a current sink and a fourth switch for selectively connecting the current sink to the second electrode of the readout transistors;
(g) providing a test voltage source for turning the drive transistors on and off by applying potential to the gate electrodes of the drive transistors;
(h) providing a voltage measurement circuit connected to the second electrode of the readout transistors;
(i) sequentially testing the drive transistors of the first and second drive circuits by closing the first and fourth switches, opening the second and third switches, using the test voltage source to turn on the drive transistor of the first drive circuit and turn off the drive transistor of the second drive circuit, drawing a test current using the current sink, using the voltage measurement circuit to measure the voltage at the second electrode of the readout transistor of the first drive circuit to provide a first signal representative of characteristics of the drive transistor of the first drive circuit, using the test voltage source to turn off the drive transistor of the first drive circuit and turn on the drive transistor of the second drive circuit, and using the voltage measurement circuit to measure the voltage at the second electrode of the readout transistor of the second drive circuit to provide a second signal representative of characteristics of the drive transistor of the second drive circuit, whereby the characteristics of each drive transistor are determined; and
(j) simultaneously testing the first and second electroluminescent devices by opening the first and fourth switches, and closing the second and third switches, using the test voltage source to turn off both of the drive transistors, driving a test current using the current source, and using the voltage measurement circuit to measure the voltage at the second electrode of the readout transistors to provide a third signal representative of characteristics of the pair of electroluminescent devices, whereby the characteristics of both electroluminescent devices are determined.
An advantage of this invention is an electroluminescent (EL) display that compensates for the aging of the organic materials in the display wherein circuitry aging is also occurring, without requiring extensive or complex circuitry for accumulating a continuous measurement of light-emitting element use or time of operation. It is a further advantage of this invention that it uses simple voltage measurement circuitry. It is a further advantage of this invention that by making all measurements of voltage, it is more sensitive to changes than methods that measure current. It is a further advantage of this invention that it performs the compensation based separately on EL changes and changes in driving transistor properties. It is a further advantage of this invention that compensation for changes in driving transistor properties can be performed with compensation for the EL changes, thus providing a complete compensation solution. It is a further advantage of this invention that both aspects of measurement and compensation (EL and driving transistor) can be accomplished rapidly. It is a further advantage of this invention that characterization and compensation of driving transistor and EL changes are unique to the specific element and are not impacted by other elements that can be open-circuited or short-circuited.
Turning now to
EL device 160 is powered by flow of current between first power supply line 110 and second power supply line 150. In this embodiment, the first voltage source 111 has a positive potential relative to the second voltage source 151, to cause current to flow through drive transistor 170 and EL device 160, so that EL device 160 produces light. The magnitude of the current—and therefore the intensity of the emitted light—is controlled by drive transistor 170, and more specifically by the magnitude of the signal voltage on gate electrode 165 of drive transistor 170. During a write cycle, select line 130 activates switch transistor 180 for writing, and the signal voltage data on data line 120 is written to drive transistor 170 and stored on a capacitor 190 that is connected between gate electrode 165 and first power supply line 110.
As discussed above, a-Si transistors such as drive transistor 170, and EL devices such as 160, have aging effects. It is desirable to compensate for such aging effects to maintain consistent brightness and color balance of the display, and to prevent image burn-in. For readout of values useful for such compensation, drive circuit 105 further includes a readout transistor 185, connected to the second electrode 155 of the drive transistor 170 and to readout line 125. The gate electrode of the readout transistor 185 can be connected to the select line 130, or in general to some other readout-selection line. The readout transistor 185, when active, electrically connects second electrode 155 to readout line 125 that carries a signal off the display to electronics 195. Electronics 195 can include, for example, a gain buffer and an A/D converter to read the voltage at electrode 155.
Turning now to
Turning now to
The display further includes first power supply lines 110, which are connected to a common first voltage source as described above, and second power supply lines ISO, which are connected to a common second voltage source as described above. The display also includes first switch 210 and second switch 220 connected to first power supply line 110 and second power supply line 150, respectively. First switch 210 and second switch 220 are desirably located off-panel, and though not shown for the sake of clarity, the switches are connected to all respective power supply lines on the display. At least one first switch 210 and second switch 220 are provided for the OLED display. Additional first and second switches can be provided if the OLED display has multiple powered subgroupings of pixels. First switch 210 selectively connects a first voltage source, via first power supply line 110, to a first electrode of the drive transistors, e.g. drive transistor 171a. Second switch 220 selectively connects a second voltage source, via second power supply line 150, to the EL devices, e.g. EL device 161a. The display includes readout line 141 and switch block 230. One switch block 230 and a single readout line 141 are provided for every two columns of pixels. The readout line 141 is connected to the second electrode of the readout transistors of the two columns of pixels. Pixels are connected to the readout line in pairs, e.g. readout line 141 is connected to readout transistors 186a and 186c of the pair of pixels 205a and 205c. For discussion purposes, one pixel of the pair will herein be referred to as the first pixel, e.g. first pixel 205a, while the other pixel of the pair will be referred to as the second pixel, e.g. second pixel 205c. Similarly, the various components of the first and second pixels will be referred to as first and second components, respectively. Thus, first pixel 205a includes first EL device 161a and an associated first drive circuit that includes first drive transistor 171a and first readout transistor 186a. Further, the components of a pair of pixels will themselves be referred to as pair of components. Thus, pixel pair 205a and 205c include a pair of EL devices 161a and 161c, a pair of readout transistors 186a and 186c, etc. Switch block 230 includes a third switch S3 and a fourth switch S4, and also a no-connect state NC. Switch block 230 selectively connects readout line 141 to current source 240 (selectively via third switch S3) or current sink 245 (selectively via fourth switch S4). In normal display mode, first and second switches 110 and 120 are closed, while other switches (described below) are open; that is, switch block 230 is set to NC. While the third and fourth switches can be individual entities, they are never closed simultaneously in this method, and thus switch block 230 provides a convenient embodiment of the two switches. Switch block 230, current source 240, and current sink 245 can be provided located on or off the EL display substrate.
Each pixel includes a readout transistor. The pixels are arranged in pixel pairs wherein each pixel of the pair shares a readout line and a select line. For example, pixels 205a and 205c form a pair wherein readout transistor 186a and readout transistor 186c are electrically connected to readout line 141. The gate electrodes of readout transistors 186a and 186c are connected together to select line 135a. Switch block 230 is used in conjunction with the readout transistors. The third switch S3 permits current source 240 to be selectively connected via readout line 141 to permit a predetermined constant current to flow into the pixels. The fourth switch S4 permits current sink 245 to be selectively connected via second data line 140b to permit a predetermined constant current to flow from the pixels when a predetermined data value is applied to an associated data line.
A voltage measurement circuit 260 is further provided connected to readout line 141. Voltage measurement circuit 260 measures voltages to derive a correction signal to adjust the drive signals applied to the drive transistors. Voltage measurement circuit 260 includes at least analog-to-digital converter 270 for converting voltage measurements into digital signals, and a processor 275. The signal from analog-to-digital converter 270 is sent to processor 275. Voltage measurement circuit 260 can also include a memory 280 for storing voltage measurements, and a low-pass filter 265 if necessary. Other embodiments of voltage measurement circuits will be clear to those skilled in the art. Voltage measurement circuit 260 can be connected through multiplexer 295 to a plurality of readout lines 141 for sequentially reading out the voltages from a predetermined number of pixels. Processor 275 can also be connected to data lines (e.g. first data line 140a and second data line 140b) by way of a digital-to-analog converter 290. Thus, processor 275 can also serve as a test voltage source for applying a predetermined test potential to the data lines, and therefore to the gate electrodes of the drive transistors, during the measurement process to be described herein. In this way, processor 275 can turn the drive transistors on or off to current flow. Processor 275 can also accept display data via data input 285 and provide compensation for changes as will be described herein, thus providing compensated data to the data lines during the display process.
Instead of a voltage measurement circuit, one can use a compensation circuit such as a comparator to compare the voltage on readout line 141 to a known reference. This can provide a lower-cost apparatus than embodiments that include a voltage measurement circuit.
A controller can also be provided for driving the specific color subpixel to provide readout signals. The controller can be processor 275. The controller can open and close any of the first through fourth switches, can set current sink 245 to draw a predetermined test current, and can set current source 240 to drive a predetermined test current. This is shown schematically by a control bus 225. For clarity of illustration, control bus 225 is only shown to switch block 230 and current source 240, but it will be understood that control bus 225 can permit the controller to set any switch, current sink, current source, data lines, select lines, or multiplexer, as required, and can therefore control the process described below.
In normal operation, the display operates as an active-matrix display as well-known in the art. First switch 210 and second switch 220 are closed in normal operation, while third and fourth switches S3 and S4 are open (that is, switch block 230 is set to NC). Data is placed upon data lines (e.g. 140a, 140b) and an appropriate select line (e.g. 135a) is activated to place that data onto the gate electrodes of the corresponding drive transistors to drive the corresponding EL devices at the desired level.
Each pixel of the display has another mode, which will herein be called readout mode. In readout mode, first and second switches 210 and 220 and switch block 230 are manipulated along with the select lines and data placed on the data lines so as to provide measurements representative of characteristics of the drive transistors and the EL devices. Readout mode has three distinct measurements for each pair of pixels. The measurements will be demonstrated for pixels 205a and 205c, which for this discussion will be termed the first and second pixels, respectively, with associated first and second EL devices, first and second drive circuits, and first and second drive transistors. For the first two measurements, first switch 210 is closed and second switch 220 is opened, and switch block 230 is set to S4 such that fourth switch S4 is closed and third switch S3 is opened. Processor 275, acting as a test voltage source, places a potential on data line 140a that will turn on first drive transistor 171a, and a potential on data line 140b that will turn off second drive transistor 171c, and select line 135a is activated to write these potentials to the gate electrodes of the respective drive transistors. Current sink 245, which is connected to readout line 141 via fourth switch S4, is set to draw a test current, Itestsk. Select line 135a also activates readout transistors 186a and 186c, thus permitting current to flow from first power supply line 110 to current sink 245 and permitting readout line 141 to receive a first readout signal from pixels 205a and 205c. Since second drive transistor 171c was turned off, the readout signal will be representative of characteristics of first drive transistor 171a, including the threshold voltage of the transistor.
Processor 275 can place a potential on data line 140a that will turn off first drive transistor 171a, and a potential on data line 140b that will turn on second drive transistor 171c. Readout line 141 then receives a second readout signal from pixels 205a and 205c wherein the readout signal will be representative of characteristics of second drive transistor 171c.
For the third measurement, first switch 210 is opened and second switch 220 is closed, and switch block 230 is set to S3 such that third switch S3 is closed and fourth switch S4 is opened. Processor 275, acting as a test voltage source, places a potential on data lines 140a and 140b that will turn off first and second drive transistors 171a and 171c, and select line 135a is activated to write these potentials to the gate electrodes of the drive transistors. Current source 240, which is connected to readout line 141 via third switch S3, is set to drive a test current Itestsu. Select line 135a also activates readout transistors 186a and 186c, thus permitting current to flow from current source 240 to second power supply line 150 and permitting readout line 141 to receive a third readout signal from pixels 205a and 205c. Since current can flow through both EL devices 161a and 161c, the readout signal will be representative of characteristics of both EL devices, including the resistance of the EL devices.
Turning now to
Processor 275 then provides potential Vdata to second data line 140b and to second drive transistor 171c, and provides potential V0 to first data line 140a and to first drive transistor 171a. Thus, first drive transistor 171a is turned off, while second drive transistor 171c is turned on (Step 430). Voltage measurement circuit 260 is used to test drive transistor 171c by measuring the voltage on readout line 141, which is the voltage at the second electrode of readout transistor 186c of the second drive circuit, providing a second readout signal V2 that is representative of characteristics, including the threshold voltage Vth, of second drive transistor 171c (Step 435).
The first and second EL devices are then tested simultaneously. First switch 210 is then opened and second switch 220 is closed. The fourth switch is opened and the third switch is closed, that is, switch block 230 is switched to S3 (Step 440). The potential of data lines 140a and 140b are both set to V0 by processor 275, thus turning off both drive transistors 171a and 171c (Step 445). Current source 240 is set to drive a predetermined test current (Step 450). A current, Itestsu, thus flows from current source 240 through readout line 141 and EL devices 161a and 161c to second power supply line 150. The value of current through current source 240 is selected to be less than the maximum current possible through the EL devices; a typical value will be in the range of 1 to 5 microamps per pixel and will be constant for all measurements during the lifetime of the OLED drive circuit. More than one measurement value can be used in this process, e.g. one can choose to do the measurement at 1, 2, and 3 microamps. Voltage measurement circuit 260 is used to test the EL device by measuring the voltage on readout line 141, which is the voltage at the second electrode of readout transistors 186a and 186c, providing a third readout signal V3 that is representative of characteristics, including the resistance, of the pair of EL devices (Step 455). If there are additional pairs of pixels in the row to be measured (Step 460), multiplexer 295 connected to a plurality of readout lines 141 can be used to permit voltage measurement circuit 260 to sequentially read out the readout signals V1, V2, and V3 for a predetermined number of pixels, e.g. every pair of pixels in the row, and steps 410 to 455 are repeated as necessary. If the display is sufficiently large, it can require a plurality of multiplexers wherein the signals can be provided in a parallel/sequential process. If there are no more pixels to be read in the row, but there are additional rows of circuits to be measured in the display (Step 465), Steps 410 to 460 are repeated for each row. At the end of the process, the characteristics of the transistors and EL devices can be determined, and the necessary changes for each pixel can be calculated (Step 470), which will now be described.
Transistors such as drive transistor 171a have a characteristic threshold voltage (Vth). The voltage on the gate electrode of drive transistor 171a must be greater than the threshold voltage to enable current flow between the first and second electrodes. When drive transistor 171a is an amorphous silicon transistor, the threshold voltage is known to change under aging conditions. Such conditions include placing drive transistor 171a under actual usage conditions, thereby leading to an increase in the threshold voltage. Therefore, a constant signal on the gate electrode can cause a gradually decreasing light intensity emitted by EL device 161a. The amount of such decrease will depend upon the use of drive transistor 171a; thus, the decrease can be different for different drive transistors in a display, herein termed spatial variations in characteristics of display 200. Such spatial variations can include differences in brightness and color balance in different parts of the display, and image “burn-in” wherein an often-displayed image (e.g. a network logo) can cause a ghost of itself to always show on the active display. It is desirable to compensate for such changes in the threshold voltage to prevent such problems. Also, there can be age-related changes to EL device 161a, e.g. luminance efficiency loss and an increase in resistance across EL device 161a.
For the first readout signal, the voltages of the components in the circuit can be related by:
V
1
=V
data
−V
gs(Itestsk)
−V
read (Eq. 1)
where Vgs(Itestsk) is the gate-to-source voltage that must be applied to drive transistor 171a such that its drain-to-source current, Ids, is equal to Itestsk. The values of these voltages will cause the voltage at the second electrode of readout transistor 186a, that is, the electrode connected to readout line 141, to adjust to fulfill Eq. 1. Under the conditions described above, Vdata is a set value and Vread (the voltage change across readout transistor 186a) can be assumed to be constant. Vgs will be controlled by the value of the current set by current sink 245 and the current-voltage characteristics of drive transistor 171a, and will change with age-related changes in the threshold voltage of the drive transistor. To determine the change in the threshold voltage of drive transistor 171a, two separate test measurements are performed. The first measurement is performed when drive transistor 171a is not degraded by aging, e.g. before display 200 is used for display purposes, to cause the voltage V1 to be at a first level, which is measured and stored. Since this is with zero aging, it can be the ideal first signal value, and will be termed the first target signal. After drive transistor 171a has aged, e.g. by displaying images for a predetermined time, the measurement is repeated and stored. The stored results can be compared. Changes to the threshold voltage of drive transistor 171a will cause a change to Vgs to maintain the current. These changes will be reflected in changes to V1 in Eq. 1, so as to produce voltage V1 at a second level, which can be measured and stored. Changes in the corresponding stored signals can be compared to calculate a change in the readout voltage V1, which is related to the changes in drive transistor 171a as follows:
ΔV1=−ΔVgs=−ΔVth (Eq. 2)
Thus, a value of −ΔV1 can be derived for a correction signal for pixel 205a based on the characteristics of drive transistor 171a of that pixel.
The second readout signal V2 can be analyzed similarly.
For the third readout signal, the voltages of the components in the circuit can be related by:
V
3
=CV+V
EL
+V
read (Eq. 3)
where VEL is the potential loss across EL devices 161a and 161c. The values of these voltages will cause the voltage at the second electrode of readout transistors 186a and 186c to adjust to fulfill Eq. 3. Under the conditions described above, CV is a set value (the voltage of second power supply line 150) and Vread can be assumed to be constant. VEL will be controlled by the value of current set by current source 240 and the current-voltage characteristics of EL devices 161a and 161c. VEL can change with age-related changes in the EL devices. Because the change in VEL is the result of changes in two pixels, it is important that the EL devices of the pixels undergo similar aging. The pixels can undergo similar aging if 1) the two pixels are adjacent in the same color plane, and 2) the location of the image is changed over time, as will be described below. “Adjacent” for a color display means “adjacent, discounting intervening columns or rows of different colors” according to common practice in the color image processing art. To determine the change in VEL, two separate test measurements are performed. The first measurement is performed when the EL devices are not degraded by aging, e.g. before display 200 is used for display purposes, to cause the voltage V3 to be at a first level, which is measured and stored. Since this is with zero aging, it can be the ideal third signal value, and will be termed the third target signal. After EL devices have aged, e.g. by displaying images for a predetermined time, the measurement is repeated and stored. The stored results can be compared. Changes in EL devices 161a and 161c can cause changes to VEL to maintain the current. These changes will be reflected in changes to V3 in Eq. 3, so as to produce voltage V3 at a second level, which can be measured and stored. Changes in the corresponding stored signals can be compared to calculate a change in the readout voltage, which is related to the changes in EL devices 161a and 161c as follows:
ΔV3=ΔVEL (Eq. 4)
Thus, a value of ΔV3 can be derived for a correction signal for pixels 205a and 205c based on the resistance characteristic of the EL devices of those pixels.
The changes in the first, second, and third signals can then be used to compensate for changes in characteristics of pixels 205a and 205c (Step 470). For compensating for the change in current, it is necessary to make a correction for ΔVth (related to ΔV1 or ΔV2) and ΔVEL (related to ΔV3). However, a third factor also affects the luminance of the EL device and changes with age or use: the efficiency of the EL device decreases, which decreases the light emitted at a given current, as described by Levey et al. in abovecited commonly assigned U.S. patent application Ser. No. 11/766,823, the disclosure of which is incorporated herein by reference. In addition to the relations above, Levey et al. described a relationship between the decrease in luminance efficiency of an EL device and ΔVEL, that is, where the EL luminance for a given current is a function of the change in VEL:
By measuring the luminance decrease and its relationship to ΔVEL with a given current, a change in corrected signal necessary to cause the EL device to output a nominal luminance can be determined. This measurement can be done on a model system and thereafter stored in a lookup table or used as an algorithm.
To compensate for the above changes in characteristics of transistors and EL devices of pixel 205a, one can use the changes in the first and third signals in an equation of the form:
ΔVdata=f1(ΔV1)+f2(ΔV3)+f3(ΔV3) (Eq. 6)
where ΔVdata is a correction signal used to adjust the drive signal applied to the gate electrode of drive transistor of the specific pixel (e.g. drive transistor 171a) so as to maintain the desired luminance, f1(ΔV1) is a correction signal for the change in threshold voltage of drive transistor 171a, f2(ΔV3) is a correction signal for the change in resistance of EL device 161a, and f3(ΔV3) is a correction signal for the change in efficiency of EL device 161a. For example, the EL display can include a controller which can include a lookup table or algorithm to compute an offset voltage for each measured EL device. The correction signal is computed to provide corrections for changes in current due to changes in the threshold voltage of drive transistor 171a and aging of EL device 161a, as well as providing a current increase to compensate for efficiency loss due to aging of EL device 161a, thus providing a complete compensation solution for the measured pixel. These changes can be applied by the controller to correct the light output to the nominal luminance value desired. By controlling the drive signal applied to the EL device, an EL device with a constant luminance output and increased lifetime at a given luminance is achieved. Similarly, one can use the changes in the second and third signals to provide a correction signal for pixel 205c. Because this method provides a correction for each measured EL device in a display, it will compensate for spatial variations in the characteristics of a plurality of EL circuits.
This method can also correct for variations in the characteristics of a plurality of EL circuits on a panel before aging. This can be useful, for example, in panels using low-temperature polysilicon (LTPS) transistors, which can have non-uniform threshold voltage and mobility across a panel. At any time, for example when a panel is manufactured, this method can be employed to measure values for V1 of each pixel 205a on the display, as described above. Then, a first target signal can be selected or calculated from the V1 measurements. For example, the maximum measured V1 or the average of all V1 values can be selected as the first target signal. This first target signal can then be used as the first level of voltage V1 in Eq. 2, and the actual measured V1 for each pixel can be used as the second level of voltage V1. This permits compensation for variations in the characteristics of drive transistor 171a before aging. In the same manner, V2 can be measured for each pixel 205c and compensation applied using Eq. 2. V3 can be measured for each EL device pair 161a and 161c and a selected, maximum or average V3 used as the third target signal. This third target signal can be used as the first level of voltage V3 in Eq. 3, and each individual V3 measurement as the second level of voltage V3, to apply compensation for variations in the characteristics of EL device pairs across the display. In cases where mobility varies across a panel, V1 and V2 can be measured at two different values of Itestsk each. This provides two points which can be used to determine both the offset (due to Vth) and the slope (due to mobility) of the transfer curves of drive transistors 171a and 171c respectively.
Turning now to
To correct for aging, a correction signal can be derived based on the characteristics of the transistors in a drive circuit, or the EL device, or both, as described above. However, a correction signal for only a pair of EL devices is determined this way. This correction signal can be used to correct for burn-in by adjusting the drive signals applied to the first pixel and one or more adjacent second pixels. Because different colored pixels can be utilized differently and thus have different aging characteristics, it is desirable that the adjustment be determined and performed on adjacent pixels in the same color plane. For example, the correction signal for red pixel 510 can include a correction for aging of the drive transistor of pixel 510, and a correction for the aging of the EL devices in pixels 510 and 540. Similarly, the correction signal for red pixel 540 can include a correction for aging of the drive transistor of pixel 540, and a correction for the aging of the EL devices in pixels 510 and 540.
Some images create burn-in patterns with sharp edges when displayed for long periods of time. For example, letterboxing, as described above, creates two sharp horizontal edges between the 16:9 image area and the matte areas. As a result, it is desirable for the correction signals to have a sharp transition at these boundaries to provide an appropriate compensation. It can therefore be advantageous to apply edge detection algorithms as known in the art to the correction signals of a plurality of the pixels of one or more color planes of the display to determine the location of these sharp transition boundaries for pixels for which the compensation is only measured as part of a pair of pixels. These algorithms can be employed to determine the presence of sharp transitions. A sharp transition of the correction signals is a significant difference in values of the correction signals between adjacent pixels, or between pixels within a defined distance of each other. A significant change can be a difference between correction signal values of at least 20%, or a difference of at least 20% of the average of a group of neighboring values. Sharp transitions can follow lines, e.g. along horizontal, vertical or diagonal dimensions. In such a linear sharp transition, any pixel will have a significant difference in correction signal value compared to an adjacent pixel on the opposite side of the sharp transition. For example, a sharp transition between two adjacent columns is characterized by a significant difference between each pixel in one column and an adjacent pixel of the same color plane in the same row.
The location of a sharp transition can be determined using EL correction signals from neighboring pixels in the same color plane or from drive transistor correction signals for the associated EL devices. If such a transition is found to occur, EL correction signals from pixels on the same side of the transition as evidenced by drive transistor corrections can be given higher weight than correction signals from first pixels on the opposite side of the transition as the second pixel. This can improve image quality in displays with sharp-edged burn-in patterns with no extra hardware cost. Specifically, this method can be applied by locating one or more sharp transitions in the correction signals over the two-dimensional EL pixel array using edge-detection algorithms as known in the art; and, for each sharp transition, using the correction signal for a first pixel to adjust the drive signals applied to the first pixel and one or more adjacent second pixels on the same side of the sharp transition. It can be desirable to combine this analysis of burn-in edges, represented by sharp transitions in the correction signals, with an analysis of image content to determine how to apply correction signals to second pixels, as described by White et al., in above cited commonly assigned U.S. patent application Ser. No. 11/946,392 the disclosure of which is incorporated herein by reference.
This method for compensating for changes in an EL display can be combined with changing the location of the image over time. For example, in the EL display shown in
As discussed above, the prior art teaches various methods for determining when to change the location of the image. However, in an EL display, repositioning can be visible while a still image is shown due to the fast subpixel response time of an EL display compared to e.g. an LCD display. Further, changes at predetermined intervals can become visible over time as the human eye is optimized to detect regularity in anything it sees. Finally, in a television application, the display can be active for hours or days at a time, so repositioning the image at display startup can be insufficient to prevent burn-in.
It can be advantageous, therefore, to reposition the image as often as possible without the movement becoming visible to the user. The location of the image can advantageously be changed after a frame of all-black data signals, or more generally after a frame that has a maximum data signal at or below a predetermined threshold. The predetermined threshold can be a data signal representing black. For example, during TV viewing, the image can be repositioned between two of the several black frames between commercials. The data signals for different color planes can have the same or different predetermined thresholds. For example, since the eye is more sensitive to green light than to red or blue, the threshold for green can be lower than the threshold for red or blue. In this case, the location of the image can be changed after a frame that has a maximum data signal in each color plane at or below the selected threshold for that color plane. That is, if a data signal in any color plane is above the selected threshold for that color plane, the location of the image can be left unchanged to avoid visible motion.
Additionally, the location of the image can be changed at least once per hour. The location of the image can be changed during fast motion scenes, which can be identified by image analysis as known in the art (e.g. motion estimation techniques). The times between successive changes of the image location can be different.
The invention has been described in detail with particular reference to certain preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.
Reference is made to commonly assigned U.S. patent application Ser. No. 11/766,823 filed Jun. 22, 2007, entitled “OLED Display with Aging and Efficiency Compensation” by Levey et al.; U.S. patent application Ser. No. 11/946,392 filed Nov. 28, 2007, entitled “Electroluminescent Display with Interleaved 3T1C” by White et al.; and U.S. patent application Ser. No. ______ filed concurrently herewith entitled “Compensation Scheme for Multi-Color Electroluminescent Display” by Levey et al the disclosures of which are incorporated herein by reference.
