Claims
- 1. A circuit for providing a reversible current from first and second power supply terminals in accordance with first and second control signals of opposite logic levels and first and second gate signals of opposite logic levels, said circuit comprising:
- a motor load having first and second load terminals;
- first and second vertical COMFETs each having a source coupled to the first power supply terminal, a drain coupled to the first and second load terminals, respectively, and a gate receiving the first and second gate signals respectively; and
- first and second vertical MISFETs each having a source adapted to be coupled to the second power supply terminal, a drain coupled to said drains of said first and second COMFETs, respectively, and a gate adapted to receive said first and second control signals, respectively.
- 2. The circuit of claim 1, wherein each of said COMFET gates is coupled to the drain of the other COMFET.
- 3. The circuit of claim 1, wherein said first and second gate signals comprise third and fourth control signals, respectively.
- 4. A circuit as claimed in claim 1 further comprising a substrate including at least said first COMFET and said first MISFIT.
- 5. A circuit as claimed in claim 1, wherein said MISFETs each comprise an N-channel MISFET, said COMFETs each comprise a P-channel COMFET, and said first power supply terminal has a higher voltage than said second power supply terminal.
- 6. A circuit as claimed in claim 1, further comprising a conductor connecting the body of each of said MISFETs and COMFETs to the source of the same MISFET or COMFET, respectively.
- 7. A circuit as claimed in claim 1 wherein each of said MISFETs comprise a MOSFET.
- 8. A circuit for providing a current from first and second power supply terminals in accordance with first and second control signals of opposite logic levels, said circuit comprising:
- a motor load having first and second load terminals;
- a vertical COMFET having a source adapted to be coupled to the first power supply terminal, a drain coupled to the first load terminal, and a gate adapted to receive the first control signal; and
- a MISFET having a source adapted to be coupled to the second power supply and second load terminals, a drain coupled to said COMFET drain, and a gate adapted to receive the second control signal.
- 9. A circuit as claimed in claim 8 further comprising a substrate including at least said first COMFET and said first MISFIT.
- 10. A circuit as claimed in claim 8 wherein said MISFET comprises an N-channel MISFET and said COMFET comprises a P-channel COMFET.
- 11. A circuit as claimed in claim 8 wherein said MISFET comprises a MOSFET.
- 12. A circuit as claimed in claim 8 further comprising a conductor connecting the body of said MISFET and said COMFET to the source of the same MISFET or COMFET, respectively.
Parent Case Info
This application is a division, of application Ser. No. 07/232,243, filed Aug. 15, 1988.
US Referenced Citations (7)
Divisions (1)
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Number |
Date |
Country |
Parent |
232243 |
Aug 1988 |
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