This application is based on Japanese Patent Application No. 2016-172042 filed with the Japan Patent Office on Sep. 2, 2016, the entire contents of which are incorporated herein by reference.
The present technique relates to control devices and control systems.
In FA (Factory Automation) fields, a greater number of motors have been utilized for moving equipment and machinery. Typically, respective motors are controlled in rotational speed and the like, in conjunction with detection signals from various types of sensors, using control devices such as PLCs (Programmable Controllers).
For example, JP-A No. 2011-035664 (Patent Document 1) discloses a structure including a single controller connected to servo drivers, inverters or the like, through a network, in order to perform control thereon.
For example, in order to control various types of industrial robots, there is a need for providing accurate commands to motors adapted to drive respective components. Typically, in such a way as to move arms and the like which are driven by motors, along preliminarily-specified trajectories, it is necessary to update commands thereto in each predetermined control cycle (several hundred microseconds to several tens of milliseconds). As the control cycles for these commands are made shorter, the control accuracy can be made higher. Therefore, there has been a demand for shortening the control cycles as much as possible.
A control device according to one or more embodiments includes an interface for outputting a command value to a motor driver adapted to drive a motor; a storage portion adapted to store one or more commands for specifying a behavior of the motor driven by the motor driver; and a processing portion including a first arithmetic circuit and a second arithmetic circuit. The first arithmetic circuit is adapted to execute a first process for successively interpreting the one or more commands stored in the storage portion and for successively calculating a parameter set which defines a function relating to calculation of the command value. The second arithmetic circuit is adapted to execute a second process for calculating the command value based on the successively-calculated parameter set, in each predetermined control cycle, independently of the first process.
It may be preferable that the control device further includes a common memory which can be accessed from the first arithmetic circuit and the second arithmetic circuit. The first arithmetic circuit is adapted to write the successively-calculated parameter set into the common memory. The second arithmetic circuit is adapted to successively read out the parameter set from the common memory.
It may be preferable that the first arithmetic circuit is adapted to, after calculating the parameter set, write state information indicative of validity, in the common memory, in association with this calculated parameter set. The second arithmetic circuit is adapted to change the state information associated with the parameter set to a value indicative of invalidity, after completing the calculation of the command value based on this parameter set.
It may be preferable that the first arithmetic circuit is adapted to remove the parameter set associated with the state information indicative of the invalidity and, then, to write a newly-calculated parameter set into the common memory.
It may be preferable that the parameter set includes a parameter indicative of a number of times the command value should be calculated. After executing the calculation of the command value based on the parameter set calculated through the first process the specified number of times, the second arithmetic circuit is adapted to start the calculation of the command value based on a parameter set which has been calculated next through the first process.
A control system according to one or more embodiments includes a motor driver adapted to drive a motor; and a control device adapted to output a command value to the motor driver. The control device includes a storage portion adapted to store one or more commands for specifying a behavior of the motor driven by the motor driver, and a processing portion including a first arithmetic circuit and a second arithmetic circuit. The first arithmetic circuit is adapted to execute a first process for successively interpreting the one or more commands stored in the storage portion and for successively calculating a parameter set which defines a function relating to calculation of the command value. The second arithmetic circuit is adapted to execute a second process for calculating the command value based on the successively-calculated parameter set, in each predetermined control cycle, independently of the first process.
According to one or more embodiments, it is possible to shorten the control cycles for the command to the motor.
There will be described, in detail, embodiments, with reference to the drawings. Further, throughout the drawings, the same or corresponding portions will be designated by the same reference characters and will not be described redundantly.
(A. Examples of the Structure of a Control System)
At first, there will be described an example of the structure of a control system according to one or more embodiments.
The motors 250 are incorporated in equipment and machinery which are controlled by the control device 100 and form driving sources for moving the equipment and the machinery. The types of the motors 250 are not particularly limited, and the motors 250 embrace “motors” having meanings of general driving sources. For example, the motors 250 are constituted by well-known motors, such as AC motors, DC motors, step motors, linear motors.
The motor drivers 200 are constituted by motor drivers having structures suitable for the types of the motors 250 to be driven thereby. For example, they can be constituted by inverters, servo drivers, servo amplifiers, and the like.
The control device 100 is assumed to be a PLC (programmable controller), but the control device 100 is not limited thereto and can be constituted by an arbitrary computer. For example, the control device 100 can be also constituted by a computer referred to as a robot controller or a motion controller.
(B. Examples of the Structure of the Control Device)
Next, there will be described an example of the structure of the control device 100 which forms a main portion of the control system 1 according to one or more embodiments.
Referring to
The processor 110 corresponds to a processing portion including at least a first operating circuit and a second operating circuit and is structured to execute programs in parallel. As an example, the processor 110 is constituted by a multi-core processor. More specifically, the processor 110 includes a first core 111, a second core 112, and a common cache 116. The first core 111 and the second core 112 interiorly incorporate a first cache 113 and a second cache 114, respectively.
The main memory 120 is a storage device for temporarily holding all or portions of programs, code, and work data to be executed by the processor 110. The main memory 120 is constituted by a DRAM (Dynamic Random Access Memory) or an SRAM (Static Random Access Memory), for example.
The secondary storage device 130 is a storage device for holding, in a non-volatile manner, programs to be executed by the processor 110, data to be processed, set parameters, and the like. The secondary storage device 130 is constituted by an HDD (Hard Disk Drive), an SSD (Solid State Drive) or the like, for example. Typically, the secondary storage device 130 stores a system program 132 for providing basic functions of the control device 100, and user programs 134 designed arbitrarily depending on objects to be controlled by the control device 100. The user programs 134 typically include a sequence program 136 for realizing sequence logics, and a motion program 138 for controlling the trajectories of robots and the like. The user programs 134 can be written in arbitrary languages. Namely, the secondary storage device 130 corresponds to a storage portion adapted to store one or more commands (the motion program 138) for specifying the behaviors of the motors 250 to be driven by the motor drivers 200.
The field network interface 122 is a controller responsible for transferring data through the field network 2 which connects the control device 100 and the motor drivers 200 to each other. The field network interface 122 corresponds to an interface for outputting output values to the motor drivers 200. As the field network 2, it is preferable to employ a network adapted to perform fixed-cycle communication, which ensures data reach times. As such networks adapted to perform fixed-cycle communication, there have been known EtherCAT (trademark), EtherNet/IP (trademark), DeviceNet (trademark), CompoNet (trademark), and the like.
The network interface 124 is a controller responsible for transferring data to and from a server device, an HMI (Human Machine Interface) device, and the like in a higher rank. For transferring data to and from the server device, the HMI device and the like in the higher rank, it is possible to employ a packet network such as Ethernet (trademark).
The USB interface 126 is a controller responsible for transferring data to and from support devices and the like. The USB interface 126 transfers data thereto and therefrom through serial communication such as USB.
The memory reader/writer 128 is an interface device for reading/writing data from/into portable storage mediums, such as SD cards. The user programs 134 to be executed by the control device 100 can be installed thereinto through such storage mediums. Also, data to be collected by the control device 100 can be written into such storage mediums.
(C. Motion Control through the Motion Program)
Next, there will be described motion control through the user programs 134 (the motion program 138) which are executed by the control device 100 according to one or more embodiments. In the present specification, “the motion control” embraces control for successively providing commands to the motor drivers 200 which drive the motors 250, in order to cause the portions driven by the motors to perform preliminarily-specified behaviors.
Command values (physical amounts or amounts of manipulations corresponding to physical amounts) outputted to the motor drivers 200 are properly selected according to targeted behaviors and are assumed to be position command values, speed command values, acceleration command values, jerk command values, and the like, for example. Hereinafter, as typical examples, there will be described cases where speed command values for the motors are used as command values.
The motion program 138 specifies a total of three trajectories, which are a trajectory N001 from the point P000 to the point P001, a trajectory N002 from the point P001 to the point P002, and a trajectory N003 from the point P002 to the point P003, as respective independent motion commands.
As an example, in the motion program 138 illustrated in
Further, it is assumed that set values of acceleration, acceleration patterns, speed upper and lower limits and the like have been preliminarily specified, as a system configuration, in addition to the specifications in the motion program 138 illustrated in
In order to calculate the command values in each control cycle, it is necessary to preliminarily interpret each motion command specified by the motion program 138 illustrated in
It is possible to conceive a scheme for preliminarily performing operations for parsing, compiling and the like for each motion command specified by the motion program 138 and for determining a function for calculating the command values in each control cycle. However, the control device 100 according to one or more embodiments employs a scheme for successively interpreting each motion command specified by the motion program 138 and determining a function for calculating the command values in each control cycle and, thereafter, successively calculating the command values in each control cycle. Hereinafter, this scheme will be also referred to as “an interpreter scheme”. Namely, the control device 100 according to one or more embodiments executes motion control according to the motion program, through the interpreter scheme.
(D. Related Techniques)
Next, there will be described a related technique relating to the execution of the motion control according to the aforementioned motion program through the interpreter scheme.
The interpreter process P1A for successively interpreting the motion commands corresponds to a process for interpreting the execution of the user programs (the motion program). The command-value arithmetic process P2A for calculating the command value corresponds to a process for updating the command value for controlling an actuator.
In the related technique, a common processor 110A executes these two processes. In order to enable the common processor 110A to execute the two processes, respective processor time periods are assigned to these processes in a time-division manner. Namely, the interpreter process P1 and the command-value arithmetic process P2 are alternately executed. In order to stably update the command value in each predetermined control cycle, in general, the command-value arithmetic process P2A is executed through an interruption process with a constant period, while the interpreter process P1A is executed within the background time periods. In executing the motion control according to the related technique through the interpreter scheme, there are problems as follows.
The processing time periods taken by the command-value arithmetic process P2A for calculating the command values are varied depending on the contents of the motion commands, the execution timings thereof and the like, which induces variations of the processor time periods assigned to the interpreter process P1A. Therefore, it has not been easy to design the motion control by preliminarily estimating such variations.
In setting the cycle for executing the command-value arithmetic process P2A, namely the control cycle, it is necessary to take account of a certain amount of margin time periods, in addition to the time periods required for the execution of the interpreter process P1A, in order to realize stable motion control in consideration of the aforementioned variations in the processor time periods. This makes it impossible to utilize 100% of the performance of the processor.
In order to enable the execution of the command-value arithmetic process P2A through the interruption process, it is necessary to sufficiently consider the setting of the priority regarding the interpreter process P1A and the command-value arithmetic process P2A. Further, in order to transfer the results of arithmetic in the respective processes, it is necessary to incorporate complicated exclusive control regarding the memory access. Since it is necessary to take account of these points, there is a need for longer time periods for consideration and verification for designing and quality assurance.
It is an object of the control device 100 according to one or more embodiments to overcome the aforementioned problems.
(E. Parallel Processes)
Next, there will be described a method for executing the motion control according to a motion program through the interpreter scheme, in the control device 100 according to one or more embodiments.
In the following description, there will be exemplified a structure adapted to perform buffering for the parameter sets 150 using the main memory 120 as a common memory which can be accessed by the first core 111 and the second core 112. However, it is also possible to utilize the common cache 116 in the processor 110 as the common memory.
As described above, in one or more embodiments, the interpreter process P1 is simplified as a process for outputting the parameter sets 150 which define a function relating to the calculation of the command value and for writing them into the main memory 120. Further, the command-value arithmetic process P2 is simplified as a process for reading the parameter sets 150 from the main memory 120 and for updating the command value according to the function. Namely, in order to allow the interpreter process P1 to mainly perform only writing of data into the main memory 120 and to allow the command-value arithmetic process P2 to mainly perform only reading of data from the main memory 120, the possibility of contention of accesses to the main memory 120 is made substantially zero and, further, the interpreter process P1 and the command-value arithmetic process P2 are assigned to the respective different cores which share the main memory 120. By employing these processes which are independent of each other, it is possible to overcome problems which would be induced by interferences between the processes.
Namely, the first core 111 (the first arithmetic circuit) executes the interpreter process P1 for successively interpreting one or more commands (the motion program 138) stored in the secondary storage device 130 and for successively calculating the parameter sets 150 defining the function relating to the calculation of the command value. The second core 112 (the second arithmetic circuit) executes the command-value arithmetic process P2 for calculating the command value based on the parameter sets 150 having been successively calculated, in each predetermined control cycle, independently of the execution of the interpreter process P1.
In this case, the first core 111 (the first arithmetic circuit) writes the parameter sets having been successively calculated, into the main memory 120 which functions as the common memory. The second core 112 (the second arithmetic circuit) successively reads out the parameter sets 150 from the main memory 120 which functions as the common memory.
By employing the aforementioned structure, it is possible to substantially prevent the occurrence of contention of accesses to the memory from the respective cores, which eliminates the necessity of incorporating complicated exclusive control regarding memory accesses. Further, for the processes assigned to the respective cores, it is possible to utilize all the processor time periods of the cores which take charge thereof, which enables utilizing 100% of the performance of the processor.
By monitoring the empty time period in each control cycle, for the command-value arithmetic process P2 for updating the command value in each predetermined control cycle, it is possible to shorten each control cycle according to the empty time period, thereby easily optimizing the control accuracy of the motion control.
Since the processes are executed by the respective cores independently of each other, it is possible to simplify the designs of the programs to be executed by the respective cores, thereby reducing the man-hours required for designing and quality assurance.
(F. the Interpreter Process and the Command-Value Arithmetic Process)
There will be described the parameter sets 150 calculated through the aforementioned interpreter process, and the command-value arithmetic process which utilizes the parameter sets 150.
In the interpreter process, the motion program 138 is parsed and, thereafter, the amount of movement is calculated from the specified target position and/or the current position. Further, the acceleration time period, the deceleration time period, and the constant-speed time period are calculated from the specified speed and/or the specified acceleration.
More specifically, the parameter set 150 includes a control flag 151, an acceleration time period 152, a type of an acceleration function 153, a deceleration time period 154, a type of deceleration function 155, a constant-speed time period 156, an amount of each-axis movement 157, an each-axis speed 158, and an amount of interpolation movement 159. Such a parameter set 150 is calculated for each motion command included in the motion program 138.
The acceleration time period 152 designates the length of the acceleration section in the speed pattern illustrated in
The sum of the acceleration time period 152, the deceleration time period 154 and the constant-speed time period 156 indicates the time length of the entire speed pattern and is defined by a number of times of control cycles. Namely, the parameter set 150 includes the acceleration time period 152, the deceleration time period 154 and the constant-speed time period 156, as parameters indicative of the number of times the command value should be calculated. Further, when the calculation of the command value based on the parameter set 150 has been executed the specified number of times, the process for calculating the command value based on this parameter set 150 has been completed, and the calculation of the command value based on the next-calculated parameter set 150 is started.
The amount of each-axis movement 157 designates the amount of movement regarding each axis, and the each-axis speed 158 designates the speed regarding each axis. The amount of interpolation movement 159 designates the value of the synthesized amount of the movements regarding the two or more axes.
By using plural parameters as described above, it is possible to form a function indicative of the speed pattern or the like which is defined by the respective motion commands.
The control flag 151 included in the parameter set 150 in
In the command-value arithmetic process P2, successive updating of the command value based on the first-calculated parameter set 150-1 is executed. When specified n command values (a command value 1(1), a command value 1(2) . . . , a command value 1 (n)) have been calculated, the value of the control flag 151 in the parameter set 150-1 is changed from “valid” to “invalid”. Namely, after completing the calculation of the command value based on the parameter set 150, the second core 112 (the second arithmetic circuit) changes the value of the control flag 151 therein to a value indicative of “invalid”, thereby changing the state information associated with the parameter set 150 to the value indicative of the invalidity.
Then, as illustrated in
On the other hand, in the command-value arithmetic process P2, the command value is successively updated, based on the parameter set 150-2 positioned next to the parameter set 150-1.
As described above, the first core 111 (the first arithmetic circuit) removes a parameter set 150 associated with state information indicative of invalidity (namely, including a control flag having a value set to be “invalid and, thereafter, writes a newly-calculated parameter set 150 into the main memory 120. The processes as the interpreter process P1 and the command-value arithmetic process P2 are repeated until the completion of the processes for all the motion commands included in the motion program 138.
Further, for convenience of description, although the removal of the parameter set 150-1 illustrated in
(G. Procedure of Processes)
Next, there will be described the procedure of processes which are executed by the first core 111 and the second core 112, respectively, in the control device 100 according to one or more embodiments.
Referring to
Subsequently, the first core 111 determines whether or not all the motion commands included in the motion program 138 have been interpreted (step S108). If there is a motion command which has not been interpreted, out of the motion commands included in the motion program 138 (No in the step S108), the first core 111 determines whether or not there exists an area to which a new parameter set 150 can be outputted, in the main memory 120 (step S110). If there exists an area to which a new parameter set 150 can be outputted, in the main memory 120 (Yes in the step S110), the first core 111 sets an un-processed motion command included in the motion program 138 to be a motion command of interest (step S112) and calculates and outputs a parameter set 150 therefor. Namely, the processing in and after the step S102 are repeated.
If all the motion commands included in the motion program 138 have been interpreted (Yes in the step S108), or if there exists no area to which a new parameter set 150 can be outputted, in the main memory 120 (No in the step S110), the first core 111 determines whether or not there exists a parameter set 150 including a control flag 151 having a value set to be “invalid” (step S114).
If there exists a parameter set 150 including a control flag 151 having a value set to be “invalid” (Yes in the step S114), the first core 111 removes the parameter set 150 having the control flag 151 having the value set to be “invalid” (step S116).
After the execution of the step S116 or if there exists no parameter set 150 including a control flag 151 having a value set to be “invalid” (No in the step S114), the first core 111 determines whether or not there exists a parameter set 150 in the main memory 120 (step S118). If there exists a parameter set 150 in the main memory 120 (Yes in the step S118), the processing in and after the step S108 are repeated.
If there exists no parameter set 150 in the main memory 120 (No in the step S118), the process ends.
On the other hand, if the execution of the motion program 138 is commanded (step S200), the second core 112 reads out a first-calculated parameter set 150 from the main memory 120 (step S202) and, further, calculates the command value according to a function formed based on this read-out parameter set 150 (step S204). The second core 112 determines whether or not the command value has been calculated the number of times which is specified in the read-out parameter set 150 (step S206). If the command value has not been calculated the number of times which is specified in the parameter set 150 of interest (No in the step S206), the processing in and after the step S204 is repeated.
If the command value has been calculated the number of times which is specified in the parameter set 150 of interest (Yes in the step S206), the second core 112 changes the value of the control flag 151 included in the parameter set 150 of interest to “invalid” (step S208) and, further, determines whether or not there exists, in the main memory 120, a parameter set 150 including a control flag 151 having a value set to be “valid” (step S210).
If there exists, in the main memory 120, a parameter set 150 including a control flag 151 having a value set to be “valid” (Yes in the step S210), the second core 112 reads out, from the main memory 120, a first-calculated parameter set 150, out of the parameter sets 150 each including the control flag 151 having the value set to be “valid” (step S212). Further, the second core 112 repeats the processing in and after the step S204.
If there exists, in the main memory 120, no parameter set 150 including a control flag 151 having a value set to be “valid” (No in the step S210), the process ends.
(H. Advantages)
According to one or more embodiments, there is provided a structure adapted to execute the motion control, by interpreting the motion program including plural motion commands in the interpreter scheme. More specifically, the process (the interpreter process) for successively interpreting each motion command specified by the motion program 138, and the process for calculating the command value (the command-value arithmetic process) are executed by the respective different arithmetic circuits, independently of each other. At this time, in order to enable the execution of the two processes independently of each other, the results of the arithmetic by the interpreter process are outputted as parameter sets, which facilitates the transfer thereof to the command-value arithmetic process. As described above, the process required for interpretation through the interpreter scheme and the execution of the motion control is divided into the two processes which can be executed independently of each other. Further, the respective processes are executed by the respective different arithmetic circuits. This can realize updating of the command value in specified control cycles, without being influenced by the amount of arithmetic in the motion program.
The embodiments disclosed herein is to be considered in all respects as illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore to be embraced therein.
Number | Date | Country | Kind |
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2016-172042 | Sep 2016 | JP | national |