What is disclosed herein relates to a detection device.
Optical sensors capable of detecting fingerprint patterns and vein or vascular patterns are known (refer to, for example, Japanese Patent Application Laid-open Publication No. 2009-032005). Such optical sensors each include a plurality of photodiodes each using an organic semiconductor material as an active layer. As described in WO 2020/188959, each of the photodiodes is located between a lower electrode and an upper electrode and is formed such that, for example, the lower electrode, an electron transport layer, the active layer, a hole transport layer, and the upper electrode are stacked in this order. The electron transport layer and the hole transport layer are also called buffer layers.
The upper electrode is coupled to wiring in a frame area around a detection area. The upper electrode is stacked on side surfaces of the active layer and the buffer layers in the frame area, and a leak current may flow between the upper electrode and the lower electrode at the outermost periphery.
For the foregoing reasons, there is a need for a detection device capable of reducing occurrences of short circuits between a second electrode and a first electrode at the outermost periphery.
According to an aspect, a detection device includes: a substrate; and a plurality of photodiodes provided in a detection area of the substrate. The photodiodes includes: a plurality of first electrodes provided correspondingly to the photodiodes; a second electrode provided across the photodiodes; and an organic photodiode layer that includes a first carrier transport layer, an active layer, and a second carrier transport layer, and is provided across the photodiodes. In the detection area, the first electrodes, the first carrier transport layer, the active layer, the second carrier transport layer, and the second electrode are stacked in the order as listed. Outside the detection area, a third electrode configured to be supplied with a reference potential is disposed between the second electrode provided so as to cover a side surface of the organic photodiode layer and the first electrodes arranged at an outermost periphery.
The following describes modes (embodiments) for carrying out the present disclosure in detail with reference to the drawings. The present disclosure is not limited to the description of the embodiments given below. Components described below include those easily conceivable by those skilled in the art or those substantially identical thereto. In addition, the components described below can be combined as appropriate. What is disclosed herein is merely an example, and the present disclosure naturally encompasses appropriate modifications easily conceivable by those skilled in the art while maintaining the gist of the present disclosure. To further clarify the description, the drawings may schematically illustrate, for example, widths, thicknesses, and shapes of various parts as compared with actual aspects thereof. However, they are merely examples, and interpretation of the present disclosure is not limited thereto. The same component as that described with reference to an already mentioned drawing is denoted by the same reference numeral through the present disclosure and the drawings, and detailed description thereof may not be repeated where appropriate.
In the embodiments and claims, in expressing an aspect of disposing another structure on or above a certain structure, a case of simply expressing “on” includes both a case of disposing the other structure immediately on the certain structure so as to contact the certain structure and a case of disposing the other structure above the certain structure with still another structure interposed therebetween, unless otherwise specified.
The substrate 21 is electrically coupled to a control substrate 121 through a flexible printed circuit board 71. The flexible printed circuit board 71 is, for example, a flexible printed circuit board or a rigid circuit board. The flexible printed circuit board 71 is provided with the detection circuit 48. The control substrate 121 is provided with the control circuit 122 and the power supply circuit 123. The control circuit 122 is a field-programmable gate array (FPGA), for example. The control circuit 122 supplies control signals to the sensor 10, the gate line drive circuit 15, and the signal line selection circuit 16 to control detection operations of the sensor 10. The control circuit 122 also supplies control signals to the first and the second light sources 53 and 54 to control lighting and non-lighting of the first and the second light sources 53 and 54. The power supply circuit 123 supplies voltage signals including, for example, a sensor power supply signal (sensor power supply voltage) VDDSNS (refer to
The power supply circuit 123 supplies a power supply voltage to the first and the second light sources 53 and 54.
The substrate 21 has a detection area AA and a peripheral area GA. The detection area AA is an area provided with a plurality of photodiodes PD (refer to
The gate line drive circuit 15 and the signal line selection circuit 16 are provided in the peripheral area GA. Specifically, the gate line drive circuit 15 is provided in an area extending along a second direction Dy in the peripheral area GA. The signal line selection circuit 16 is provided in an area extending along a first direction Dx in the peripheral area GA, and is provided between the sensor 10 and the detection circuit 48.
In the following description, the first direction Dx is one direction in a plane parallel to the substrate 21. The second direction Dy is one direction in the plane parallel to the substrate 21, and is a direction orthogonal to the first direction Dx. The second direction Dy may, however, non-orthogonally intersect the first direction Dx. The term “plan view” refers to a positional relation when viewed in a direction orthogonal to the substrate 21.
The first light sources 53 are provided on the first light source base member 51, and arranged along the second direction Dy. The second light sources 54 are provided on the second light source base member 52, and arranged along the second direction Dy. The first light source base member 51 and the second light source base member 52 are electrically coupled, through respective terminals 124 and 125, provided on the control substrate 121, to the control circuit 122 and the power supply circuit 123.
For example, inorganic light-emitting diodes (LEDs) or organic electroluminescent (EL) diodes (organic light-emitting diodes (OLEDs)) are used as the first and the second light sources 53 and 54. The first and the second light sources 53 and 54 emit first and second light, respectively, having different wavelengths.
The first light emitted from the first light sources 53 is mainly reflected on a surface of an object to be detected, such as a finger, and enters the sensor 10. As a result, the sensor 10 can detect a fingerprint by detecting a shape of asperities on the surface of the finger or the like. The second light emitted from the second light sources 54 is mainly reflected in the finger or the like, or transmitted through the finger or the like, and enters the sensor 10. As a result, the sensor 10 can detect information on a living body in the finger or the like. Examples of the information on the living body include pulse waves, pulsation, and a vascular image of the finger or a palm. That is, the detection device 1 may be configured as a fingerprint detection device to detect a fingerprint or a vein detection device to detect a vascular pattern of, for example, veins.
The first light may have a wavelength of from 500 nm to 600 nm, for example, a wavelength of approximately 550 nm, and the second light may have a wavelength of from 780 nm and 950 nm, for example, a wavelength of approximately 850 nm. In this case, the first light is blue or green visible light, and the second light is infrared light. The sensor 10 can detect the fingerprint based on the first light emitted from the first light sources 53. The second light emitted from the second light sources 54 is reflected in the object to be detected, such as the finger, or transmitted through or absorbed by the finger or the like, and enters the sensor 10. As a result, the sensor 10 can detect the pulse waves or the vascular image (vascular pattern) as the information on the living body in the finger or the like.
Alternatively, the first light may have a wavelength of from 600 nm to 700 nm, for example, approximately 660 nm, and the second light may have a wavelength of from 780 nm and 900 nm, for example, approximately 850 nm. In this case, the sensor 10 can detect a blood oxygen saturation level in addition to the pulse waves, the pulsation, and the vascular image as the information on the living body based on the first light emitted from the first light sources 53 and the second light emitted from the second light sources 54. Thus, the detection device 1 includes the first and the second light sources 53 and 54, and therefore, can detect the various information on the living body by performing the detection based on the first light and the detection based on the second light.
The arrangement of the first and the second light sources 53 and 54 illustrated in
The sensor 10 includes the photodiodes PD. Each of the photodiodes PD included in the sensor 10 outputs an electrical signal corresponding to light irradiating the photodiode PD as a detection signal Vdet to the signal line selection circuit 16. The sensor 10 performs the detection in response to a gate drive signal Vgcl supplied from the gate line drive circuit 15.
The detection controller 11 is a circuit that supplies respective control signals to the gate line drive circuit 15, the signal line selection circuit 16, and the detector 40 to control operations thereof. The detection controller 11 supplies various control signals such as a start signal STV, a clock signal CK, and a reset signal RST1 to the gate line drive circuit 15. The detection controller 11 also supplies various control signals such as a selection signal ASW to the signal line selection circuit 16. The detection controller 11 also supplies various control signals to the first and the second light sources 53 and 54 to control the lighting and non-lighting of the respective first and second light sources 53 and 54.
The gate line drive circuit 15 is a circuit that drives a plurality of gate lines GCL (refer to
The signal line selection circuit 16 is a switch circuit that sequentially or simultaneously selects a plurality of signal lines SGL (refer to
The detector 40 includes the detection circuit 48, a signal processing circuit 44, a coordinate extraction circuit 45, a storage circuit 46, a detection timing control circuit (detection timing controller) 47, an image processing circuit 49, and an output processor (output processing circuit) 50. The detection timing control circuit 47 controls the detection circuit 48, the signal processing circuit 44, the coordinate extraction circuit 45, and the image processing circuit 49 so as to operate in synchronization with one another based on a control signal supplied from the detection controller 11.
The detection circuit 48 is an analog front-end (AFE) circuit, for example. The detection circuit 48 is a signal processing circuit having functions of at least a detection signal amplifying circuit 42 and an analog-to-digital (A/D) conversion circuit 43. The detection signal amplifying circuit 42 amplifies the detection signal Vdet. The A/D conversion circuit 43 converts analog signals output from the detection signal amplifying circuit 42 into digital signals.
The signal processing circuit 44 is a logic circuit that detects predetermined physical quantities received by the sensor 10 based on the output signals of the detection circuit 48. The signal processing circuit 44 can detect the asperities on the surface of the finger or the palm based on the signals from the detection circuit 48 when the finger is in contact with or in proximity to a detection surface. The signal processing circuit 44 can detect the information on the living body based on the signals from the detection circuit 48. Examples of the information on the living body include the vascular image, the pulse waves, the pulsation, and a blood oxygen level of the finger or the palm.
The signal processing circuit 44 may also perform processing of acquiring the detection signals Vdet (information on the living body) simultaneously detected by the photodiodes PD, and averaging the detection signals Vdet. In this case, the detector 40 can perform stable detection by reducing measurement errors caused by noise or relative positional misalignment between the object to be detected, such as the finger, and the sensor 10.
The storage circuit 46 temporarily stores therein signals calculated by the signal processing circuit 44. The storage circuit 46 may be, for example, a random-access memory (RAM) or a register circuit.
The coordinate extraction circuit 45 is a logic circuit that obtains detected coordinates of the asperities on the surface of the finger or the like when the contact or proximity of the finger is detected by the signal processing circuit 44. The coordinate extraction circuit 45 is the logic circuit that also obtains detected coordinates of blood vessels in the finger or the palm. The image processing circuit 49 combines the detection signals Vdet output from the respective photodiodes PD of the sensor 10 to generate two-dimensional information indicating the shape of the asperities on the surface of the finger or the like and two-dimensional information indicating the shape of the blood vessels in the finger or the palm. The coordinate extraction circuit 45 may output the detection signals Vdet as sensor output voltages Vo instead of calculating the detected coordinates. A case may be considered where the detector 40 does not include the coordinate extraction circuit 45 and the image processing circuit 49.
The output processor 50 serves as a processor that performs processing based on the outputs from the photodiodes PD. The output processor 50 may include, for example, the detected coordinates obtained by the coordinate extraction circuit 45 and the two-dimensional information generated by the image processing circuit 49 in the sensor output voltages Vo. The functions of the output processor 50 may be integrated into another component (for example, the image processing circuit 49).
The following describes a circuit configuration example of the detection device 1.
The gate lines GCL extend in the first direction Dx and are each coupled to the detection elements PAA arranged in the first direction Dx. A plurality of gate lines GCL (1), GCL (2), . . . , GCL (8) are arranged in the second direction Dy, and are each coupled to the gate line drive circuit 15. In the following description, the gate lines GCL (1), GCL (2), . . . , GCL (8) will each be simply referred to as the gate line GCL when they need not be distinguished from one another. To facilitate understanding of the description,
The signal lines SGL extend in the second direction Dy and are each coupled to the photodiodes PD of the detection elements PAA arranged in the second direction Dy. A plurality of signal lines SGL (1), SGL (2), . . . , SGL (12) are arranged in the first direction Dx, and are each coupled to the signal line selection circuit 16 and a reset circuit 17. In the following description, the signal lines SGL (1), SGL (2), . . . , SGL (12) will each be simply referred to as the signal line SGL when they need not be distinguished from one another.
To facilitate understanding of the description, 12 signal lines SGL are illustrated. However, this is merely an example, and N signal lines SGL may be arranged (where N is 12 or larger, and is, for example, 252). The resolution of the sensor is, for example, 508 dots per inch (dpi), and the number of cells is 252×256. In
The gate line drive circuit 15 receives various control signals including, for example, the start signal STV, the clock signal CK, and the reset signal RST1 from the control circuit 122 (refer to
The signal line selection circuit 16 includes a plurality of selection signal lines Lsel, a plurality of output signal lines Lout, and third switching elements TrS. The third switching elements TrS are provided correspondingly to the signal lines SGL. Six signal lines SGL (1), SGL (2), . . . , SGL (6) are coupled to a common output signal line Lout1. Six signal lines SGL (7), SGL (8), . . . , SGL (12) are coupled to a common output signal line Lout2. The output signal lines Lout1 and Lout2 are each coupled to the detection circuit 48.
The signal lines SGL (1), SGL (2), . . . , SGL (6) are grouped into a first signal line block, and the signal lines SGL (7), SGL (8), . . . , SGL (12) are grouped into a second signal line block. The selection signal lines Lsel are coupled to the gates of the respective third switching elements Trs included in one of the signal line blocks. One of the selection signal lines Lsel is coupled to the gates of the third switching elements TrS in the signal line blocks.
The control circuit 122 (refer to
As illustrated in
The control circuit 122 supplies a reset signal RST2 to the reset signal line Lrst. This operation turns on the fourth switching elements TrR to electrically couple the signal lines SGL to the reference signal line Lvr. The power supply circuit 123 supplies a reference signal COM to the reference signal line Lvr. This operation supplies the reference signal COM to a capacitive element Ca (refer to
The first switching elements Tr are provided correspondingly to the photodiodes PD. The first switching element Tr is configured as a thin-film transistor, and in this example, configured as an n-channel metal oxide semiconductor (MOS) thin-film transistor (TFT).
The gates of the first switching elements Tr belonging to the detection elements PAA arranged in the first direction Dx are coupled to the gate line GCL. The sources of the first switching elements Tr belonging to the detection elements PAA arranged in the second direction Dy are coupled to the signal line SGL. The drain of the first switching element Tr is coupled to the cathode of the photodiode PD and the capacitive element Ca.
The anode of the photodiode PD is supplied with the sensor power supply signal VDDSNS from the power supply circuit 123. The signal line SGL and the capacitive element Ca are supplied with the reference signal COM serving as an initial potential of the signal line SGL and the capacitive element Ca from the power supply circuit 123.
When the detection element PAA is irradiated with light, a current corresponding to the amount of the light flows through the photodiode PD. As a result, an electric charge is stored in the capacitive element Ca. When the first switching element Tr is turned on, a current corresponding to the electric charge stored in the capacitive element Ca flows through the signal line SGL. The signal line SGL is coupled to the detection circuit 48 through a corresponding one of the third switching elements TrS of the signal line selection circuit 16. Thus, the detection device 1 can detect a signal corresponding to the amount of the light received by the photodiode PD for each of the detection elements PAA or for each block unit PAG.
During a read period, a switch SSW is turned on to couple the detection circuit 48 to the signal lines SGL. The detection signal amplifying circuit 42 of the detection circuit 48 converts a current supplied from the signal line SGL into a voltage corresponding to the value of the current, and amplifies the result. A reference potential (Vref) having a fixed potential is supplied to a non-inverting input terminal (+) of the detection signal amplifying circuit 42, and the signal lines SGL are coupled to an inverting input terminal (−) of the detection signal amplifying circuit 42. In the embodiment, the same signal as the reference signal COM is supplied as the reference potential (Vref) voltage. The signal processing circuit 44 (refer to
The following describes a configuration of the photodiode PD.
As illustrated in
The substrate 21 has the detection area AA and the peripheral area GA. The detection area AA is an area including an area overlapping a plurality of first electrodes 23 included in the sensor 10. The peripheral area GA is an area outside the detection area AA and does not overlap the first electrodes 23. That is, the peripheral area GA is an area between the outer perimeter of the detection area AA and the ends of the substrate 21. The gate line drive circuit 15 and the signal line selection circuit 16 are provided in the peripheral area GA.
The first electrodes 23 are detection electrodes of the photodiodes PD, and each output an electrical signal corresponding to light emitted thereto. The first electrodes 23 included in the sensor 10 are arranged in a matrix having a row-column configuration in the detection area AA. Each of the first electrodes 23 outputs the electrical signal corresponding to the light emitted thereto as the detection signal Vdet to the signal line selection circuit 16. The detection device 1 detects the information on the living body based on the detection signals Vdet from the first electrodes 23. In other words, the photodiode PD serves as a biometric sensor. Each of the first electrodes 23 performs the detection in response to the gate drive signal Vgcl supplied from the gate line drive circuit 15.
The gate line drive circuit 15 and the signal line selection circuit 16 are provided in the peripheral area GA. Specifically, the gate line drive circuit 15 is provided in the area extending along the second direction Dy in the peripheral area GA. The signal line selection circuit 16 is provided in the area extending along the first direction Dx in the peripheral area GA, and is provided between the sensor 10 and the detection circuit 48.
A second electrode 24 covers the detection area AA and has an area larger than the detection area AA. A conductive wiring line 56 is located in the peripheral area GA, and the conductive wiring line 56 is electrically coupled to the second electrode 24 through coupling terminals 55. The conductive wiring line 56 is coupled to the power supply circuit 123 illustrated in
As illustrated in
As illustrated in
The first portion 95a is provided so as to overlap the gate line GCL and is provided between the first electrodes 23 adjacent in the second direction Dy with the gate line GCL interposed therebetween. The second portion 95b is provided so as to overlap the signal line SGL and is provided between the first electrodes 23 adjacent in the first direction Dx with the signal line SGL interposed therebetween. In other words, the first electrodes 23 are partitioned by the insulating film 95. The first electrodes 23 are each coupled to a lower buffer layer 32 (refer to
As illustrated in
As illustrated in
The substrate 21 is an insulating base member and is made using, for example, glass or a resin material. The substrate 21 is not limited to having a flat plate shape and may have a curved surface. In this case, the substrate 21 may be made of a film-like resin.
In the present embodiment, a direction from the substrate 21 toward the organic photodiode layer PDL in a direction orthogonal to a surface of the substrate 21 is referred to as “upper side” or simply “above”. A direction from the organic photodiode layer PDL toward the substrate 21 is referred to as “lower side” or simply “below”.
A light-blocking film 65 is provided on the substrate 21. The light-blocking film 65 is provided between the semiconductor layer 61 and the substrate 21. The light-blocking film 65 can reduce light entering a channel area of the semiconductor layer 61 from the substrate 21 side.
An undercoat film 91 is provided on the substrate 21 so as to cover the light-blocking film 65. The undercoat film 91 is formed of, for example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film. The undercoat film 91 is not limited to being configured as a single-layer film and may be configured as a multilayered film obtained by stacking a plurality of inorganic insulating films. An undercoat film may also be provided between the substrate 21 and the light-blocking film 65.
The first switching elements Tr (transistors) are provided above the substrate 21. The semiconductor layer 61 is provided on the undercoat film 91. For example, polysilicon is used as the semiconductor layer 61. The semiconductor layer 61 is, however, not limited thereto, and may be formed of, for example, a microcrystalline oxide semiconductor, an amorphous oxide semiconductor, or low-temperature polysilicon. Although only an n-type TFT is illustrated as the first switching element Tr, a p-type TFT may be formed in addition to the n-type TFT.
A gate insulating film 92 is provided on the undercoat film 91 so as to cover the semiconductor layer 61. The gate insulating film 92 is, for example, an inorganic insulating film such as a silicon oxide film. The gate electrode 64 is provided on the upper side of the gate insulating film 92. In the example illustrated in
However, the first switching element Tr is not limited thereto and may have a bottom-gate structure, or a dual-gate structure in which the gate electrodes 64 are provided on both the upper side and lower side of the semiconductor layer 61.
An interlayer insulating film 93 is provided on the gate insulating film 92 so as to cover the gate electrode 64. The interlayer insulating film 93 has, for example, a multilayered structure of a silicon nitride film and a silicon oxide film. The source electrode 62 and the drain electrode 63 are provided on the interlayer insulating film 93. The source electrode 62 is coupled to a source region of the semiconductor layer 61 through the second contact hole CH2 provided in the gate insulating film 92 and the interlayer insulating film 93. The drain electrode 63 is coupled to a drain region of the semiconductor layer 61 through the third contact hole CH3 provided in the gate insulating film 92 and the interlayer insulating film 93.
The first organic insulating film 94 is provided on the interlayer insulating film 93 so as to cover the source electrode 62 and the drain electrode 63 of the first switching element Tr. The first organic insulating film 94 is an organic planarizing film and has a better coverage property for wiring steps and provides better surface flatness than inorganic insulating materials formed by, for example, chemical vapor deposition (CVD).
The organic photodiode layer PDL is provided above the first organic insulating film 94. The first electrode 23 and the insulating film 95 are provided between both the substrate 21 and the first organic insulating film 94 and the organic photodiode layer PDL in the direction orthogonal to the surface of the substrate 21.
In more detail, the first electrode 23 is provided on the first organic insulating film 94 and is provided so as to cover the bottom surface and the inner side surface of the first contact hole CH1 formed in the first organic insulating film 94. The first electrode 23 is coupled to the source electrode 62 of the first switching element Tr at the bottom surface of the first contact hole CH1. The first electrode 23 is a cathode electrode of the organic photodiode layer PDL and is formed of a light-transmitting conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The first electrodes 23 are arranged so as to be separated from each other on a detection element PAA (photodiode PD) basis. The organic photodiode layer PDL has a larger area than the first electrode 23 in plan view and covers the upper surface and outer edges 23e of the first electrode 23.
The insulating film 95 is provided between the adjacent first electrodes 23 and is provided so as to cover the outer edges 23e of the first electrodes 23. In the present embodiment, the insulating film 95 is an inorganic insulating film and is made using a material such as a silicon nitride film or an aluminum oxide film. The insulating film 95 has at least one or more of the openings OP (refer to
The insulating film 95 is provided between the first organic insulating film 94 and the organic photodiode layer PDL in an area between the adjacent first electrodes 23. The insulating film 95 thereby insulates the adjacent first electrodes 23 from each other. In other words, the insulating film 95 can reduce leak currents between the adjacent photodiodes PD. The insulating film 95 also serves as a barrier film that reduces water entering the organic photodiode layer PDL from the first organic insulating film 94 in the area between the adjacent first electrodes 23.
The second organic insulating film 96 is provided so as to cover the inside of the first contact hole CH1. The first electrode 23 and the second organic insulating film 96 are stacked on the inner side surface and the bottom surface of the first contact hole CH1. The first organic insulating film 94, the first electrode 23, and the second organic insulating film 96 are stacked in this order on the inner side surface of the first contact hole CH1. The first electrode 23 and the second organic insulating film 96 are stacked in this order on the bottom surface of the first contact hole CH1 above the source electrode 62. The second organic insulating film 96 is provided so as to cover a corner 23t of the first electrode 23 in a position overlapping the open end of the first contact hole CH1.
The organic photodiode layer PDL is provided so as to cover the first electrodes 23, the insulating film 95, and the second organic insulating film 96. In more detail, the organic photodiode layer PDL includes an active layer 31, the lower buffer layer 32 (first carrier transport layer), and an upper buffer layer 33 (second carrier transport layer). The lower buffer layer 32 (first carrier transport layer) is provided between the active layer 31 and the first electrode 23. The upper buffer layer 33 (second carrier transport layer) is provided between the active layer 31 and the second electrode 24. The upper buffer layer 33 is a hole transport layer.
The lower buffer layer 32 is formed by coating using a material such as zinc acetate, ethoxylated polyethylenimine (PEIE), or polyethylenimine (PEI). The lower buffer layer 32 is a single layer, and has a thickness of, for example, approximately 30 nm or smaller.
A mixture of a p-type organic semiconductor and an n-type organic semiconductor is used as the active layer 31. Examples of the p-type organic semiconductor include PMDPP3T(poly((2,5-bis(2-hexyldecyl)-2,3,5,6-tetrahydro-3,6-dioxopyrrolo(3,4-c)pyrrole-1,4-diyl)-alt-(3′,3″-dimethyl-2,2′:5′,2″-terthiophene)-5,5″-diyl)). Examples of the n-type organic semiconductor include PC61BM ((6,6)-phenyl C61-butyric acid methyl ester). The thickness of the active layer 31 is, for example, approximately from 100 nm to 500 nm, and preferably approximately 350 nm.
The upper buffer layer 33 is, for example, a metal oxide layer of, for example, tungsten oxide (WO3) or a molybdenum oxide (MoOx). The upper buffer layer 33 is formed of a vapor-deposited film or a sputtered film, and has a thickness of, for example, approximately 30 nm or smaller.
The lower buffer layer 32, the active layer 31, and the upper buffer layer 33 forming the organic photodiode layer PDL are provided so as to cover the first electrodes 23, the insulating film 95, and the second organic insulating film 96. The lower buffer layer 32 is coupled to the first electrodes 23 in areas overlapping the openings OP of the insulating film 95. The lower buffer layer 32 includes an overlapping portion 32s provided on the insulating film 95 and an overlapping portion 32t provided on the second organic insulating film 96 in an area overlapping the first contact hole CH1.
In the detection device 1, the first organic insulating film 94, the first electrode 23, the lower buffer layer 32, the active layer 31, the upper buffer layer 33, and the second electrode 24 are stacked in this order in the direction orthogonal to the substrate 21 in an area overlapping the first electrode 23. In the area overlapping the first contact hole CH1, the first electrode 23, the second organic insulating film 96, the lower buffer layer 32 (overlapping portion 32t), the active layer 31, the upper buffer layer 33, and the second electrode 24 are stacked in this order. In the area between the adjacent first electrodes 23, the first organic insulating film 94, the insulating film 95, the lower buffer layer 32 (overlapping portion 32s), the active layer 31, the upper buffer layer 33, and the second electrode 24 are stacked in this order.
As described above, the insulating film 95 is provided between the adjacent first electrodes 23 and covers the outer edges 23e of the first electrodes 23. With this configuration, the lower buffer layer 32 is formed thinner in positions overlapping the outer edges 23e of the first electrodes 23. The insulating film 95 can reduce occurrences of short circuits between the active layer 31 and the first electrode 23 even if a step disconnection occurs between the overlapping portion 32s and the lower buffer layer 32 on the first electrode 23. To facilitate understanding,
Furthermore, the second organic insulating film 96 is provided so as to cover the inside of the first contact hole CH1 and covers the corner 23t of the first electrode 23 formed at the edge of the opening of the first contact hole CH1. This configuration planarizes the area overlapping the first contact hole CH1 and forms the overlapping portion 32t of the lower buffer layer 32 continuously with the lower buffer layer 32 on the first electrode 23. The second organic insulating film 96 covers most of the area of the first electrode 23 inside the first contact hole CH1. As a result, the second organic insulating film 96 can reduce the occurrences of the short circuits between the active layer 31 and the first electrode 23 even if a portion of the lower buffer layer 32 is formed thinner or the lower buffer layer 32 has a step disconnection in the area overlapping the first contact hole CH1.
Since the second organic insulating film 96 planarizes the area overlapping the first contact hole CH1, variations in thicknesses of the active layer 31, the lower buffer layer 32, and the upper buffer layer 33 that form the organic photodiode layer PDL are reduced over the area overlapping the first contact hole CH1 and areas not overlapping the first contact hole CH1. That is, compared with a configuration in which the second organic insulating film 96 is not provided, the step disconnection and the thinning of the active layer 31, the lower buffer layer 32, and the upper buffer layer 33 are reduced in the area overlapping the first contact hole CH1. As a result, the detection device 1 can reduce a leak current between the anode and cathode of the photodiode PD.
The second electrode 24 is an upper electrode provided on the upper side of the organic photodiode layer PDL. More specifically, the second electrode 24 is provided on the upper side of the upper buffer layer 33 of the organic photodiode layer PDL. The second electrode 24 is an anode electrode of the photodiode PD and is continuously formed over the detection elements PAA (photodiodes PD). The second electrode 24 is made using a metal material such as silver (Ag) and serves as a reflective electrode. The second electrode 24 is not limited to this material and may be formed of a light-transmitting conductive material in the same manner as the first electrode 23.
The sealing films 97a, 97b, and 97c are provided on the upper side of the second electrode 24. An inorganic film such as a silicon nitride film or an aluminum oxide film is used as each of the sealing films 97a and 97c. A resin film of, for example, an acrylic material is used as the sealing film 97b. The sealing films 97a, 97b, and 97c are not limited to the multilayered films in which inorganic and organic insulating films are stacked, and may be a single-layered film. The resin mask 98 is further provided so as to cover the sealing film 97c. The sealing films 97a, 97b, and 97c and the resin mask 98 well seal the organic photodiode layer PDL, and thus can reduce water entering the organic photodiode layer PDL from the upper surface side thereof.
The thickness of the first electrode 23 is approximately 50 nm, for example. The thickness of the second electrode 24 is approximately 100 nm or smaller, for example. That is, the thickness of each of the lower buffer layer 32 and the upper buffer layer 33 is smaller than the active layer 31 and smaller than each of the first and the second electrodes 23 and 24. In other words, the thickness of each of the first and the second electrodes 23 and 24 is smaller than the active layer 31 and larger than each of the lower buffer layer 32 and the upper buffer layer 33.
The materials and the manufacturing methods of the lower buffer layer 32, the active layer 31, and the upper buffer layer 33 are merely exemplary, and other materials and manufacturing methods may be used. For example, the lower buffer layer 32 may be a vapor-deposited film or a sputtered film using a material such as zinc oxide (ZnO) or a titanium oxide (TiO2). The upper buffer layer 33 may be a vapor-deposited film or a sputtered film using a material such as nickel oxide (NiO), or the upper buffer layer 33 may be formed by coating using nanoparticle ink of, for example, a vanadium oxide (V2O5) or tungsten oxide (WO3), or using a material such as PEDOT:PSS.
The planar and sectional shapes of the insulating film 95 and the second organic insulating film 96 illustrated in
The conductive wiring line 56 is routed and the coupling terminals 55 are formed in the peripheral area GA. The conductive wiring line 56 is formed on the undercoat film 91. Each of the coupling terminals 55 includes a conductive base 57 electrically coupled to the conductive wiring line 56 and a terminal electrode 23a electrically coupled to the base 57 through a contact hole CHA. The second organic insulating film 96 is provided so as to cover the inside of the contact hole CHA. The terminal electrode 23a is electrically coupled to second electrode 24.
The third electrode 25 is electrically coupled to a reference potential wiring line 26 through a contact hole CHC. The reference potential wiring line 26 is routed along the outermost periphery of the first electrodes 23.
The reference potential wiring line 26 is supplied with the same potential as the reference signal COM. Therefore, the third electrode 25 has the same potential as the reference signal that is a reset potential supplied from the reset circuit 17 to the signal line SGL. As a result, the potential difference between the third electrode 25 and the first electrode 23 decreases, and thus, the leak current from the third electrode 25 to the first electrode 23 becomes difficult to occur.
If a leak current from the second electrode 24 to the third electrode 25 is a problem during periods such as when optical detection is not performed, the reference potential wiring line 26 may be supplied with the same potential as that of the second electrode 24. As a result, the potential difference between the third electrode 25 and the second electrode 24 decreases, and thus, the leak current from the second electrode 24 to the third electrode 25 becomes difficult to occur.
The second organic insulating film 96 is provided so as to cover the inside of the contact hole CHC. As illustrated in
As described above, the detection device 1 of the first embodiment includes the photodiodes PD, the first electrodes 23, the second electrode 24, the third electrode 25, and the organic photodiode layer PDL that are provided on the substrate 21. The first electrodes 23 are provided correspondingly to the photodiodes PD. The second electrode 24 is provided across the photodiodes PD. The organic photodiode layer PDL includes the lower buffer layer 32 (first carrier transport layer), the active layer 31, and the upper buffer layer 33 (second carrier transport layer), and is provided across the photodiodes PD.
In the detection area AA where the first electrodes 23 are arranged, each of the photodiodes PD includes the first electrode 23, the lower buffer layer 32 (first carrier transport layer), the active layer 31, the upper buffer layer 33 (second carrier transport layer), and the second electrode 24 that are stacked in the order as listed. The third electrode 25 is supplied with the reference potential. The third electrode 25 is located between the second electrode 24 and the first electrodes 23. The second electrode 24 is provided so as to cover the side surfaces PDLe of the organic photodiode layer PDL outside the detection area AA, and the first electrodes 23 are arranged at the outermost periphery.
With this configuration, the leak current flows between the second electrode 24 and the third electrode 25, and the leak currents between the second electrode 24 on the side surfaces PDLe of the organic photodiode layer PDL and the first electrodes 23 at the outermost periphery are reduced.
As illustrated in
With this configuration, the leak current flows between the second electrode 24 and the third electrode 25, and the leak currents between the second electrode 24 on the side surfaces PDLe of the organic photodiode layer PDL and the first electrodes 23 at the outermost periphery are reduced.
As described above, in the detection device 1A of the second embodiment, the third electrode 25 is disposed on all but one of the sides surrounding the outermost periphery of the first electrodes 23. In an area where the third electrode 25 is not disposed, the second electrode 24 is located inside the side surfaces PDLe of the organic photodiode layer PDL. That is, in the area where the third electrode 25 is not disposed, the second electrode 24 is not stacked on the side surface PDLe of the organic photodiode layer PDL. This configuration reduces leak currents in the area where the third electrode 25 is not disposed.
As illustrated in
With this configuration, the leak current flows between the second electrode 24 and the third electrode 25, and the leak currents between the second electrode 24 on the side surfaces PDLe of the organic photodiode layer PDL and the first electrodes 23 at the outermost periphery are reduced.
As described above, in the detection device 1B of the third embodiment, the third electrode 25 is located on only one of the sides surrounding the outermost periphery of the first electrodes 23. In an area of a plurality of sides where the third electrode 25 is not disposed, the second electrode 24 is located inside the side surfaces PDLe of the organic photodiode layer PDL. That is, in the area where the third electrode 25 is not disposed, the second electrode 24 is not stacked on the side surfaces PDLe of the organic photodiode layer PDL. This configuration reduces leak currents in the area on the sides where the third electrode 25 is not disposed.
While the preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to the embodiments described above. The content disclosed in the embodiments is merely an example, and can be variously modified within the scope not departing from the gist of the present disclosure. Any modifications appropriately made within the scope not departing from the gist of the present disclosure also naturally belong to the technical scope of the present disclosure. At least one of various omissions, substitutions, and changes of the components can be made without departing from the gist of the embodiments and modifications described above.
Number | Date | Country | Kind |
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2022-018801 | Feb 2022 | JP | national |
This application claims the benefit of priority from Japanese Patent Application No. 2022-018801 filed on Feb. 9, 2022 and International Patent Application No. PCT/JP2023/002953 filed on Jan. 31, 2023, the entire contents of which are incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/JP2023/002953 | Jan 2023 | WO |
Child | 18791685 | US |