The present application is based on, and claims priority from JP Application Serial Number 2018-202039, filed Oct. 26, 2018, the disclosure of which is hereby incorporated by reference herein in its entirety.
The present invention relates to a display controller, a display control system, an electro-optical device, an electronic apparatus, a mobile unit, and the like.
In display control of display devices, a processing device such as a CPU transmits image data and a control signal to a display controller, and the display controller performs image processing and generates a timing signal. A display driver then drives an electro-optical panel based on the image data that underwent the image processing and the timing signal.
Patent Document 1 discloses a technique for dealing with a display abnormality in a display device. In Patent Document 1, a source driver IC is a display driver, and a liquid crystal display unit is an electro-optical panel. In Patent Document 1, three source drivers IC drive one liquid crystal display unit, and the presence or absence of an abnormality in each of the source drivers IC is detected. If an abnormality is detected in a source driver IC, the display operation of the source driver IC is stopped, and the entire display area that is driven by the source driver IC is displayed in black or white.
International Publication No. 2010/038578 is an example of the related art.
In the above known technique, a display operation of a display driver in which an abnormality was detected is stopped, and display is disabled in the entire display area that is driven by the display driver. Therefore, when there is an actual abnormality only in a portion of the display area that is driven by the display driver in which the abnormality was detected, there is the issue that the remaining normal display area cannot be used. In other words, there is an issue that content that is actually displayed in the abnormal display area, out of the display area that is driven by the display driver, cannot be displayed using the remaining normal display area
One aspect of the present disclosure pertains to a display controller that includes an interface circuit that receives abnormal display line detection information from a display driver that drives an electro-optical panel, and a processing circuit that controls the display driver, and the processing circuit performs determination on an abnormal display area based on the abnormal display line detection information, and if a specific display pattern is displayed in the abnormal display area, outputs, via the interface circuit, image data for displaying the specific display pattern in a destination display area that is a display area different from the abnormal display area.
The disclosure will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
Preferred embodiments of the disclosure will be described below in detail. It is to be noted that the embodiments described below are not intended to unduly limit the scope of the disclosure recited in the appended claims, and not all configurations described in the embodiments are necessarily essential to the solving means of the disclosure.
An on-vehicle display system can be envisioned as the display system 520. The electro-optical panel 460 is a cluster panel provided in front of a driver's seat, for example. Various pieces of information that are presented to a driver are displayed on the cluster panel. For example, meters, icons that inform the driver of the state of the automobile, a display that informs the driver of the in-vehicle temperature, and the like can be envisioned as the information displayed on the cluster panel. The display content can be envisioned as a specific display pattern, which will be described later. Note that application of the display system 520 is not limited thereto, and the display system 520 can be applied to various electronic apparatuses such as a projector, a television device, an information processing device, and a mobile information terminal. In addition, various display content that is displayed on the display of any of these electronic apparatuses can be defined as a specific display pattern.
The control device 250 transmits image data to the display controller 100. The display controller 100 receives image data from the control device 250, and processes the image data. The display controller 100 outputs the processed image data and a timing control signal to the display driver 300. The timing control signal is a horizontal synchronization signal, a vertical synchronization signal, a pixel clock signal, or the like. The display driver 300 receives the image data and timing control signal from the display controller 100, and drives the electro-optical panel 460 based on the image data and timing control signal. Accordingly, an image corresponding to the image data is displayed on the electro-optical panel 460.
The control device 250 is a processor such as a CPU (Central Processing Unit), a microcomputer, or the like. Alternatively, the control device 250 may also be constituted by a plurality of circuit components mounted on a circuit substrate. The display controller 100 is an integrated circuit device. The display driver 300 is a data line driver or a scanning line driver. The data line driver is an integrated circuit device. The scanning line driver is an integrated circuit device or a circuit formed on a glass substrate of the electro-optical panel 460. The display driver 300 may have a configuration in which a data line driver and a scanning line driver are combined into one integrated circuit device. The electro-optical panel 460 is a matrix-type liquid crystal display panel or an EL (Electro Luminescence) panel, for example.
In this embodiment, the display driver 300 detects an abnormal display line, and transmits the detection result to the display controller 100. The display controller 100 performs processing for moving a specific display pattern to a normal display area, based on the received abnormal display line detection information. The abnormal display line is a data line on which a display abnormality has been detected from among the data lines of the electro-optical panel 460, or a scanning line on which a display abnormality has been detected from among the scanning lines of the electro-optical panel 460. The specific display pattern is a display pattern that is to be moved when an abnormal display line is detected, from among content that is displayed on the electro-optical panel 460. In other words, content displayed on the electro-optical panel 460 includes content that is to be moved from an abnormal display area to a normal display area and content that is not to be moved. From among the content, the content that is moved from the abnormal display area to the normal display area is a specific display pattern. This embodiment will be described below in detail.
The electro-optical panel 460 includes, for example, a substrate such as a glass substrate, a pixel array provided on the substrate, and data lines and scanning lines connected to the pixel array. The data lines and scanning lines are ITO (Indium Tin Oxide) interconnects provided on the substrate, for example. The panel module 470 is configured by an integrated circuit device, which is the display driver 300, being mounted on this substrate of the electro-optical panel 460. The display controller 100 and the nonvolatile memory 150 are mounted on a circuit substrate, for example. The display system 520 is configured by the circuit substrate and the panel module 470 being connected by a flexible substrate, a cable, or the like, and the circuit substrate and the control device 250 being connected by a flexible substrate, a cable, or the like.
The display controller 100 includes an interface circuit 110, an interface circuit 120, a processing circuit 130, a memory 140, and a register 160. The display driver 300 includes an error detection circuit 310.
The error detection circuit 310 detects an abnormal display line of the electro-optical panel 460. The display driver 300 outputs information regarding the abnormal display line detected by the error detection circuit 310, as abnormal display line detection information to the display controller 100.
The interface circuit 120 performs communication between the display controller 100 and the display driver 300. Specifically, the interface circuit 120 transmits, to the display driver 300, image data and a timing control signal that are output by the processing circuit 130. Also, the interface circuit 120 receives abnormal display line detection information from the display driver 300, and outputs the abnormal display line detection information to the processing circuit 130.
For example, LVDS (Low Voltage Differential Signal), RGB serial, or a transmission scheme of a display port standard can be adopted as a communication scheme for the image data and timing control signal. In addition, I2C (Inter Integrated Circuit), SPI (Serial Peripheral Interface), or the like can be adopted as a communication scheme for the abnormal display line detection information and the like. The interface circuit 120 can include an input/output buffer circuit and a control circuit that that realize these communication schemes.
The interface circuit 110 performs communication between circuits of the control device 250 and the display controller 100. Specifically, the interface circuit 110 receives image data and a timing control signal from the control device 250, outputs the image data to the processing circuit 130 and the memory 140, and outputs the timing control signal to the processing circuit 130. The timing control signal is a clock signal, a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, or the like. In addition, the interface circuit 110 receives, from the control device 250, display pattern designation data for designating an area in which a specific display pattern is to be displayed, and stores the display pattern designation data in the register 160. In addition, the interface circuit 110 outputs error detection information to the control device 250. For example, as will be described later, when the processing circuit 130 detects an abnormal display area, the error detection information is stored in the register 160. The interface circuit 110 outputs the error detection information stored in the register 160, to the control device 250. A scheme similar to that of the interface circuit 120 can be adopted as a communication scheme of the interface circuit 110.
The memory 140 is an image memory that stores image data received from the interface circuit 110. The memory 140 is a semiconductor memory such as an SRAM or DRAM.
The processing circuit 130 controls a display driver. Specifically, the processing circuit 130 outputs image data and a timing control signal to the display driver 300 via the interface circuit 120. The processing circuit 130 includes a display control unit 131, an image processing unit 132, and an information display control unit 133.
The display control unit 131 generates a timing control signal for the display driver 300 based on a timing control signal received from the control device 250 via the interface circuit 110. The display control unit 131 outputs the generated timing control signal to the display driver 300 via the interface circuit 120.
The information display control unit 133 determines an abnormal display area based on abnormal display line detection information received from the display driver 300 via the interface circuit 120. The information display control unit 133 then determines whether or not to move a specific display pattern, based on display pattern designation data stored in the register 160 and the determination result of the abnormal display area, and outputs the determination result to the image processing unit 132. In other words, if a specific display pattern is displayed in the abnormal display area, the information display control unit 133 determines to move the specific display pattern.
The image processing unit 132 performs image processing on image data received from the control device 250 via the interface circuit 110. The image processing unit 132 outputs the processed image data to the display driver 300 via the interface circuit 120. If the information display control unit 133 determines to move a specific display pattern, the image processing unit 132 performs image processing for moving the specific display pattern to a destination display area. Specifically, the image processing unit 132 reads out the image data of the specific display pattern from the memory 140, and rewrites the image data of the destination display area with the image data of the specific display pattern. Note that the image data of the specific display pattern may also be stored in the nonvolatile memory 150. The image processing unit 132 may also read out the image data of the specific display pattern from the nonvolatile memory 150 via the interface circuit 110, and rewrite the image data of the destination display area with the image data of the specific display pattern. If the image processing unit 132 reads out image data of a specific display pattern from the memory 140, the nonvolatile memory 150 may be omitted.
Here, the destination display area is a display area different from an abnormal display area, and is a normal display area, for example. As will be described later, a configuration may also be adopted in which, even if there is an abnormal display line in the destination display area, the destination display area is recognized as a normal display area if it is within an allowable range, and a specific display pattern is moved to the destination display area. The destination display area is designated using register values, for example. Specifically, the control device 250 writes destination designation data for designating a destination display area, in the register 160 via the interface circuit 110. The information display control unit 133 gives an instruction regarding the destination display area to the image processing unit 132 based on the destination designation data read out from the register 160.
The processing circuit 130 is constituted by a logic circuit. The logic circuit is, for example, a gate array circuit or a standard cell array circuit. As used herein, the gate array circuit refers to an array circuit in which logic cells are automatically placed and signal lines are automatically routed. Also, in a standard cell array circuit, the logic cells are standardized cells. The standard cell array circuit refers to an array circuit in which signal lines are automatically routed in a logic cell array. The units of the processing circuit 130 may also be configured as individual logic circuits. Alternatively, a configuration may also be adopted in which the processing circuit 130 is a processor such as a DSP (Digital Signal Processor), and functions of the units of the processing circuit 130 are realized by the processor executing a program or the like in which the functions of the units of the processing circuit 130 are written.
Note that the configuration of the display system 520 is not limited to the configuration in
In the configuration example in
In the configuration example in
Next, operations of the display controller 100 when moving a specific display pattern will be described.
In
The information display control unit 133 of the display controller 100 determines abnormal display lines based on abnormal display line detection information. In the examples in
The information display control unit 133 determines whether or not to move the specific display pattern PTN to a destination display area DSA, based on the determination result on whether or not the specific display pattern PTN and the abnormal display lines overlap. In other words, when the specific display pattern PTN and abnormal display lines overlap, the information display control unit 133 determines to move the specific display pattern PTN to the destination display area DSA. Alternatively, when the number of abnormal display lines that overlap the specific display pattern PTN is larger than or equal to a threshold value, the information display control unit 133 determines to move the specific display pattern PTN to the destination display area DSA.
In the above example, the abnormal display area is abnormal display lines themselves. Note that the abnormal display area is not limited thereto.
For example, the information display control unit 133 determines, as an abnormal display area, the range from SL15 in which x is smallest to SL40 in which x is largest in
Alternatively, the error detection circuit 310 of the display driver 300 may detect whether or not there is an abnormal display line in each line group.
As described with reference to
For example, during processing for detecting a scanning line that is an abnormal display line, data for designating the range of scanning lines in the vertical scanning direction is display pattern designation data. In addition, the display pattern designation data may also be data for designating a two-dimensional area. For example, the display pattern designation data may be data in which two pixel positions are designated. In this case, a rectangular area in which a line connecting the two pixel positions is a diagonal line is an area in which the display pattern PTN is displayed.
In addition, in the above example, a case has been described in which the specific display pattern PTN is an image of a rectangular area, as an example. For example, when an icon, mark, or the like is displayed as the specific display pattern PTN, the image of a rectangular area that includes the icon or mark is the specific display pattern PTN. Note that the specific display pattern PTN is not limited thereto.
For example, the specific display pattern PTN may also be an image itself that has a specific shape. For example, when an icon, mark, or the like is displayed as the specific display pattern PTN, the icon or mark itself may be the specific display pattern PTN. Also in this case, as described above, the range of data lines in the horizontal scanning direction or the range of scanning lines in the vertical scanning direction is display pattern designation data.
According to the above embodiment, the processing circuit 130 determines an abnormal display area based on abnormal display line detection information. Then, if the specific display pattern PTN is displayed in the abnormal display area, the processing circuit 130 outputs, via the interface circuit 120, image data for displaying the specific display pattern PTN in the destination display area DSA.
With such a configuration, in a display area that is driven by one display driver 300, the specific display pattern PTN can be moved from an abnormal display area to a normal display area. In other words, if a portion of a display area that is driven by one display driver 300 is abnormal, the remaining normal display area can be used.
Various embodiments of the display system 520 that includes the display controller 100 are described below. Note that a plurality of embodiments to be described below may be combined as appropriate. For example, an embodiment in which an abnormal display line is an abnormal data line and an embodiment in which an abnormal display line is an abnormal scanning line may be combined.
The data line driver DDA1 drives the left half of the display area IMA, and the data line driver DDA2 drives the right half of the display area IMA. The scanning line driver SCA1 drives the upper half of the display area IMA, and the scanning line driver SCA2 drives the lower half of the display area IMA. Each of the data line drivers DDA1 and DDA2 and the scanning line drivers SCA1 and SCA2 corresponds to the display driver 300 in
In
More specifically, the display controller 100 includes a storage unit 170 that stores a first threshold value for determining an abnormal display area. The storage unit 170 corresponds to the register 160 in
As shown in
According to this embodiment, if the number N1 of abnormal display lines that overlap the display pattern PTN1 is larger than the first threshold value Th1 that indicates an allowable range, the display pattern PTN1 is displayed in the destination display area DSA. Accordingly, the allowable range that indicates the number of abnormal display lines that are allowed to overlap the display pattern PTN1 can be set by setting the first threshold value Th1. In addition, as will be described later, the first threshold value Th1 can be set in association with the degree of importance of a display pattern.
In
Specifically, the storage unit 170 stores degree-of-importance information. The degree-of-importance information represents a first degree of importance, which is the degree of importance of the display pattern PTN1 and a second degree of importance, which is the degree of importance of the display pattern PTN2. The second degree of importance is lower than the first degree of importance. When the display pattern PTN1 is displayed in an abnormal display area, the processing circuit 130 determines whether or not to move the display pattern PTN1 to the destination display area DSA, based on the first degree of importance. Also, when the display pattern PTN2 is displayed in an abnormal display area, the processing circuit 130 determines whether or not to move the display pattern PTN2, based on the second degree of importance.
The degree of importance is an index for determining whether or not to display a display pattern of an icon, mark, or the like using a normal display area. The higher the degree of importance is, the more likely a determination is made to display the display pattern in the normal display area. For example, if the degree of importance is a binary value, if the degree of importance is high, a display pattern is moved to a destination display area, and, if the degree of importance is low, the display pattern is not moved. Alternatively, if the degree of importance is a ternary or higher value, the higher the degree of importance is, the smaller the above first threshold value Th1 is. In this embodiment, for example, a first threshold value Th11 of the display pattern PTN1 is set according to the first degree of importance, and a first threshold value Th12 of the display pattern PTN2 is set according to the second degree of importance. Here, Th12>Th11. When the relationship between the number N1 of abnormal display lines and these threshold values is N1>Th12>Th11, both the display pattern PTN1 and the display pattern PTN2 are moved to the destination display area. In addition, when Th12>N1>Th11, the display pattern PTN1 is displayed in the destination display area, and the display pattern PTN2 is not moved.
According to this embodiment, whether or not to move a display pattern from an abnormal display area to a destination display area can be determined according to the degree of importance of the display pattern. In other words, a display pattern with a high degree of importance can be moved from an abnormal display area to a destination display area.
As described above, in this embodiment, if the number N1 of abnormal display lines that overlap the display pattern PTN1 satisfies N1>Th1, the display pattern PTN1 is moved to the destination display area DSA. In this embodiment, furthermore, whether or not to display the display pattern PTN1 in the destination display area DSA may be determined based on the number of abnormal display lines that overlap the destination display area DSA.
Specifically, the storage unit 170 stores a second threshold value for determining whether or not to enable display in the destination display area DSA. The second threshold value is denoted by Th2. The processing circuit 130 determines the number of abnormal display lines that overlap the destination display area DSA, based on abnormal display line detection information. This number of abnormal display lines is denoted by N2. When N1>Th1, the processing circuit 130 determines whether or not N2≤Th2. If N2≤Th2, the processing circuit 130 determines to display the display pattern PTN1 in the destination display area DSA.
According to this embodiment, if abnormal display lines overlap the destination display area DSA, whether or not to display the display pattern PTN1 in the destination display area DSA can be determined based on the number of such abnormal display lines. The second threshold value Th2 indicates an allowable range in which the display pattern PTN1 is displayed in the destination display area DSA. If N2>Th2, the processing circuit 130 displays the display pattern PTN1, for example, in a second destination display area DSA2, which is different from the destination display area DSA. If abnormal display lines overlap the second destination display area DSA2, whether or not to move the display pattern PTN1 may be determined in accordance with the threshold value and the number of abnormal display lines, similarly to the destination display area DSA. Alternatively, if N2>Th2, the processing circuit 130 may cancel moving of the display pattern PTN1.
As described above, in this embodiment, the number N1 of abnormal display lines that overlap the display pattern PTN1 is determined. Note that there is no limitation thereto, and the processing circuit 130 may also determine whether or not to display the display pattern PTN1 in the destination display area DSA, based on the number of abnormal display lines in a specific area, which is a portion of the display pattern PTN1.
For example, assume that the display pattern PTN1 is a rectangular area, which includes an icon, mark, or the like. In this case, the area of the icon, mark, or the like in the rectangular area is the specific area. Alternatively, a portion of the area of the icon, mark, or the like may also be the specific area. For example, if the icon, mark, or the like can be identified by visually recognizing only a portion of its area, the portion of the area may be the specific area. Data for designating the specific area is stored in the storage unit 170.
According to this embodiment, if a portion that is important to visually recognizing the display pattern PTN1 overlaps an abnormal display line, the display pattern PTN1 can be displayed in the destination display area DSA.
A technique in which the processing circuit 130 determines whether or not to move the specific display pattern PTN to the destination display area DSA is similar to the technique in the first embodiment. Accordingly, the storage unit 170 stores a third threshold value for determining an abnormal display area. The number of abnormal scanning lines that overlap the specific display pattern PTN is denoted by N3, and the third threshold value is denoted by Th3. The processing circuit 130 determines whether or not N3>Th3. If N3>Th3, the processing circuit 130 determines to display a specific display pattern PTN2 in the destination display area DSA. Note that the technique for determining whether or not to move a display pattern based on the degree of importance of the display pattern, and the like can be applied to the second embodiment similarly to the first embodiment.
In
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In
Next, a detailed configuration example of an error detection circuit will be described.
As shown in
The pixel array PXA, the data lines SL1 to SLn, the scanning lines GL1 to GLm, and the scanning line driver SCC are formed on a glass substrate. The data line driver DDC is an integrated circuit device, which is mounted on the glass substrate to connect terminals TS1 to TSn to the data lines SL1 to SLn on the glass substrate. Note that the scanning line driver SCC may also be constituted by an integrated circuit device. In addition, the data line driver DDC and the scanning line driver SCC may also be configurated as one integrated circuit device.
The data line driver DDC includes a drive circuit 321 that drives the data lines SL1 to SLn via the terminals TS1 to TSn, and an error detection circuit 311 connected to the terminals TS1 to TSn. The error detection circuit 311 detects an abnormal data line based on a voltage that is output by the data line driver DDC. Specifically, when a voltage other than a data voltage to be originally applied to a data line is applied to the data line, the error detection circuit 311 determines the data line as an abnormal data line. For example, an abnormality in the drive circuit 321, a contact failure between the terminals TS1 to TSn, or short-circuiting of the data lines SL1 to SLn can be envisioned as a factor that causes an abnormal data line.
The scanning line driver SCC includes a drive circuit 322 that drives the scanning lines GL1 to GLm and an error detection circuit 312 connected to the scanning lines GL1 to GLm. The error detection circuit 312 detects an abnormal scanning line based on a voltage that is output by the scanning line driver SCC. Specifically, when a voltage other than a scanning line driving voltage to be originally applied to a scanning line is applied to the scanning line, the error detection circuit 312 determines the scanning line as an abnormal scanning line. For example, an abnormality in the drive circuit 322 and short-circuiting in the scanning lines GL1 to GLm can be envisioned as factors that cause an abnormal scanning line. In addition, if the scanning line driver SCC is an integrated circuit device, a contact failure between terminals can be further envisioned as a factor that causes an abnormal scanning line.
The interface circuit 371 receives image data and a timing control signal from the display controller 100. The control circuit 361 outputs pixel data to the D/A conversion circuit 341 based on the image data and timing control signal received by the interface circuit 371. The pixel data is image data corresponding to a data voltage that is written to the pixels. The D/A conversion circuit 341 D/A-converts the pixel data into a data voltage. The drive circuit 321 amplifies the data voltage from the D/A conversion circuit 341, and outputs the amplified data voltage to the terminals TS1 to TSn.
The drive circuit 321 includes amplifier circuits AM1 to AMn, switches SA1 to SAn, and switches SB1 to SBn.
The amplifier circuits AM1 to AMn amplify a data voltage from the D/A conversion circuit 341. The amplifier circuits AM1, AM3, . . . , AMn-1 are positive electrode amplifiers that output a positive electrode data voltage in polarity inversion driving. The amplifier circuits AM2, AM4, . . . , AMn are negative electrode amplifiers that output a negative electrode data voltage in polarity inversion driving. Here, “n” is an even number.
The switches SA1 to SAn and SB1 to SBn are each constituted by a transistor, for example. A state where the switches SA1 to SAn are on and the switches SB1 to SBn are off is defined as a first state, and a state where the switches SA1 to SAn are off and the switches SB1 to SBn are on is defined as a second state. In the first state, the output nodes of the amplifier circuits AM1, AM3, . . . , AMn-1, which are positive electrode amplifiers, are connected to the terminals TS1, TS3, . . . , TSn-1, and the output nodes of the amplifier circuits AM2, AM4, . . . , AMn, which are negative electrode amplifiers, are connected to the terminals TS2, TS4, . . . , TSn. In the second state, the output nodes of the amplifier circuits AM1, AM3, . . . , AMn-1, which are positive electrode amplifiers, are connected to the terminals TS2, TS4, . . . , TSn, and the output nodes of the amplifier circuits AM2, AM4, . . . . , AMn, which are negative electrode amplifiers, are connected to the terminals TS1, TS3, . . . , TSn-1. As a result of the control circuit 361 alternately switching the first state and the second state, polarity inversion driving is performed.
The error detection circuit 311 includes switches SE1 to SEn, a D/A conversion circuit DAC1, a comparator CP1, and a level shifter LS1.
The switches SE1 to SEn are each constituted by a transistor, for example. When the switch SE1 is on, the switches SE2 to SEn are off. At this time, the comparator CP1 compares a voltage in the terminal TS1 that is input via the switch SE1 with an output voltage of the D/A conversion circuit DAC1. The level shifter LS1 level-shifts the output signal level of the comparator CP1 to the signal level of the control circuit 361, which is a logic circuit, and outputs the level-shifted signal to the control circuit 361. The D/A conversion circuit DAC1 outputs a voltage for determining whether or not the voltage in the terminal TS1 is normal. As a result of this output voltage of the D/A conversion circuit DAC1 being compared with the voltage in the terminal TS1 by the comparator CP1, a determination is made as to whether or not the voltage in the terminal TS1 is normal. If it is determined that the voltage in the terminal TS1 is abnormal, the control circuit 361 determines that the data line SL1 connected to the terminal TS1 is an abnormal display line.
Similarly, when the switch SE2 is on, the switches SE1, SE3 to SEn are off. The control circuit 361 determines, based on a detection result of the error detection circuit 311, whether or not the data line SL2 is an abnormal display line. From this point on, the switches SE3 to SEn are sequentially switched on one by one, and the control circuit 361 determines, based on a detection result of the error detection circuit 311, whether or not the data lines SL3 to SLn are abnormal display lines. The control circuit 361 outputs abnormal display line detection information to the display controller 100 via the interface circuit 371, based on the detection result of abnormal display lines.
The interface circuit 372 receives, from the display controller 100, a timing control signal for controlling scanning line selection. The control circuit 362 outputs a gate drive signal to the drive circuit 322 based on the timing control signal received by the interface circuit 372. The drive circuit 322 amplifies the gate drive signal from the control circuit 362, and outputs the amplified gate drive signal to the terminals TG1 to TGm.
The drive circuit 322 includes gate drivers GD1 to GDm. The gate drivers GD1 to GDm amplify a gate drive signal from the control circuit 362, and output the amplified gate drive signal to the terminals TG1 to TGm.
The error detection circuit 312 includes switches SF1 to SFm, a D/A conversion circuit DAC2, a comparator CP2, and a level shifter LS2.
The switches SF1 to SFm are each constituted by a transistor, for example. When the switch SF1 is on, the switches SF2 to SFm are off. At this time, the comparator CP2 compares a voltage in the terminal TG1 that is input via the switch SF1 with an output voltage of the D/A conversion circuit DAC2. The level shifter LS2 level-shifts the output signal level of the comparator CP2 to the signal level of the control circuit 362, which is a logic circuit, and outputs the level-shifted signal to the control circuit 362. The D/A conversion circuit DAC2 outputs a voltage for determining whether or not a voltage in the terminal TG1 is normal. As a result of this output voltage of the D/A conversion circuit DAC2 being compared with the voltage in the terminal TG1 by the comparator CP2, a determination is made as to whether or not the voltage in the terminal TG1 is normal. If it is determined that the voltage in the terminal TG1 is abnormal, the control circuit 362 determines that the scanning line GL1 connected to the terminal TG1 is an abnormal display line.
Similarly, when the switch SF2 is on, the switches SF1, SF3 to SFm are off. The control circuit 362 determines whether or not the scanning line GL2 is an abnormal display line based on a detection result of the error detection circuit 312. From this point on, the switches SF3 to SFm are sequentially switched on one by one, and the control circuit 362 determines, based on a detection result of the error detection circuit 312, whether or not the scanning lines GL3 to GLm are abnormal display lines. The control circuit 362 outputs abnormal display line detection information to the display controller 100 via the interface circuit 372, based on the detection result of abnormal display line.
An electronic apparatus 600 includes the processing device 200, the display controller 100, the display driver 300, the electro-optical panel 460, a storage unit 320, an operation unit 330, and a communication unit 340. Note that the storage unit 320 is a storage device or a memory. The operation unit 330 is an operation device. The communication unit 340 is a communication device.
The operation unit 330 is a user interface that receives various operations from the user. The operation unit 330 may be composed of, for example, buttons, a mouse, a keyboard, and a touch panel attached to the electro-optical panel 460. The communication unit 340 is a data interface that communicates image data and control data. The communication unit 340 is, for example, a wired communication interface such as a USB or a wireless communication interface such as a wireless LAN. The storage unit 320 stores image data that has been input from the communication unit 340. Alternatively, the storage unit 320 functions as a working memory of the processing device 200. The processing device 200 performs control processing of the units of the electronic apparatus and various types of data processing. The display controller 100 performs control processing of the display driver 300. For example, the display controller 100 converts image data transferred from the communication unit 340 or the storage unit 320 via the processing device 200, into a format that can be accepted in the display driver 300, and outputs the converted image data to the display driver 300. The display driver 300 drives the electro-optical panel 460 based on the image data transferred from the display controller 100.
According to the above embodiments, a display controller includes an interface circuit that receives abnormal display line detection information from a display driver that drives an electro-optical panel having a display line for image display, and a processing circuit that controls the display driver. The processing circuit determines an abnormal display area based on the abnormal display line detection information. If a specific display pattern is displayed in the abnormal display area, the processing circuit outputs, via the interface circuit, image data for displaying the specific display pattern in a destination display area that is a display area different from the abnormal display area.
With such a configuration, when a specific display pattern is displayed in an abnormal display area, the specific display pattern is displayed in a destination display area. Specifically, if a portion of a display area that is driven by the display driver is an abnormal display area, a specific display pattern that is displayed in the abnormal display area can be moved to a destination display area. Accordingly, a normal display area can be used while maintaining the normal display area as much as possible.
In addition, in this embodiment, the processing circuit may determine the number of abnormal display lines based on the abnormal display line detection information, and determine whether or not to display the specific display pattern in the destination display area, based on a determination result regarding the number of abnormal display lines.
With such a configuration, whether or not to display the specific display pattern in the destination display area can be determined based on the number of abnormal display lines detected by the display driver. By using the number of abnormal display lines for the determination, a determination can be made as to whether or not a portion of a display area that is driven by the display driver, instead of the entire display area, is an abnormal display area.
In addition, in this embodiment, the processing circuit may determine whether or not to display the specific display pattern in the destination display area, based on the number of abnormal display lines in the specific display pattern and the number of abnormal display lines in the destination display area.
By using the number of abnormal display lines in the specific display pattern, a determination can be made as to whether or not the specific display pattern is displayed in the abnormal display area. If the specific display pattern is displayed in the abnormal display area, a determination can be made to display the specific display pattern in the destination display area. In addition, by using the number of abnormal display lines in the destination display area, a determination can be made as to whether or not the destination display area overlaps the abnormal display area. A determination can be made as to whether or not to display the specific display pattern in the destination display area, based on the determination result.
In addition, in this embodiment, the display controller may include a storage unit that stores a first threshold value for determining the abnormal display area. The processing circuit may compare the number of abnormal display lines in the specific display pattern with the first threshold value, and determine whether or not to display the specific display pattern in the destination display area, based on a result of the comparison.
With such a configuration, if the number of abnormal display lines in the specific display pattern is larger than the first threshold value, it can be determined that the specific display pattern is displayed in the abnormal display area. Accordingly, if the number of abnormal display lines in the specific display pattern is larger than the first threshold value, a determination can be made to display the specific display pattern in the destination display area.
In addition, in this embodiment, the storage unit may store a second threshold value for determining whether or not to enable display in the destination display area. If the number of abnormal display lines in the specific display pattern is larger than the first threshold value, the processing circuit may compare the number of abnormal display lines in the destination display area with the second threshold value. If the number of abnormal display lines in the destination display area is smaller than the second threshold value, the processing circuit may determine to display the specific display pattern in the destination display area.
With such a configuration, if the number of abnormal display lines in the destination display area is larger than the second threshold value, it can be determined that the destination display area overlaps the abnormal display area. Accordingly, if the number of abnormal display lines in the destination display area is smaller than or equal to the second threshold value, a determination can be made to display the specific display pattern in the destination display area.
In addition, in this embodiment, the processing circuit may determine whether or not to display the specific display pattern in the destination display area, based on the number of abnormal display lines in a specific area that is a portion of the specific display pattern.
With such a configuration, whether or not to display the specific display pattern in the destination display area can be determined based on the number of abnormal display lines in a portion of the specific display pattern, not the entire specific display pattern. For example, if a portion that is important to visually recognizing the specific display pattern overlaps an abnormal display line, the specific display pattern can be displayed in the destination display area.
In addition, in this embodiment, the specific display pattern may include a first specific display pattern for which a first degree of importance is set and a second specific display pattern for which a second degree of importance that is lower than the first degree of importance is set. The display controller may include a storage unit that stores degree-of-importance information that indicates the first degree of importance and the second degree of importance. When the first specific display pattern is displayed in the abnormal display area, the processing circuit may determine whether or not to move the first specific display pattern to the destination display area, based on the first threshold value set according to the first degree of importance. When the second specific display pattern is displayed in the abnormal display area, the processing circuit may determine whether or not to move the second specific display pattern to the destination display area, based on the second threshold set according to the second degree of importance.
With such a configuration, a determination as to whether or not to move the specific display pattern to the destination display area can be made according to the degree of importance of the display pattern. Specifically, a threshold value is set according to the degree of importance, and, by comparing the threshold value with the number of abnormal display lines, a determination can be made as to whether or not to move the specific display pattern to the destination display area. For example, the first threshold value that is set according to the first degree of importance is set to a value larger than the second threshold value that is set according to the second degree of importance. Accordingly, the first specific display pattern with a higher degree of importance is more likely to be determined to be moved to the destination display area than the second specific display pattern.
In addition, in this embodiment, the processing circuit may output, via the interface circuit, image data for displaying an area that includes the abnormal display area, in white, black, or a specific color.
With such a configuration, the area that includes the abnormal display area can be displayed in white, black, or a specific color. In addition, when the specific display pattern is displayed in the abnormal display area, it is possible to move the specific display pattern to the destination display area, and display the area that includes the abnormal display area, in white, black, or a specific color.
In addition, in this embodiment, the abnormal display line detection information may be detection information regarding an abnormal data line or an abnormal scanning line in the electro-optical panel.
With such a configuration, the number of abnormal data lines is determined based on the abnormal display line detection information, and whether or not to display the specific display pattern in the destination display area can be determined based on the determination result regarding the number of abnormal data lines. Alternatively, the number of abnormal scanning lines is determined based on the abnormal display line detection information, and whether or not to display the specific display pattern in the destination display area can be determined based on the determination result regarding the number of abnormal scanning lines.
In addition, in this embodiment, the processing circuit may output the image data for displaying the specific display pattern in the destination display area, to the display driver via the interface circuit.
In this case, the specific display pattern and the destination display area are in a display area that is driven by the same display driver. Then, if the specific display pattern is displayed in the abnormal display area, the processing circuit outputs the image data for displaying the specific display pattern in the destination display area, to the display driver via the interface circuit.
In addition, in this embodiment, the processing circuit may control a second display driver that drives the electro-optical panel. The processing circuit may output the image data for displaying the specific display pattern in the destination display area, to the second display driver via the interface circuit.
In this case, one electro-optical panel is driven by the display driver and the second display driver. The specific display pattern is in a display area that is driven by the display driver, and the destination display area is in a display area that is driven by the second display driver. Then, if the specific display pattern is displayed in the abnormal display area, the processing circuit outputs the image data for displaying the specific display pattern in the destination display area, to the second display driver via the interface circuit.
In addition, in this embodiment, the processing circuit may control a second display driver that drives a second electro-optical panel. The processing circuit may output the image data for displaying the specific display pattern in the destination display area, to the second display driver via the interface circuit.
In this case, a first electro-optical panel is driven by the display driver, and the second electro-optical panel is driven by the second display driver. The specific display pattern is in the display area of the first electro-optical panel, and the destination display area is in the display area of the second electro-optical panel. Then, if the specific display pattern is displayed in the abnormal display area, the processing circuit outputs the image data for displaying the specific display pattern in the destination display area, to the second display driver via the interface circuit.
In addition, in this embodiment, a display control system includes the above-described display controller and display driver.
In addition, in this embodiment, an electro-optical device includes the above-described display controller, electro-optical panel, and display driver.
In addition, in this embodiment, an electronic apparatus includes the above-described display controller.
In addition, in this embodiment, a mobile unit includes the above-described display controller.
The embodiments according to the disclosure have been described in detail above, but those skilled in the art will readily understand that various modifications can be made from new matter and effects of the disclosure without departing from the gist of the disclosures. Accordingly, all of such modifications are also encompassed in the scope of the disclosure. For example, a term described together with a different term having a broader meaning or the same meaning at least once in the specification or drawings may be replaced by the different term anywhere in the specification or drawings. Also, all combinations of the embodiments and variations of the disclosure are also encompassed in the scope of the disclosure. In addition, the configurations and operations of the display controller, the electro-optical panel, the display control system, the electro-optical device, the display system, the electronic apparatus, and the mobile unit are not limited to those described in the embodiments of the disclosure, and various modifications can be made thereto.
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