Patent Grant
11462144
The following disclosure relates to a display device and a driving method for the display device, and more specifically to a display device including pixel circuits including display elements driven by a current, such as organic EL elements, and a driving method for the display device.
In recent years, an organic EL display device including pixel circuits including organic EL elements has been put to practical use. The organic EL elements are also called organic light-emitting diodes (OLEDs), and are self-emissive display elements that emit light at luminance depending on a current flowing therethrough. As such, since the organic EL elements are self-emissive display elements, the organic EL display device can easily achieve slimming down, a reduction in power consumption, an increase in luminance, etc., over a liquid crystal display device that requires a backlight a color filter, and the like.
As drive systems for the organic EL display device, there are known a passive matrix system (also called a simple matrix system) and an active matrix system. An organic EL display device that adopts the passive matrix system has a simple structure, but has difficulty in increasing size and resolution. On the other hand, an organic EL display device that adopts the active matrix system (hereinafter, referred to as “active matrix-type organic EL display device”) can easily achieve an increase in size and resolution over the organic EL display device that adopts the passive matrix system.
In the active matrix-type organic EL display device, a plurality of pixel circuits are formed in matrix form. The pixel circuits of the active matrix-type organic EL display device each typically include an input transistor that selects a pixel; and a drive transistor that controls supply of a current to an organic EL element. Note that in the following, a current flowing through the organic EL element from the drive transistor may be referred to as “drive current”.
Meanwhile, the organic EL display device typically adopts a thin-film transistor (TFT) as the drive transistor. However, a threshold voltage of the thin-film transistor changes due to degradation. Multiple drive transistors are provided in a display unit, and the degree of degradation varies between drive transistors, and thus, variations occur in threshold voltage. As a result, variations in luminance occur, degrading display quality. Hence, a process for compensating for degradation of the drive transistors is conventionally performed.
As one scheme for the compensation process, an external compensation scheme is known. According to the external compensation scheme, the magnitude of a current flowing through a drive transistor under a predetermined condition is measured by a circuit provided outside a pixel circuit. Then, based on a result of the measurement, a video signal is corrected. By this, degradation of the drive transistor is compensated for. Note that in the following, a series of processes for measuring a value of a current flowing through a circuit element such as a drive transistor under a predetermined condition to detect characteristics of the circuit element are referred to as “characteristics detection monitoring”. An invention related to an organic EL display device that adopts an external compensation scheme such as that described above is disclosed in, for example, WO 2014/112299 A.
[Patent Document 1] WO 2014/112299 A
According to the above-described external compensation scheme, a degradation level of a drive transistor is determined based on a current value obtained when a predetermined voltage (monitoring voltage) is applied to a gate terminal of the drive transistor. However, unless the value of the monitoring voltage is an appropriate value, the degradation level cannot be accurately determined (an error between an estimated degradation level and an actual degradation level increases). In this regard, if information on an average degradation level on the entire screen (the entire display unit) has been obtained in advance upon performing characteristics detection monitoring, then the monitoring voltage can be adjusted based on the information. However, to implement this, prior to the characteristics detection monitoring which is original monitoring, there a need to perform monitoring for determining an average degradation level of the drive transistors on the entire screen (here, a series of processes related to measurement of current values are called “monitoring”). That is, monitoring for one screen is repeated twice. It requires, in general, several tens of seconds to several minutes to perform monitoring for one screen (because measurement of current values is performed row by row) and normal image display cannot be performed during the monitoring, and thus, it is not desirable to repeat monitoring twice. In addition, if the characteristics detection monitoring is frequently performed despite the fact that degradation of the drive transistors progresses slightly, then a process for compensating for degradation is inefficient.
Hence, an object of the following disclosure is to implement a display device that can more of efficiently compensate for degradation of drive transistors by promptly determining an average degradation level of the drive transistors on the entire screen.
A display device according to some embodiments of the present disclosure is a display device including a plurality of data lines; a plurality of scanning lines; a plurality of pixel circuits provided at respective intersections of the plurality of data lines and the plurality of scanning lines, each pixel circuit including a display element driven by a current and a drive transistor configured to control a drive current of the display element; a data line drive circuit configured to apply data voltages to the plurality of data lines; a scanning line drive circuit configured to drive the plurality of scanning lines; a first power supply voltage member configured to supply a first power supply voltage to the plurality of pixel circuits; and a second power supply voltage member configured to supply a second power supply voltage to the plurality of pixel the display device having a function of performing a characteristics detection process that detects characteristics of the drive transistor, wherein
According to several embodiments of the present disclosure, the display device is provided with the total current measuring circuit that measures a total current (total drive current) flowing through the entire screen or two or more pixel circuits when a specific image is displayed. Hence, an average degradation level of drive transistors can be promptly determined. Then, the determining unit determines whether to perform a characteristics detection process (a process of detecting characteristics of the drive transistors), based on the average degradation level of the drive transistors. By this, it becomes possible to perform, only when degradation has progressed, a characteristics detection process. As a result, a characteristics detection process is suppressed from being performed more often than necessary, and degradation of the drive transistors is efficiently compensated for. As described above, a display device is implemented that can more efficiently compensate for degradation of drive transistors by promptly determining an average degradation level of the drive transistors.
Embodiments will be described below with reference to the accompanying drawings. Note that in this specification, a voltage supplied to the pixel circuit upon the characteristics detection monitoring or average degradation level detection monitoring which will be described later out of data voltages supplied to a pixel circuit through a data line may be referred to as “monitoring voltage”. Note also that in the following, it is assumed that m and n are integers greater than or equal to 2, i is an integer between 1 and n, inclusive, and j is an integer between 1 and m, inclusive.
<1.1 Overall Configuration and Summary
In organic EL display devices according to the present embodiment and second to fifth embodiments which will be described later, in order to determine an average degradation level of drive transistors on the entire screen (the entire display unit 40), currents are measured with a specific image displayed on the display unit 40 (in other words, with a data voltage corresponding to the specific image supplied to all drive transistors in a shared manner). At this time, drive currents flowing through the entire screen or two or more pixel circuits by displaying the specific image on the display unit 40 are allowed to collectively flow through a single trunk wiring line, and the currents flowing through the trunk wiring line are measured as a total current. The total current measuring circuit 50 measures the total current, and a determination as to whether to perform the above-described characteristics detection monitoring is made based on total current data DI which is a result of the measurement. Note that in the following, the specific image displayed on the display unit 40 upon measuring the total current in order to determine an average degradation level of the drive transistors on the entire screen is referred to as “total current measurement image”. Note also that a series of processes in which the total current is measured with the total current measurement image displayed are referred to as “average degradation level detection monitoring”.
In the present embodiment, during operation of the organic EL, display device, there are appeared a period during which it is determined whether to perform characteristics detection monitoring (characteristics detection process) (hereinafter, referred to as “determination period”), a period during which the characteristics detection monitoring is performed (hereinafter, referred to as “characteristics detection period”), and a period during which normal image display is performed (hereinafter, referred to as “display period”). Specifically, the determination period Pm1 appears at appropriate timing as shown in
Regarding
In the present embodiment, a first power supply voltage is implemented by the high power supply voltage ELVDD, a second power supply voltage is implemented by the low power supply voltage ELVSS, a first power supply voltage member is implemented by the high power supply voltage branch wiring lines 71(1) to 71(m), and a second power supply voltage member is implemented by the common electrode 420. Note that, although an organic EL element 411 is formed in order of an anode terminal, a light-emitting layer, and a cathode terminal (common electrode) from a substrate side in the present embodiment, the configuration is not limited thereto. The organic EL element 411 may be formed in order of a cathode terminal, a light-emitting layer, and an anode terminal (common electrode) from the substrate side. In this case, a first power supply voltage is implemented by the low power supply voltage ELVSS, a second power supply voltage is implemented by the high power supply voltage ELVDD, a first power supply voltage member is implemented by low power supply voltage branch wiring lines, and a second power supply voltage member is implemented by the common electrode.
Note that in the following, when the m data lines S(1) to S(m) do not need to be distinguished from each other, the data lines are simply given reference character S. Likewise, when the n scanning lines G1(1) to G1(n) do not need to be distinguished from each other, the scanning lines are simply given reference character G1.
The data line S in the present embodiment is not only used as a signal line that transmits a luminance signal (video signal) for allowing the organic EL element in the pixel circuit 410 to emit light at desired luminance, but is also used as a signal line for supplying a monitoring voltage to the pixel circuit 410 upon the characteristics detection monitoring or the average degradation level detection monitoring and as a signal line serving as a path for a current that is measured by a current monitoring unit 320 which will be described later upon the characteristics detection monitoring.
Operation of each component shown in
During the determination period, the display control circuit 10 controls operation of the source driver 30 by supplying a digital video signal (a video signal corresponding to a data voltage corresponding to the total current measurement image) VDa and source control signals SCTL to the source driver 30 and controls operation of the gate driver 20 by supplying gate control signals GCTL to the gate driver 20 so that the total current measurement image is displayed on the display unit 40. In addition, during the determination period, the determining unit 120 in the display control circuit 10 determines whether to perform the characteristics detection monitoring, based on the total current data DI outputted from the total current measuring circuit 50. The determination data storage unit 110 holds determination data used to determine whether to perform the characteristics detection monitoring, and the determination data is referred to by the determining unit 120. Note that in the present embodiment, the determination data storage unit 110 holds a predetermined voltage value as the determination data.
During the characteristics detection period, the display control circuit 10 controls operation of the source driver 30 by supplying a digital video signal (a video signal corresponding to a monitoring voltage for characteristics detection) VDa and source control signals SCTL to the source driver 30 and controls operation of the gate driver 20 by supplying gate control signals GCTL to the gate driver 20 so that the characteristics detection monitoring is performed. In addition, during the characteristics detection period, the display control circuit 10 receives monitoring data MO outputted from the source driver 30. The monitoring data MO is stored in the measured current storage unit 130. Note that the monitoring data MO is data of current values measured by the characteristics detection monitoring.
During the display period, the compensation computing unit 140 in the display control circuit 10 receives input video signals (image data sent from an external source) VDb, and performs a compensation computation process on the input video signals VDb depending on the monitoring data (data of the current values) MO held in the measured current storage unit 130, and thereby generates digital video signals VDa to be supplied to the source driver 30. Then, during the display period, the display control circuit 10 controls operation of the source driver 30 by supplying the digital video signals (the video signals having been subjected to the compensation computation process) VDa and source control signals SCTL to the source driver 30 and controls operation of the gate driver 20 by supplying gate control signals GCTL to the gate driver 20 so that normal image display is performed.
Note that the source control signals SCTL include a source start pulse signal, a source clock signal, a latch strobe signal, etc. In addition, the gate control signals GCTL include a gate start pulse signal, a gate clock signal, an output enable signal, etc.
The gate driver 20 is connected to the n scanning lines G1(1) to G1(n) and the n monitoring control lines G2(1) to G2(n). The gate driver 20 is composed of a shift register, a logic circuit, and the like. The gate driver 20 drives the n scanning lines G1(1) to G1(n) and the n monitoring control lines G2(1) to G2(n), based on the gate control signals GCTL outputted from the display control circuit 10.
The source driver 30 is connected to the m data lines S(1) to S(m). The source driver 30 selectively performs operation of driving the data lines S(1) to S(m) and operation of measuring currents flowing through the data lines S(1) to S(m). That is, as shown in
By driving the n scanning lines G1(1) to G1(n), the n monitoring control tines G2(1) to G2(n), and the m data lines S(1) to S(m) in the above-described manner, an image based on the input video signals VDb is displayed on the display unit 40. Upon the display, a compensation computation process is performed on the input video signals VDb based on the monitoring data MO, by which degradation of drive transistors or organic EL elements is compensated for. In addition, a characteristics detection period is provided only when it is determined, during the determination period which appears at appropriate timing, to perform the characteristics detection monitoring, and thus, a process of compensating for degradation is an efficient process.
<1.2 Pixel Circuits and Source Driver>
Next, the pixel circuits 410 and the source driver 30 will be described in detail. The source driver 30 performs the following operation when functioning as the data 1 line driving unit 310. The source driver 30 receives the source control signals SCTL outputted from the display control circuit 10 and applies, as data voltages, video signal voltages generated based on target luminance to the m data lines S(1) to S(m) respectively. At this time, regarding a pulse of the source start pulse signal as a trigger, at timing at which a pulse of the source clock signal is generated, the source driver 30 sequentially holds a digital video signal VDa indicating a voltage to be applied to each data line S. Then, the held digital video signals VDa are converted into analog voltages at timing at which a pulse of the latch strobe signal is generated. The converted analog voltages are simultaneously applied as data voltages to all data lines S(1) to S(m). When the source driver 30 functions as the current monitoring unit 320, the source driver 30 applies the monitoring voltage to the data lines S(1) to S(m), and converts currents flowing through the data lines S(1) to S(m) due to this into voltages. Data obtained after the conversion is outputted as the monitoring data MO from the source driver 30.
The input transistor T1 is provided between the data line S(j) and a gate terminal of the drive transistor T2. The input transistor T is connected at its gate terminal to a scanning line G1(i) and connected at its source terminal to the data line S(j). The drive transistor T2 is provided in series with the organic EL element 411. The drive transistor T2 is connected at its gate terminal to a drain terminal of the input transistor T1, connected at its drain terminal to a high power supply voltage branch wiring line 71(j) to which a high power supply voltage ELVDD is supplied, and connected at its source terminal to an anode terminal of the organic EL element 411. The monitoring control transistor T3 is connected at its gate terminal to a monitoring control line G2(i), connected at its drain terminal to the anode terminal of the organic EL element 411, and connected at its source terminal to the data line S(j). The capacitor Cst is connected at its one end to the gate terminal of the drive transistor T2 and connected at its other end to the drain terminal of the drive transistor T2. A cathode terminal of the organic EL element 411 is connected to the common electrode 420 to which a low power supply voltage ELVSS is supplied. Note that for the transistors T1 to T3 in the pixel circuit 410, an oxide TFT (a thin-film transistor using an oxide semiconductor as a channel layer), an amorphous silicon TFT, etc., can be adopted. The oxide TFT is, for example, a TFT containing indium gallium zinc oxide (InGaZnO). By adopting oxide TFTs, it becomes possible to achieve, for example, an increase in resolution and a reduction in power consumption.
As shown in
A digital video signal is supplied to an input terminal of the DA converter 31. The DA converter 31 converts the digital video signal VDa into an analog voltage. The analog voltage is a video signal voltage or a monitoring voltage. An output terminal of the DA converter 31 is connected to a non-inverting input terminal of the operational amplifier 32. Thus, the video signal voltage or the monitoring voltage is supplied to the non-inverting input terminal of the operational amplifier 32. An inverting input terminal of the operational amplifier 32 is connected to the data line S(j). The switch 34 is provided between the inverting input terminal and output terminal of the operational amplifier 32. The capacitor 33 is provided in parallel to the switch 34 and between the inverting input terminal and output terminal of the operational amplifier 32. An input and output control signal DWT included in the source control signals SCTL, is supplied to a control terminal of the switch 34. The output terminal of the operational amplifier 32 is connected to an input terminal of the AD converter 35.
In a configuration such as that described above, when the input and output control signal DWT is at a high level, the switch 34 is in an on state, and a state between the inverting input terminal and output terminal of the operational amplifier 32 is in a short-circuited state. At this time, the operational amplifier 32 functions as a buffer amplifier. By this, a voltage (a video signal voltage or a monitoring voltage) supplied to the non-inverting input terminal of the operational amplifier 32 is applied to the data lines S(j). When the input and output control signal DWT is at a low level, the switch 34 is in an off state, and the inverting input terminal and output terminal of the operational amplifier 32 are connected to each other through the capacitor 33. At this time, the operational amplifier 32 and the capacitor 33 function as an integrator circuit. By this, an output voltage from the operational amplifier 32 is a voltage depending on a current flowing through the data line S(j.) The AD converter 35 converts the output voltage from the operational amplifier 32 into a digital value. Data obtained after the conversion is sent as the monitoring data MO to the display control circuit 10.
Note that although a signal line for supplying a data voltage (a video signal voltage or a monitoring voltage) and a signal line for measuring a current are shared in the present embodiment, it is not limited thereto. A configuration can also be adopted in which a signal line for supplying a data voltage and a signal line for measuring a current are provided independently of each other. In addition, as for the configuration of the pixel circuit 410, too, other configurations than the configuration shown in
<1.3 Processes During a Characteristics Detection Period>
Next, processes performed during the characteristics detection period will be described. During the characteristics detection period, the characteristics detection monitoring is performed. Note that in the following, characteristics of the drive transistor T2 is referred to as “TFT characteristics”, and characteristics or the organic EL element 411 is referred to as “OLED characteristics”. Note also that a row that is a target for the characteristics detection monitoring is referred to as “monitoring row”.
During the detection preparation period Ta, the scanning line G1(i) is brought into an active state, and the monitoring control line G2(i) is maintained in a non-active state. By this, the input transistor goes into an on state, and the monitoring control transistor T3 is maintained in an off State. In addition, during the detection preparation period Ta, a monitoring voltage Vmg(i, j) is applied to the data line S(j). Note that the monitoring voltage Vmg(i, j) does not indicate a fixed voltage, and the magnitude of the monitoring voltage Vmg(i, j) differs between when TFT characteristics are detected and when OLED characteristics are detected. That is, the monitoring voltage used here is a concept including both a monitoring voltage for detecting TFT characteristics (hereinafter, referred to as “TFT characteristics measurement voltage”) and a monitoring voltage for detecting OLED characteristics (hereinafter, referred to as “OLED characteristics measurement voltage”). When the monitoring voltage Vmg(i, j) is the TFT characteristics measurement voltage, the drive transistor T2 is in an on state. When the monitoring voltage Vmg(i, j) is the OLED characteristics measurement voltage, the drive transistor T2 is maintained in an off state.
Meanwhile, the TFT characteristics measurement voltage applied to the data line S(j) during the detection preparation period Ta is set so as to satisfy “TFT characteristics measurement voltage<the threshold voltage of the organic EL element 411+the threshold voltage of the drive transistor or T2”. This setting enables measurement of only characteristics of the drive transistor T2 with no current flowing through the organic EL element 411 during the current measurement period Tb. In addition, the OLED characteristics measurement voltage applied to the data line S(j) during the detection preparation period Ta is set so as to satisfy “OLED characteristics measurement voltage<the threshold voltage of the organic EL element 411 +the threshold voltage of the drive transistor T2”. This setting enables measurement of only characteristics of the organic EL element 411 without the drive transistor T2 going into an on state during the current measurement period Tb.
During the current measurement period Tb, the scanning line G1(i) is brought into a non-active state and the monitoring control line G2(i) is brought into an active state. By this, the input transistor T1 goes into an off state and the monitoring control transistor T3 goes into an on state. Here, when the monitoring voltage Vmg(i, j) is the TFT characteristics measurement voltage, as described above, the drive transistor T2 goes into an on state and a current does not flow through the organic EL element 411. Thus, as indicated by an arrow indicated by reference character 7 in
During the video signal voltage writing period Tc, the scanning line G1(i) is brought into an active state and the monitoring control line G2(i) is brought into a non-active state. By this, the input transistor T1 goes into an on state and the monitoring control transistor T3 goes into an of state. In addition, during the video signal voltage writing period Tc, a data voltage depending on target luminance is applied to the data line S(j). By this, the drive transistor T2 goes into an on state. As a result, as indicated by an arrow indicated by reference character 9 in
<1.4 Processes During a Determination Period>
Next, processes performed during the determination period will be described. During the determination period, the average degradation level detection monitoring including a total current measurement process by the total current measuring circuit 50 is performed, and a determination as to whether to perform the above-described characteristics detection monitoring is made based on a result of the monitoring.
During the determination period, in order for the total current measuring circuit 50 to measure the total current, first, in a state where a data voltage (monitoring voltage) corresponding to the total current measurement image is applied to the data lines S(1) to S(m), the scanning lines G1 are sequentially brought into an active state one by one as shown in
During a total current measurement period shown in
Note that in the present embodiment, two images are prepared as total current measurement images. That is, the total current is measured based on monitoring voltages at two levels. Thus, total current data DI obtained during a single determination period includes data of two total currents (a first total current and a second total current). Note that a first data voltage and a second data voltage are implemented by the above-described monitoring voltages at two levels.
After completion of the total current measurement, the determining unit 120 determines whether to perform the characteristics detection monitoring. Upon the determination, an average threshold voltage of the drive transistors T2 in the display unit 40 is determined based on the first total current and the second total current. Note that the value of the average threshold voltage used here is not a precise value (an actual average value of the threshold voltages of the drive transistors T2 in the display unit 40) but is an estimated value. Now, how to determine the average threshold voltage of the drive transistors T2 will be described with reference to
Regarding
Hence, finally, a difference between the average threshold voltage of the drive transistors T2 obtained when the characteristics detection monitoring is performed last time and the average threshold voltage of the drive transistors T2 obtained at the most recent measurement is determined. Then, when the difference is greater than a predetermined value (e.g., 0.2 V) (this value is held in the determination data storage unit 110), it i determined to perform the characteristics detection monitoring.
As described above, in the present embodiment, the total current measuring circuit 50 measures the first total current which is the total current obtained in a state where the first data voltage is written into all pixel circuits 410, and the second total current which is the total current obtained in a state where the second data voltage is written into all pixel circuits 410. Then, after completion of the total current measurement by the total current measuring circuit 50, the determining unit 120 determines the average threshold voltage of the drive transistors T2 included in all pixel circuits 410 based on the first total current and the second total current, and determines to perform the characteristics detection monitoring when a difference between the average threshold voltage (i.e., an average threshold voltage determined most recently) and the average threshold voltage determined when the characteristics detection monitoring is performed last time is greater than a voltage value as determination data.
<1.5 Effects>
According to the present embodiment, the organic EL display device is provided with the total current measuring circuit 50 that measures the total current flowing through the entire screen (the entire display unit 40) when a specific image (the total current measurement image) is displayed. By such a configuration, an average degradation level of the drive transistors T2 on the entire screen can be promptly determined. Then, the determining unit 120 determines whether to perform the characteristics detection monitoring, based on the average degradation level of the drive transistors T2 on the entire screen. As a result, if degradation has progressed, then the characteristics detection monitoring is performed, but if degradation has not progressed, then the characteristics detection monitoring is not performed. Thus, the characteristics detection monitoring is not performed more often than necessary, and degradation of the drive transistors T2 is efficiently compensated for. As described above, according to the present embodiment, an organic EL display device is implemented that can more efficiently compensate for degradation of drive transistors T2 by promptly determining an average degradation level of the drive transistors T2 on the entire screen.
<1.6 Variant>
In the above-described first embodiment, the total current measuring circuit 50 measures, as the total current, currents flowing through the high power supply voltage trunk wiring line 70 when a specific image (the total current measurement image) is displayed. However, the configuration is not limited thereto. The total current measuring circuit 50 may measure, as the total current, currents flow through the low power supply voltage trunk wiring line 75 when a specific image (the total current measurement image) is displayed. In this case, the total current measuring circuit 50 is provided between the low voltage drive power supply 62 and the common electrode 420.
A second embodiment will be described. Note that the following mainly describes only differences from the first embodiment.
<2.1 Configuration>
Note that although here an example in which one pixel is formed of subpixels of three colors is described, the configuration according to the present embodiment can also be adopted for a case in which one pixel is formed of subpixels of four or more colors. That is, the configuration according to the present embodiment can be adopted, in a case in which N is an integer greater than or equal to 3, when one pixel is formed of subpixels of N colors (in other words, when one pixel is formed of N pixel circuits 410 (=responding to the N colors)
<2.2 Effects>
In general, an organic EL element has different degradation characteristics for different colors. In this regard, according to the present embodiment, since the total current can be measured for each color, a monitoring voltage used upon the characteristics detection monitoring can be set for each color, taking into account a degradation characteristics for each color. By this, the degree of degradation of the drive transistors T2 or the organic EL elements 411 can be more accurately grasped, and degradation is more accurately compensated for.
<3.1 Summary>
In the first embodiment, the determination data storage unit 110 in the display control circuit 10 (see
In addition, in the first embodiment, two monitoring voltages are used for one average degradation level detection monitoring. Then, based on straight lines obtained from the values of two total currents (the first total current and the second total current) which are monitoring results, the average threshold voltage of the drive transistors T2 is determined. On the other hand, in the present embodiment only one monitoring voltage is used for one average degradation level detection monitoring.
Meanwhile, in a case in which IV characteristics of the drive transistors T2 are estimated using only one monitoring voltage, sufficient estimation accuracy cannot be obtained (estimation error increase). This will be described with reference to
Hence, in the present embodiment, when the value of the total current detected by the average degradation level detection monitoring is smaller than that obtained at a base time by a predetermined threshold or more, the value of the monitoring voltage is set to a value higher than the value having been set so far, and the above-described determination data is updated. Differences in the configuration of the present embodiment from the first embodiment will be specifically described below.
<3.2 Configuration>
As described above, in the present embodiment, the determination data storage unit 110 in the display control circuit 10 holds, as determination data, information on the correspondence between the total current and the degradation level (the degradation level of the drive transistors T2). The correspondence between the total current and the degradation level is schematically represented by a straight line given reference character 83 in
The determining unit 120 in the display control circuit 10 determines a degradation progress level ΔZ by referring to information on the correspondence between the total current and the degradation level, based on the value I(K) of the total current obtained by the average degradation level detection monitoring performed when the determination data is updated last time (at a base time) and the value I(L) of the total current obtained by the most recent average degradation level detection monitoring (see
Note that it is preferred that a threshold value to be compared with the degradation progress level ΔZ be a value corresponding to the amount of 1% to 5% drop in the value of the total current. In other words, it is preferred that the value of the monitoring voltage be set to a value higher than the value having been set so far, when the value of the total current has decreased by 1% to 5% compared to that obtained at a base time. In this regard, a reason that a value corresponding to 1% or more of the value of the total current is set as the threshold value is that when a detected degradation progress level ΔZ corresponds to less than 1% of the value of the total current, it is relatively likely that a detection result is within the error range. In addition, a reason that a value corresponding to 5% or less of the value of the total current is set as the threshold value is that if a value corresponding to 5% or more of the value of the total current is set as the threshold value, then the frequency of updates to determination data (information on the correspondence between the total current and the degradation level) decreases, by which the estimation accuracy of IV characteristics decreases,
<3.3 Effects>
By the above-described configuration, for example, when the degradation progress level ΔZ from the point in time A to the point in time B is greater than the above-described threshold, the value of the monitoring voltage is increased from Vmo(1) to Vmo(2) (see
As described above, according to the present embodiment, IV characteristics of the drive transistors T2 are accurately estimated. Then, based on the accurately estimated IV characteristics, determination data used to determine whether to perform the characteristics detection monitoring is updated. Hence, the characteristics detection monitoring is suppressed from being performed unnecessarily. Thus, degradation of the drive transistors T2 is more efficiently compensated for
<4.1 Configuration>
Note that although here an example in which one pixel is formed of subpixels of three colors described, the configuration according to the present embodiment can also be adopted for a case in which one pixel is formed of subpixels of four or more colors. That is, the configuration according to the present embodiment can be adopted, in a case in which N is an integer greater than or equal to 3, when one pixel is formed of subpixels of N colors (in other words, when one pixel is formed of N pixel circuits 410 corresponding to the N colors).
<4.2 Effects>
According to the present embodiment, the total current can be measured for each pixel including a plurality of subpixels and thus, a monitoring voltage used upon the characteristics detection monitoring can be set for each pixel, taking into account a pixel location in the entire display unit 40. By this, the degree of degradation of the drive transistors T2 or the organic EL elements 411 can be more accurately grasped, and degradation is more accurately compensated for.
<5.1 Configuration>
Depending on the application of an organic EL display device, a one-fifth region from an upper edge or a lower edge of the display unit 40 may be used as a dedicated region for displaying application software icons. Such a dedicated region tends to have high average luminance over other regions, and continuous display of a still screen tends to be performed in such a dedicated region. Hence, it is conceivable that the degradation level of drive transistors T2 is greater in the dedicated region than in other regions.
Hence, in an organic EL display device according to the present embodiment, total current measuring circuits 30 measure the total current flowing through the entire screen in a state where the total current measurement image is displayed the dedicated region while a black image is displayed in a region other than the dedicated region (see
Note that
<5.2 Effects>
According to the present embodiment, total current measurement by the total current measuring circuits 50 is performed in a state where the total current measurement image is displayed only in a one-fifth region (dedicated region) of the entire display unit 40. Hence, the time required to display the total current measurement image is reduced, enabling more prompt determination of an average degradation level of drive transistors T2, for determining whether to perform characteristics detection monitoring.
<6. Others>
Although each of the above-described embodiments (including the variant) describes an organic EL display device as an example, the configuration is not limited thereto. The disclosure can be applied to any display device as long as the display device includes display elements driven by a current (display elements whose luminance or transmittance is controlled by a current). The disclosure can also be applied to, for example, an inorganic EL display device including inorganic light-emitting diodes or a QLED display device including quantum dot light-emitting diodes (QLEDs).
10: DISPLAY CONTROL CIRCUIT
20: GATE DRIVER
30: SOURCE DRIVER
40: DISPLAY UNIT
50: TOTAL CURRENT MEASURING CIRCUIT
61: HIGH VOLTAGE DRIVE POWER SUPPLY
62: LOW VOLTAGE DRIVE POWER SUPPLY
70: HIGH POWER SUPPLY VOLTAGE TRUNK WIRING LINE
71(1) to 71(m): HIGH POWER SUPPLY VOLTAGE BRANCH WIRING LINE
75: LOW POWER SUPPLY VOLTAGE TRUNK WIRING LINE
110: DETERMINATION DATA STORAGE UNIT
120: DETERMINING UNIT
130: MEASURED CURRENT STORAGE UNIT
140: COMPENSATION COMPUTING UNIT
410: PIXEL CIRCUIT
411: ORGANIC EL ELEMENT
T2: DRIVE TRANSISTOR
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2018/036388 | 9/28/2018 | WO |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2020/065947 | 4/2/2020 | WO | A |
| Number | Name | Date | Kind |
|---|---|---|---|
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