The present invention relates to a display device, and in particular, to a display device employing hybrid structure formed of both a TFT using poly-Si and a TFT using an oxide semiconductor.
In a liquid crystal display device, a TFT substrate on which pixels each having pixel electrodes, a thin-film transistor (TFT), etc. are formed like a matrix and a counter substrate are arranged to face each other and a liquid crystal is sandwiched between the TFT substrate and the counter substrate. The liquid crystal display device forms an image by controlling the light transmittance of liquid crystal molecules in regard to each pixel. On the other hand, an organic electroluminescence (EL) display device forms a color image by use of a self-luminous organic EL layer and a TFT that are arranged in each pixel. The organic EL display device needs no backlight, and thus is advantageous for the thinning of the device.
Low temperature poly-Si (LTPS) has high carrier mobility and thus is suitable as a TFT for a drive circuit. In contrast, oxide semiconductors have high OFF resistance, and the OFF current of a TFT can be reduced by using an oxide semiconductor for the TFT.
JP-A-2013-175718 and JP-A-2011-54812 can be taken as examples of prior art literature having a description of a TFT using an oxide semiconductor. JP-A-2013-175718 describes a configuration in which metallic oxide is formed on an oxide semiconductor constituting the channel and is used as a gate insulation film. JP-A-2011-54812 describes the use of a metallic oxide layer or a semiconductor layer as a sacrificial layer for channel etching in a bottom-type TFT using an oxide semiconductor
The TFT used for the switching of a pixel is required to keep down its leak current. The use of an oxide semiconductor for the TFT can reduce the leak current. In the following description, a type of oxide semiconductor that is optically transparent and not crystalline will be referred to as TAOS (transparent amorphous oxide semiconductor). Examples of TAOS include indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), zinc oxide nitride (ZnON), indium gallium oxide (IGO), and so forth. However, TAOS has low carrier mobility, and thus there are cases where it is difficult to form a drive circuit to be installed in a display device with TFTs using TAOS. The term “TAOS” will hereinafter be used also in the meaning of a TFT using TAOS.
In contrast, a TFT formed with LTPS has high carrier mobility, and thus the drive circuit can be formed with TFTs using LTPS. The term “LTPS” will hereinafter be used also in the meaning of a TFT using LTPS. However, in cases where LTPS is used for a switching TFT in a pixel, two LTPSs are usually used in series connection since LTPS has high leak current.
Therefore, it is rational to use TAOS as the switching element of each pixel in the display region and LTPS as each TFT of a peripheral drive circuit. However, LTPS and TAOS have material characteristics different from each other and there is a problem in forming them on the same substrate. Specifically, in cases where a source electrode and a drain electrode are formed on LTPS, the LTPS has to be cleaned with hydrofluoric acid (HF) in order to remove surface oxide. However, it is impossible to use the same process for TAOS since TAOS is dissolved by hydrofluoric acid (HF).
The object of the present invention is to resolve the above-described problem and thereby make it possible to form a TFT made with LTPS and a TFT made with TAOS on the same substrate.
Examples of specific means of the present invention, overcoming the above-described problem, are as follows:
(1) A display device including a substrate having a display region in which pixels are formed. In the display device, the pixel includes a first TFT using an oxide semiconductor, an oxide film as an insulating material is formed on the oxide semiconductor, a gate electrode is formed on the oxide film, a first electrode is connected to a drain of the first TFT via a first through hole formed in the oxide film, and a second electrode is connected to a source of the first TFT via a second through hole formed in the oxide film,
(2) The display device according to (1), in which a wall of the through hole formed in the oxide film has a first taper θ1 on a side opposite to the oxide semiconductor and a second taper θ2<θ1 on the oxide semiconductor's side.
(3) The display device according to (1), wherein the oxide film is AlOx.
The contents of the present invention will be described in detail below by using some embodiments.
The TFT substrate 100 is formed to be larger than the counter substrate 200. A part of the TFT substrate 100 not paired with the counter substrate 200 is formed as a terminal unit 150, to which a flexible wiring board 160 for supplying signals and electric power from the outside to the liquid crystal display device is connected. The liquid crystal display panel 500 is not self-luminous, and thus a backlight 400 is arranged on the back of the liquid crystal display panel 500.
The liquid crystal display device can be divided into a display region 10 and a peripheral region 20 as shown in
The TFTs used for the pixels are required to keep down their leak current and thus it is rational to use TAOS for these TFTs, while the TFTs used for the peripheral drive circuit are required to have high carrier mobility and thus it is rational to use LIPS for these TFTs. In cases where the LIPS is connected to a drain electrode or a source electrode in an LIPS process, it is necessary to form a through hole through an insulation film covering the LIPS and also perform the cleaning with hydrofluoric acid (HF) in order to remove surface oxide on the LIPS in the through hole.
However, if the same process is applied to the TFTs using TAOS, the TAOS is dissolved by hydrofluoric acid (HF) and the TFTs cannot be formed. Therefore, this problem has to be resolved in order to form TFTs made with LTPS and TFTs made with TAOS on the same substrate.
In
Thereafter, the a-Si 1031 is irradiated with an excimer laser and thereby transformed into poly-Si 103.
A gate insulation film 104 is formed to cover the LTPS 103. The gate insulation film 104 is a SiOx film formed by CVD by using tetraethoxysilane (TEOS) as the raw material. A gate electrode 105 is formed on the gate insulation film 104. The gate electrode 105 is formed with Al alloy, Mo, W, or a laminated film of some of these materials, or the like.
In
Thereafter, as shown in
The TAOS layer 109 is formed on the second interlayer insulation film 108, and a sacrificial layer 110 is formed on the TAOS layer 109 with aluminum oxide AlOx, for example. Thereafter, the TAOS layer 109 and the sacrificial layer 110 are patterned as shown in
The sacrificial layer 110 is desired to be formed with oxide, specifically, AlOx, and the thickness of the sacrificial layer 110 is desired to be 5 to 50 nm. If the film thickness of the sacrificial layer 110 is too small, the sacrificial layer 110 can becomes discontinuous and hydrofluoric acid can permeate into the TAOS 109. Conversely, if the sacrificial layer 110 is thick, the formation of the sacrificial layer 110 takes a long time, or the TFT becomes likely to fall into depletion.
On the other hand, the etching rate of AlOx used for the sacrificial layer 110 varies greatly depending on the film quality. Therefore, the determination of the appropriate film thickness of the sacrificial layer 110 has to be made in consideration of the relationship with the etching rate. The duration of the cleaning of the LTPS 103 with hydrofluoric acid is 30 seconds or less. Thus, the film thickness of the sacrificial layer 110 required in consideration of the approximately 30 seconds of cleaning is shown in the following Table 1:
Table 1 shows evaluation of the etching rate of 0.5% diluted hydrofluoric acid used for the cleaning of the through holes 113 of the LTPS 103. As shown in Table 1, the appropriate film thickness of the sacrificial layer 110 is approximately 5 to 50 nm in consideration of the deposition rate of the sacrificial layer, resistance to the etching solution, etc. Incidentally, the sacrificial layer 110 may be formed as some separate layers. By employing such a multilayer film, the formation of film defects by foreign substances can be restrained.
The patterning of the sacrificial layer 110 and the TAOS 109 is performed by Cl-based dry etching or wet etching by use of oxalic acid, a developing solution, or the like. Since the sacrificial layer 110 and the TAOS 109 are patterned at the same time, it is desirable to avoid the use of an etching solution having extremely high etching rate only for the TAOS 109.
Thereafter, as shown in
An inorganic passivation film 112 is formed to cover the TAOS 109, the sacrificial layer 110 and the gate electrode 111. Thereafter, as shown in
The dry etching is carried out by using CF-based gas (CF4) or CHF-based gas (CHF3). The etching rate of the dry etching is 70 nm/min for SiOx and 6 nm/min for AlOx, for example, and is extremely low for AlOx in comparison with SiOx. Therefore, even though the dry etching for the through holes 113 on the LTPS's side are carried out through four layers and the dry etching for the through holes 114 on the TAOS's side are carried out through only two layers, AlOx remains on the through holes 114's side and the function as the sacrificial layer 110 can be maintained.
In
The Etching rate by using 5% hydrofluoric acid is 4 to 14 nm/min for AlOx, 6000 nm/min or higher for IGZO, 480 nm/min for ITZO, and 0 nm/min for poly-IGO. Although poly-IGO is hardly etched, this is a value in cases where poly-IGO is a bulk crystal. When poly-IGO is in a thin film state, hydrofluoric acid can permeate through the grain boundary and destroy the TAOS 109.
The region indicated by the reference character A in
This is the result of the two-stage etching for forming the through holes 114. The process of the two-stage etching is shown in
TMAH is used generally as a developing solution. The etching rate of AlOx by use of TMAH is as low as 7 nm/min. Further, even when over-etching continues for a relatively long time, the decrease in TAOS 109 can be kept down to an extremely small amount. The two-stage etching is made possible by properly setting the thickness of the AlOx sacrificial layer 110. Incidentally, the etching solution for the two-stage etching is not limited to TMAH; a different etching solution is also usable as long as its etching rate for AlOx is lower than that of hydrofluoric acid.
In contrast, if the sacrificial layer 110 is etched by using hydrofluoric acid alone, eaves of the sacrificial layer 110 are formed in the through hole as shown in
A characteristic feature of AlOx found in
The compactness of the film is influenced by the water content.
In the experimental result, the sample C, having a low water content and a high refractive index, proved to exhibit stable characteristics required of the sacrificial layer 110. Corresponding to this result, the refractive index of AlOx used as the sacrificial layer 110 is desired to be in a range from 1.58 to 1.65. Incidentally, the film stress of AlOx changes greatly depending on a slight change in the composition ratio between Al and O or the water content as shown in
The following Table 2 shows examples of the combination of the TAOS 109 and the sacrificial layer 110. The TAOS 109 can be formed not only as a single layer but also as multiple layers. While AlOx is used for the sacrificial layer 110, formation of AlOx as multiple layers also achieves the effect of reducing film defects caused by foreign substances.
While the “orientation” in Table 2 is synonymous with crystallinity, in the TAOS 109 and the sacrificial layer 110 both being thin films, a crystal does not grow in the film thickness direction and the crystal growth occurs only in film surface directions. The term “orientation” is used to express this situation.
As described above, by use of the present invention, even when the through holes 113 on the LTPS 103's side are cleaned with hydrofluoric acid, the destruction of a TFT does not occur at the through holes 114 on the TAOS 109's side, and thus it becomes possible to form TFTs made with LTPS 103 and TFTs made with TAOS 109 on the same substrate. Accordingly, a display device of high image quality and high reliability can be realized.
Consequently, as shown in
Incidentally, while employing a configuration like
When an image signal is applied between each pixel electrode 123 and the common electrode 121, lines of electric force develop as indicated by the arrows, by which the liquid crystal molecules 301 are rotated, the transmittance of a liquid crystal layer 300 is controlled, and an image is formed.
In
In the liquid crystal display device, when an image signal is written to a pixel electrode 123, a voltage is held for the period of one frame by retention capacitance formed by the pixel electrode 123, the common electrode 121 and the capacitive insulation film 122. If the leak current in this period is high, the voltage of the pixel electrode 123 changes, a flicker or the like occurs, and it becomes impossible to form an excellent image. By employing the TAOS TFTs according to the present invention, a liquid crystal display device of low leak current and high image quality can be realized.
The combinations of LIPS TFTs and TAOS TFTs described in the first through third embodiments are applicable also to organic EL display devices.
In
In
While various types of TFTs such as drive TFTs and switching TFTs are formed in the TFT array layer, employing the present invention makes it possible to form LTPS TFTs and TAOS TFTs in a common process, and thus various combinations of LIPS TFTs and TAOS TFTs become usable. Accordingly, an organic EL display device excelling in the image quality and capable of reducing the electric power consumption can be realized.
While TAOS TFTs are used for the display region and LTPS TFTs are used for the peripheral drive circuit in the above description, it is also possible to add TAOS TFTs to the peripheral circuit or to add LTPS TFTs to the display region depending on the product specifications.
Number | Date | Country | Kind |
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2016-100493 | May 2016 | JP | national |
This application is a continuation of U.S. application Ser. No. 15/585,401, filed on May 3, 2017. Further, this application claims priority from Japanese Patent Application JP 2016-100493 filed on May 19, 2016, the content of which is hereby incorporated by reference into this application.
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Number | Date | Country |
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2011-54812 | Mar 2011 | JP |
2013-175718 | Sep 2013 | JP |
Number | Date | Country | |
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20180308869 A1 | Oct 2018 | US |
Number | Date | Country | |
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Parent | 15585401 | May 2017 | US |
Child | 16011725 | US |