Claims
- 1. A distributed photodiode, the photodiode comprising:a substrate, the substrate being doped with a first dopant type and having first and second planar surfaces; a first plurality of diffusions, the first plurality of diffusions being doped with a second dopant type and formed on the first planar surface of the substrate; a second plurality of diffusions, the second plurality of diffusions being doped with the first dopant type and formed on the first planar surface of the substrate interposed the first plurality of diffusions; and a first contact having a first plurality of connective traces disposed on the first planar surface of the substrate and coupled to each of the first plurality of diffusions.
- 2. The distributed photodiode of claim 1, further including a backside diffusion formed on the second planar surface of the substrate, the backside diffusion being doped with the first dopant type.
- 3. The distributed photodiode of claim 2, further including a plurality of trenches formed in the first planar surface of the substrate, where each of the second plurality of diffusions is formed on a wall of a corresponding one of the plurality of trenches.
- 4. The distributed photodiode of claim 1, further including a plurality of trenches formed in the first planar surface of the substrate, where each of the second plurality of diffusions is formed on a wall of a corresponding one of the plurality of trenches.
- 5. The distributed photodiode of claim 1, wherein each of the second plurality of diffusions further comprises a substantially circular diffusion disposed around a corresponding one of the first plurality of diffusions.
- 6. A distributed photodiode, the photodiode comprising:a substrate, the substrate being doped with a first dopant type and having first and second planar surfaces; a first plurality of diffusions, the first plurality of diffusions being doped with a second dopant type and formed on the first planar surface of the substrate; a backside diffusion formed on the second planar surface of the substrate, the backside diffusion being doped with the first dopant type; and a first contact having a first plurality of connective traces disposed on the first planar surface of the substrate and coupled to each of the first plurality of diffusions.
- 7. The distributed photodiode of claim 6, further including a second plurality of diffusions, the second plurality of diffusions being doped with the first dopant type and formed on the first planar surface of the substrate interposed the first plurality of diffusions.
- 8. The distributed photodiode of claim 7, further including a plurality of trenches formed in the first planar surface of the substrate, where each of the second plurality of diffusions is formed on a wall of a corresponding one of the plurality of trenches.
- 9. The distributed photodiode of claim 8, where each of the plurality of trenches is substantially circular surrounding a corresponding one of the first plurality of diffusions.
- 10. The distributed photodiode of claim 7, where each of the second plurality of diffusions is substantially circular surrounding a corresponding one of the first plurality of diffusions.
Parent Case Info
This application is a continuation-in-part of U.S. application Ser. No. 09/448,861, filed Nov. 23, 1999 now U.S. Pat. No. 6,548,878, which is a continuation-in-part of U.S. application Ser. No. 09/037,258, filed Mar. 9, 1998, now U.S. Pat. No. 6,198,118 B1, which issued Mar. 6, 2001. This application further claims the benefit of U.S. Provisional Application No. 60/222,296, filed Aug. 1, 2000.
US Referenced Citations (56)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0 779 661 |
Jun 1997 |
EP |
2087181 |
May 1982 |
GB |
Non-Patent Literature Citations (4)
Entry |
Yamamoto et al., “Si-OEIC With A Built-In Pin Photodiode”, IEEE Transaction On Electron Devices, vol. 42, No. 1, Jan. 1995, pp. 58-63. |
Usami et al., “Evaluation Of The Bonded Silicon On Insulator (SOI) Wafer And The Characteristics Of PIN Photodiodes On The Bonded SOI Wafer”, IEEE Transactions On Electron Devices, vol. 42, No. 2, Feb. 1995, pp. 239-243. |
Kyomasu et al., “An Abnormal Phenomenon Due To Substrate Bias Modulation In The Integrated PIN Photodiode Sensor With Dielectric Isolation”, IMTC'94, May 10-12, pp. 238-241. |
Copy of European Search Report established for European patent application No. 99200543.9. |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/222296 |
Aug 2000 |
US |
Continuation in Parts (2)
|
Number |
Date |
Country |
Parent |
09/448861 |
Nov 1999 |
US |
Child |
09/920420 |
|
US |
Parent |
09/037258 |
Mar 1998 |
US |
Child |
09/448861 |
|
US |