Patent Application
20180226521
PolySi/SiO2 passivated contacts to n-type Si solar cells have been shown to be of excellent quality and have allowed 1-sun efficiencies above 25%. There are several routes to forming these contacts involving a variety of growth and annealing steps, one variation incorporates and preserves a thin tunnelling SiO2 layer between the polycrystalline silicon (polySi) and the crystalline silicon (c-Si) wafer. The n-type (polySi:P) version of this contact is known to produce excellent passivation with implied open circuit voltage (iVoc) values of about 740 mV and saturation current density (Joe) values less than 9 fA/cm2. However, the p-type (polySi:B) contact has been limited to lower iVoc values closer to about 700 mV (Joe<20 fA/cm2). These lower passivation values have been attributed to the low diffusivity of B in SiO2 due to peroxy linkage defects (PLD). PLDs act as a low-energy bridge for B to diffuse through the SiO2 layer, but pileup of B at the SiO2 tunneling layer is observed along with increased H concentrations associated with defect passivation. Accordingly, it would be advantageous to provide p-type polySi/SiO2 passivated contacts having improved characteristics.
Exemplary embodiments of the invention provide doped polySi/SiO2 passivated contacts and methods of making the same. The contacts may be doped with any suitable material, such as Ga, B, or P. The contacts may be doped p-type or n-type. The dopant may be incorporated by any suitable method, such as ion implantation or spin-on doping.
In an aspect, a method for fabricating gallium doped passivated contacts in a photovoltaic solar cell is disclosed, the method comprises the steps of: providing a silicon substrate wherein the substrate is doped using ion implantation of gallium or spin-on dopant inks containing gallium; and wherein the doped substrate is annealed and passivated; and wherein the passivated contacts have iVoc values of from about 720 to about 732 mV. In an embodiment, the passivated contacts also exhibit Joe values of from about 8.2 to about 3.1 fA/cm2. In an embodiment, the passivated contacts are passivated with Al2O3. In another embodiment, the passivated contacts do not have pileup of gallium at a SiO2 interface of the silicon substrate. In an embodiment, the passivated contacts have fewer dopant-related defects in the SiO2 interface when compared to contacts made with a boron dopant. In another embodiment, the annealing is performed at a temperature between about 850° C. and 950° C.
In an aspect, a photovoltaic solar cell comprising a silicon substrate comprising gallium doped passivated contacts is disclosed wherein the passivated contacts have iVoc values of from about 720 to about 732 mV. In an embodiment, the passivated contacts exhibit Joe values of from about 8.2 to about 3.1 fA/cm2. In an embodiment, the passivated contacts are passivated with Al2O3. In an embodiment, the passivated contacts do not have pileup of gallium at a SiO2 interface of the silicon substrate. In an embodiment, the passivated contacts have fewer dopant-related defects in the SiO2 interface when compared to contacts made with a boron dopant. In an embodiment, the silicon substrate is a crystalline silicon. In an embodiment, the silicon substrate is an n-type doped silicon. In an embodiment, the silicon substrate is a p-type doped silicon. In an embodiment, the silicon substrate is a monocrystalline silicon. In an embodiment, the silicon substrate is a multicrystalline silicon. In an embodiment, the solar cell exhibits efficiency greater than at least 20%.
Other objects, advantages, and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.
In some embodiments, disclosed herein are doped polySi/SiO2 passivated contacts which may be used in interdigitated back passivated contact (IBPC) solar cells. Disclosed herein are compositions and methods for overcoming the passivation limitation of the polySi:B/SiO2 contact by using Ga as the p-type dopant in the polySi:Ga/SiO2 contact.
In some embodiments, using Ga as a p-type dopant in polySi/SiO2 tunneling contacts overcomes the limitations of B-doped contacts. Gallium's low solid solubility limit in Si increases contact resistivity values but can be overcome with RTA processing. Gallium's fast diffusion in Si and tendency to exhibit retrograde diffusion can be used to form uniformly doped layers in polySi, but must be controlled through time-temperature product anneals to determine both the contact's passivation (dopant profiles into the c-Si wafer) and the surface doping density. The effusion of Ga from the Si wafer's surface is controlled through a dopant-blocking oxide capping layer. The high segregation coefficient of Ga in c-Si is about the same in polySi and is useful for the passivation of a polySi:Ga/SiO2 contact.
The annealing experiments disclosed herein reveal that tuning the time-temperature annealing window results in well-passivated and low contact resistance samples. The annealing parameters for P- and B-doped contacts (850° C., 30 min) form good passivation for the Ga-doped samples, but do not activate enough dopants in the polySi to allow low contact resistivities. However, using higher temperatures for shorter times (950° C., 1 min) does result in contact to the polySi and formation of a diode, but at the expense of higher Jo values compared with the lower temperature anneals.
Without being bound by theory, the metal to polySi contact resistivity currently limits the use of polySi:Ga contacts in solar cells. Despite this doping problem, disclosed herein are methods to form well-behaved diodes with nA/cm2 Jo values and ideality factors of about 1.3, while maintaining a high level of passivation (iVoc).
In an embodiment, the Ga-doped passivated contacts disclosed herein exhibit iVoc values of greater than 730 mV for p-type polySi/SiO2 contacts.
Symmetric test samples were formed using 1-10 Ohm-cm saw-damage-removal etched n-Cz wafers. The wafers were RCA-cleaned before a 1.5 nm thermal tunneling oxide was grown. Next, a PECVD-grown 50 nm intrinsic a-Si layer was deposited over the oxide on both sides of the wafer. The wafers were then either ion implanted with Ga69 into the a-Si using a beam line tool or doped with a Ga-containing spin-on dopant ink. The implant doses and energies are shown in Table 1.
Implanted and in situ-doped B samples are also include in Table 1 for reference. The samples were then annealed in a clean tube furnace between about 850° C.-950° C. for 1 sec to 30 mins to crystallize the a-Si to polySi, and to diffuse and activate dopants. For the ink-doped samples, the glass dopant layer was then removed with HF. Next, a 30 nm layer of Al2O3 was deposited on both sides of the wafer using atomic layer deposition of H2O and trimethalaluminum precursors and then annealed at 400° C. for 20 min in N2 ambient. Lifetime as a function of minority carrier density (MCD) data were collected using a Sinton WCT-120 photoconductance instrument. Dynamic-SIMS depth profiles were performed on select samples using 1.5 keV O2+ ions. X-ray Photoelectron Spectroscopy (XPS) analysis of the surface of annealed samples was performed to evaluate elemental composition and charge state. Metal/polySi contact resistivity measurements were made using transmission line measurement TLM patterns and emitter diode parameters were measured using small area metal contacts to the polySi:Ga using a Ga/In eutectic back Ohmic contact.
PolySi:X/SiO2 passivated contacts were formed on n-Cz wafers using ion implantation of X and X-containing spin-on dopant inks. After annealing and passivation with Al2O3, the contacts exhibit iVoc values of 720-732 mV with corresponding Joe values of 8.2-3.1 fA/cm2. These are among the best-reported values for Z-type polySi/SiO2 contacts. SIMS depth profile data show that, in contrast to Y, X does not pileup at the SiO2 interface in agreement with its known high diffusivity in SiO2. This lack of X pileup may imply fewer dopant-related defects in the SiO2, compared with Y dopants, and account for why the X exhibits excellent passivation.
Though the diffusivity of Ga in c-Si is slightly lower than for B in c-Si, it is high enough to form uniformly doped layers in 10-100 nm thick polySi by diffusion. Ga has a diffusivity in SiO2 2-orders of magnitude higher compared to B and a much higher segregation coefficient ([Ga]Si:[Ga]SiO2). Comparatively, the result is that Ga does not pileup as in SiO2 and doesn't form passivation-killing defects in the SiO2 or contribute to oxide breakup. The solid solubility of Ga in c-Si is low (1E19 cm−3 at 800° C.), but this does not inhibit contact or PN junction formation in Ga doped wafers for solar cells or high-quality rectifying diodes.
In an embodiment, formed gallium doped polySi:Ga/SiO2 passivated contacts on n-Cz wafers using ion implantation of Ga and Ga-containing spin-on dopant inks is disclosed. Ga-doped passivated contacts formed according to the methods discussed below exhibit near best-in-class iVoc values (>730 mV) for p-type polySi/SiO2 contacts. After annealing and passivation with Al2O3, the contacts exhibit iVoc values of 720-732 mV with corresponding Joe values of 8.2-3.1 fA/cm2. SIMS depth profile data show that, in contrast to B, Ga does not pileup at the SiO2 interface in agreement with its known high diffusivity in SiO2. This lack of Ga pileup results in fewer dopant-related defects in the SiO2, compared with B dopants, and also results in excellent passivation.
As discussed above, in some examples, symmetric test samples were formed using 1-10 Ohm-cm saw-damage-removed etched n-type Czochralski (n-Cz) Si wafers. The wafers were RCA-cleaned before a 1.5 nm thermal tunneling oxide was grown. Next, a plasma-enhanced chemical vapor deposition (PECVD)-grown 50 nm intrinsic amorphous silicon (a-Si) layer was grown over the oxide on both sides of the wafer. The wafers were then either ion implanted with Ga69 into the a-Si using a beam line tool or doped with a Ga-containing spin-on dopant ink. The implant doses and energies are shown in Table 1. The samples were then annealed in a clean tube furnace at 850° C. for 30 mins to crystallize the a-Si to polySi, and to diffuse and activate dopants. For the ink-doped samples the glass dopant layer was removed with HF. Next, a 30 nm layer of Al2O3 was deposited on both sides of the wafer using atomic layer deposition (ALD) and then annealed at 400° C. for 20 mins. Lifetime data as a function of minority carrier density (MCD) data were collected using a Sinton WCT-120 instrument. Secondary Ion Mass Spectrometry (SIMS) depth profiles were performed on select samples. X-ray Photoelectron Spectroscopy (XPS) analysis of the surface of annealed samples was performed to evaluate elemental composition. Finally, cross-sectional electron energy loss spectroscopy imaging compared dopant levels in the tunneling oxide between B-doped and Ga-doped samples. Metal/polySi contact resistivity measurements were made using transmission line method (TLM) patterns.
As discussed above, Table 1 shows calculated iVoc, 2Joe, implied fill factor (iFF), sheet resistance (Rsheet), and bulk lifetime (tau_bulk) values from minority carrier lifetime data as a function of MCD for various samples. Implant dose and energy levels are also shown. All of the samples in Table 1 show remarkable passivation parameters with iVoc values between 720-731 mV, and 2Joe values of 8.2 to 3.1 fA/cm2. These iVoc and 2Joe values are improved over previously known p-type polySi/SiO2 contacts that are not purposefully annealed to break up the tunneling oxide. The iFF values are up to about 82%.
In some examples, metal contacts were formed to the samples by etching off the Al2O3 in HF and evaporating Ag in a TLM pattern. Quantitative photoluminescence data showed only about a 2-3 mV decrease in iVoc after metallization. Ag/polySi:Ga contact resistances for both the implanted and ink-doped samples were high. XPS data depicted in
Although the embodiments discussed above use Ga as the dopant, any suitable dopant may be used, such as P or B. Also, any suitable method may be used to incorporate the dopant into the wafer. For example, as compared with ion implantation, using spin-on dopants or dopant inks/pastes is a simplified fabrication process and has the potential to reduce costs.
In an embodiment,
In another embodiment, commercially-available B, Ga, and P spin-on dopants may be used for p- or n-type doping. The dopant-containing fluids are spin-coated with a thickness of about 400 nm and cured at about 200° C. on a hotplate. Patterning is accomplished by photolithography. In an embodiment, intrinsic regions are left between the doped passivated contacts for isolation.
Dopants are driven into the intrinsic amorphous/poly-Si layer by annealing at about 850° C. in N2 gas. In PECVD-deposited hydrogenated amorphous Si (a-Si:H), this anneal also crystallizes the layer. Then the dopant glass is removed by HF. In an embodiment, fifteen nm Al2O3 is deposited conformally on the cell surface by ALD for passivation, and about 75 nm SiNx is deposited on the front side as an antireflection coating. A forming gas anneal (FGA) at about 400° C. is performed to activate the passivation. Finally, devices are metallized with evaporated Al, patterned by photolithography.
Symmetric lifetime test samples are fabricated using a process similar to the cells. A difference is that the poly/amorphous Si is deposited symmetrically on both sides of the Si wafer. In additions, the same dopant (B, Ga, or P) is deposited on both sides. The symmetric lifetime samples are fabricated for either p-type (B or Ga) passivated contacts, or for n-type (P) contacts.
In an embodiment, Sinton lifetime measurements were performed on the samples at key stages of the process: (1) intrinsic poly-Si, (2) after spin-on dopant deposition and anneal, (3) after FGA activation of passivation. Implied Voc at 1-sun illumination was also extracted from the measurements. The resistivity of the passivated contact was found via TLM analysis of fabricated metal contact pads.
The passivation quality of the test samples was determined from the implied Voc after key processing steps: (1) initial intrinsic poly-Si, (2) spin-on dopant deposition and anneal, (3) final device after FGA activation of the passivation. iVoc data for all dopant types and both poly-Si deposition methods (PECVD, LPCVD) are depicted in
The performance of the n-type (P) passivated contact has a final iVoc=708 and 710 mV for PECVD and LPCVD poly-Si, respectively. The B p-type passivated contact with LPCVD poly-Si has a final iVoc=689 mV.
B-doped passivated contacts with PECVD poly-Si have a comparatively lower final iVoc=667 mV. A possible explanation is that B dopant concentration near the tunneling SiOx interface is too high. The B spin-on glass has high dopant concentration of 8E21 cm−3 and the PECVD-grown layer is only 50 nm thick vs. 200 nm for LPCVD. As discussed above, Ga-doped p-type passivated contacts exhibit an improved final iVoc.
The resistivity for the P-doped passivated contact is found to be 25-30 mΩ-cm2 for both PECVD- and LPCVD-grown poly-Si. For B- and Ga-doping, p-type passivated contacts were grown on an n-type wafer. Since this is a p-n diode the TLM analysis is not applicable. Analysis of the diode I-V characteristic of the B passivated contact gives an initial estimate of the effective contact resistivity <50 mΩ-cm2.
These results demonstrate that passivated contacts fabricated with spin-on dopants exhibit improved performance. Spin-on dopants are useful for IBPC cells with a simple and low-cost process, and high efficiency Si photovoltaics that are industrially viable.
Table 1, above, shows implant and annealing conditions along with measured iVoc, 2Joe, iFF, Rsheet, and tau_bulk. Values from minority carrier lifetime data as a function of MCD. Many of the samples in Table 1 have improved passivation parameters with iVoc values as high as 731 mV, and 2Joe values less than 4 fA/cm2. These iVoc and 2Joe values are improved over p-type polySi/SiO2 contacts that are not purposefully annealed to break up the tunneling oxide. Additionally, for many of the samples, the bulk wafer lifetime remained above 1 ms. The iFF values are at about 82%.
As with B- and P-doped polySi/SiO2 contacts, annealing conditions play a significant role in the final dopant profiles, activation, and ultimately their passivation quality by improving the SiO2/c-Si chemical passivation. As depicted in Table 1, a variety of annealing conditions for the Ga-doped passivated contacts were tried. For B- and P-doped samples we have found that an 850° C., 30 min anneal in either N2 or forming gas (10% H, 90% N2) forms an improved passivating contact for our deposition conditions. The SIMS depth profile of
Next, we increased the temperature of the RTA to 950° C. to raise the thermal energy for dopant activation, but minimize retrograde Ga diffusion, and effusion from the contact. Davies observed enhanced activation of Ga implanted in Si by annealing above 950° C. for less than 25 sec. His data reveal that the Ga solubility limit in Si can be exceeded if the RTA time is less than about 4 seconds.
Metal contacts were formed to the samples by etching off the Al2O3 in 1% HF and evaporating Ag or Al: Si (1% Si) in a TLM or small dot pattern through a shadow mask. Quantitative photoluminescence data showed about a 2-3 mV decrease in iVoc after metallization, better than similar B-doped samples. Current-voltage data between TLM pads (20-200 μm spacing) were generally Ohmic, but showed very high resistances (˜100s-1000s Ohms) leading to large contact resistivities, or nonlinear resistance vs TLM pad spacing graphs. A 200° C., 5 min post metallization (Al: Si) anneal improved both the Ohmic nature and the resistance of the contact, as can be seen in
Gallium oxide is known to form and become etch resistant at temperatures over 800° C. when Ga and O are present in a material matrix. In an embodiment, O could have been present in the form of a Si native oxide on the surface of the samples during annealing, or O could have been present in trace amounts in the ambient of the furnace. XPS depth profile measurements were conducted to determine the chemical nature of the surface of the contacts.
More Ga was activated by raising the annealing temperature from 850° C. to 950° C. For samples annealed at 950° C. improvement in the diode contact resistance was observed.
Metallized samples were reactive ion etched (RIE) in SF6 between the small diameter (<500 μm) metallized circles to remove the polySi layer and isolate the metal/polySi/SiO2 contacts. An Ohmic back contact was formed on the reverse side of the wafer, directly underneath the metallized dots, by removing the polySi:Ga layer with a full-area RIE and then applying a GaIn eutectic alloy. Current-voltage data were collected on the samples by contacting the metal dot on the front side and the GaIn eutectic on the rear side of the wafer.
The ink-doped Ga samples resulted in higher iVoc values (see Table 1), however, none of the samples were able to be contacted with either Ag or Al: Si. SIMS, XPS and spreading resistance measurements indicate a depletion of Ga near the contacting surface.
The foregoing disclosure has been set forth merely to illustrate the invention and is not intended to be limiting.
This application claims priority from U.S. Provisional Application No. 62/455,120, filed Feb. 6, 2017, the disclosure of which is incorporated herein by reference in its entirety.
The United States Government has rights in this invention under Contract No. DEAC36-08GO28308 between the United States Department of Energy and the Alliance for Sustainable Energy, LLC, the Manager and Operator of the National Renewable Energy Laboratory.
| Number | Date | Country | |
|---|---|---|---|
| 62455120 | Feb 2017 | US |
