Patent Application
20220028309
This application claims priority to Chinese Patent Application No. 2020107313939, filed on Jul. 27, 2020, which is incorporated herein by reference in its entirety.
The present application relates to a field of display technology, and more particularly, to a drive circuit and a display device.
With the development of display technology nowadays, various drive chips in a drive circuit are getting smaller while their functions are increasing. Therefore, the protection mechanism for the circuit increases. Currently, most protection mechanisms are directed to the voltage or current of the drive chip itself. When the voltage or current of the drive chip itself exceeds a nominal value, an operation is stopped.
However, at present, there are very few protection mechanisms for the temperature of the drive chip. As a result, when the temperature of the drive chip is abnormal due to internal failure or external high temperature, the drive chip may be damaged or burned.
Based on the above, in view of the above technical problem, it is necessary to provide a drive circuit and a display device that can protect the drive chip when the temperature of the drive chip is abnormal.
A drive circuit is provided, including: a drive chip, configured to provide a drive signal, including a detection diode; a power supply circuit, configured to provide a constant power supply for the detection diode; an acquisition circuit, configured to acquire an electrical signal related to a voltage across the detection diode and a current flowing through the detection diode; a detection circuit, configured to obtain the voltage across the detection diode and the current flowing through the detection diode based on the electrical signal acquired by the acquisition circuit, and obtain an internal temperature of the drive chip based on the voltage across the detection diode and the current flowing through the detection diode; and a control circuit, configured to control the drive chip based on the internal temperature of the drive chip obtained by the detection circuit. When the detection circuit detects that the internal temperature of the drive chip is greater than a maximum threshold temperature or less than a minimum threshold temperature, the control circuit controls the drive chip to stop outputting the drive signal.
A drive circuit is further provided, including: a drive chip, configured to provide a drive signal, including a detection diode; a power supply circuit, configured to provide a constant power supply for the detection diode; a detection resistor, having a constant resistance value and being connected in series with the detection diode; an acquisition circuit, including a first acquisition sub-circuit and a second acquisition sub-circuit, the first acquisition sub-circuit being configured to acquire and output a voltage across the detection diode, and the second acquisition sub-circuit being configured to acquire and output a voltage across the detection resistor; a timing controller, including a detection circuit and a control circuit, wherein the detection circuit is configured to calculate a current flowing through the detection diode based on the voltage across the detection resistor, and to obtain an internal temperature of the drive chip based on the voltage across the detection diode and the current flowing through the detection diode; and a control circuit, configured to control the drive chip based on an internal temperature of the drive chip obtained by the detection circuit; when the detection circuit detects that the internal temperature of the drive chip is greater than a maximum threshold temperature or less than a minimum threshold temperature, the control circuit controls the drive chip to stop outputting the drive signal.
A display device is further provided, including a display panel, and the drive circuit mentioned above, and the drive circuit is configured to drive the display panel.
According to the above drive circuit, a detection diode is included in the drive chip. The acquisition circuit may acquire an electrical signal related to a voltage across the detection diode and a current flowing through the detection diode. The detection circuit may obtain the voltage across the detection diode and the current flowing through the detection diode based on the electrical signal acquired by the acquisition circuit, and may obtain the internal temperature of the drive chip based on the voltage across the detection diode and the current flowing through the detection diode. The control circuit may control the drive chip based on the internal temperature of the drive chip obtained by the detection circuit. When the detection circuit detects that the internal temperature of the drive chip is greater than the maximum threshold temperature or less than the minimum threshold temperature, the control circuit controls the drive chip to stop outputting the drive signal. Therefore, the drive chip of the drive circuit of the present application outputs the drive signal only when the temperature is normal, and thus, the drive chip can be effectively protected to prevent the drive chip from being damaged or burned due to a temperature abnormality.
In order to make the objectives, technical solutions and advantages of the present application more clear, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely intended to explain the present application and are not intended to limit the present application.
The display device provided in the present application may be a liquid crystal display device, or may also be an organic light emitting display device, or may also be another type of display device.
In an embodiment, referring to
Referring to
The drive chip 210 may be a gate driver, or may be a data driver, or may include both a gate driver and a data driver. Alternatively, the drive chip may also be or include other chips in the drive circuit 200, which is not limited in the present application.
The drive chip 210 includes a detection diode 211. The power supply circuit 220 provides a constant power supply for the detection diode 211. The acquisition circuit 230 is configured to acquire an electrical signal related to a voltage across the detection diode 211 and a current flowing through the detection diode 211 when the power supply voltage is constant.
The detection circuit 240 may obtain the voltage across the detection diode 211 and the current flowing through the detection diode 211 based on the electrical signal acquired by the acquisition circuit 230. The detection diode 211 has sensitivity to the temperature in the environment in which it is located. When the temperature is increased, the voltage of the detection diode 211 corresponding to the same current becomes lower, and the current corresponding to the same voltage becomes larger. Therefore, the detection circuit 240 may further obtain the internal temperature of the drive chip 210 where the detection diode 211 is located based on the voltage across the detection diode 211 and the current flowing through the detection diode 211.
The control circuit 250 is configured to control the drive chip 210 based on the internal temperature of the drive chip 210 obtained by the detection circuit 240. When the detection circuit 240 detects that the internal temperature of the drive chip 210 is greater than a maximum threshold temperature or less than a minimum threshold temperature, the control circuit 250 controls the drive chip 210 to stop outputting the drive signal and continues to output the drive signal until the drive circuit is restarted and the temperature of the drive chip 210 is normal.
The maximum threshold temperature here is a maximum temperature when the drive chip 210 works normally, and the minimum threshold temperature is a minimum temperature when the drive chip 210 works normally. The maximum threshold temperature and the minimum threshold temperature may be determined based on actual chip performance.
Therefore, the drive chip 210 of the drive circuit 200 of the present embodiment outputs the drive signal only when the temperature is normal, and thus the drive chip 210 can be effectively protected to prevent the drive chip 210 from being damaged or burned due to a temperature abnormality.
In the embodiment of the present application, in order to improve integration, the detection circuit 240 and the control circuit 250 may be integrated in the timing controller 260. Of course, one or both of the detection circuit 240 and the control circuit 250 may also be located at another position, which is not limited in the present application.
In an embodiment, the drive circuit 200 further includes a detection resistor 270 connected in series with the detection diode 211. The resistance value of the detection resistor 270 is constant, that is, the detection resistor 270 is a constant resistance, and therefore the current flowing therethrough can be easily obtained by the ratio of the voltage to the resistance. Since the detection diode 211 and the detection resistor 270 are connected in series, the current flowing through the detection resistor 270 is the same as the current flowing through the detection diode.
The acquisition circuit 230 of the present embodiment acquires the voltage across the detection resistor 270 (i.e. acquiring an electrical signal related to the current flowing through the detection diode 211), so that the current flowing through the detection diode 211 can be conveniently obtained.
In an embodiment, on the basis of the above embodiment, further, the acquisition circuit 230 is configured to include a first acquisition sub-circuit 231 and a second acquisition sub-circuit 232. The first acquisition sub-circuit 231 is configured to acquire and output the voltage across the detection diode 211 (i.e. acquiring an electrical signal related to the voltage across the detection diode 211). The second acquisition sub-circuit 232 is configured to acquire and output the voltage across the detection resistor 270 (i.e. acquiring an electrical signal related to the current flowing through the detection diode 211).
The detection circuit 240 calculates the current flowing through the detection diode 211 based on the voltage across the detection resistor 270, and obtains the internal temperature of the drive chip 210 based on the voltage across the detection diode 211 and the current flowing through the detection diode 211.
In this embodiment, the voltage across the detection diode 211 and the voltage across the detection resistor 270 are respectively acquired by the first acquisition sub-circuit 231 and the second acquisition sub-circuit 232, so that the detection circuit 240 can conveniently obtain the voltage across the detection diode 211 and the current flowing through the detection diode 211.
Of course, the embodiment of the present application is not limited thereto. For example, the acquisition circuit 230 may also include only one acquisition sub-circuit, which is only configured to acquire the voltage across one of the detection diode 211 and the detection resistor 270. In this case, the detection circuit 240 may obtain the voltage across another of the detection diode 211 and the detection resistor 270 by subtracting the voltage value acquired by the acquisition circuit 230 from the voltage value of the power supply circuit 220. Therefore, the voltage acquired by the acquisition circuit 230 is an electrical signal related to both the voltage across the detection diode 211 and the current flowing through the detection diode 211 at the same time.
Specifically, the first acquisition sub-circuit 231 may include a first operational amplifier OP1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. Resistance values of the first resistor R1 and the second resistor R2 are the same, and resistance values of the third resistor R3 and the fourth resistor R4 are the same. Resistance values of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are all constant, that is, all of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are constant resistors.
An input end of the first resistor R1 is connected to an input end of the detection diode 211, and an output end of the first resistor R1 is connected to a positive polarity input end of the first operational amplifier OP1 and an input end of the second resistor R2. An output end of the second resistor R2 is grounded (the potential is zero). Hence, positive polarity input end potential V1+ of the first operational amplifier OP1 is obtained by dividing the input end potential V1 of the detection diode 211 by two resistors (the first resistor R1 and the second resistor R2). Since the resistance value of the two resistors are the same, thus V1+=(V1)/2.
An input end of the third resistor R3 is connected to an output end of the detection diode 211, and an output end of the R3 is connected to a negative polarity input end of the first operational amplifier OP1 and an input end of the fourth resistor R4. An output end of the fourth resistor R4 is connected to an output end of the first operational amplifier OP1. Hence, negative polarity input end potential V1− of the first operational amplifier OP1 can be obtained by detecting output end potential V2 of the detection diode 211 and output end potential VOUT1 of the first operational amplifier OP1, that is, V1−=V2−(V2−VOUT1)/2=(V2+VOUT1)/2.
According to a characteristic of the operational amplifier OP, V1+=V1−. Thus, (V1)/2=(V2+VOUT1)/2, that is, V1=V2+VOUT1, and finally VOUT1=V1−V2. Hence, the output end potential VOUT1 of the first operational amplifier OP1 is a potential difference between V1 and V2, that is, the voltage across the detection diode 211.
The second acquisition sub-circuit 232 may include a second operational amplifier OP2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. Resistance values of the fifth resistor R5 and the sixth resistor R6 are the same, and resistance values of the seventh resistor R7 and eighth resistor R8 are the same. Resistance values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 are all constant, that is, all of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 are constant resistors.
An input end of the fifth resistor R5 is connected to an input end of the detection resistor 270 (i.e. the output end of the detection diode 211). The output end of the fifth resistor R5 is connected to a positive polarity input end of the second operational amplifier OP2 and an input end of the sixth resistor R6. An output end of the sixth resistor R6 is grounded (the potential is zero). Hence, positive polarity input end potential V2+ of the second operational amplifier OP2 is obtained by dividing the input end potential V2 of the detection resistor 270 (i.e. the output end potential V1 of the detection diode 211) by two resistors (the fifth resistor R5 and the sixth resistor R6). Since the resistance value of the two resistors are the same, thus V2+=(V2)/2.
An input end of the seventh resistor R7 is connected to an output end of the detection resistor 270, the output end of the seventh resistor R7 is connected to a negative polarity input end of the second operational amplifier OP2 and an input end of the eighth resistor R8. An output end of the eighth resistor R8 is connected to an output end of the second operational amplifier OP2. Hence, negative polarity input end potential V2− of the second operational amplifier OP2 can be obtained by detecting output end potential V3 of the detection resistor 270 and output end potential VOUT2 of the second operational amplifier OP2, that is, V2−=V3−(V3−VOUT2)/2=(V3+VOUT2)/2.
According to the characteristic of the operational amplifier OP, V2+=V2−. Thus, (V2)/2=(V3+VOUT2)/2, that is, V2=V3+VOUT2, and finally VOUT2=V2−V3. Hence, the output end potential VOUT2 of the second operational amplifier OP2 is the potential difference between V2 and V3, that is, the voltage across the detection resistor 270.
The acquisition circuit 230 transmits the VOUT1 and the VOUT2 directly to the detection circuit 240. The detection circuit 240 thus obtains the voltage across the detection diode 211 and the current flowing through the detection circuit 240, thereby obtaining the internal temperature of the drive chip 210.
Of course, in the embodiment of the present application, the specific circuit structure of the first acquisition sub-circuit 231 or the second acquisition sub-circuit 232 of the acquisition circuit 230 may also be different from the above, which is not limited in the present application.
In an embodiment, the feature that “the detection circuit 240 obtains the internal temperature of the drive chip 210 where the detection diode 211 is located based on the voltage across the detection diode 211 and the current flowing through the detection diode 211” specifically includes the followings. The detection circuit 240 obtains the current-voltage curve of the detection diode 211 based on the voltage across the detection diode 211 and the current flowing through the detection diode 211. The internal temperature of the drive chip 210 is obtained based on the current-voltage curve of the detection diode 211. At this time, the detection circuit 240 has a function of automatically analyzing and recognizing the current-voltage curve. For example, referring to
Of course, the present application is not limited thereto. For example, in another embodiment, the detection circuit 240 may also include a storage table storing a relationship among the voltage, the current and the temperature, so that the detection circuit 240 may directly obtain the internal temperature of the drive chip 210 where the detection diode 211 is located based on the voltage across the detection diode 211 and the current flowing through the detection diode 211.
In an embodiment, referring to
The acquisition circuit 230 includes a first acquisition sub-circuit 231 and a second acquisition sub-circuit 232. The first acquisition sub-circuit 231 is configured to acquire and output the voltage across the detection diode 211. The second acquisition sub-circuit 232 is configured to acquire and output the voltage across the detection resistor 270.
The timing controller 260 includes a detection circuit 240 and a control circuit 250. The detection circuit 240 calculates the current flowing through the detection diode 211 based on the voltage across the detection resistor 270, and obtains the internal temperature of the drive chip 210 based on the voltage across the detection diode 211 and the current flowing through the detection diode 211. The control circuit 250 is configured to control the drive chip 210 based on the internal temperature of the drive chip 210 obtained by the detection circuit 240.
When the detection circuit 230 detects that the internal temperature of the drive chip 210 is greater than the maximum threshold temperature or less than the minimum threshold temperature, the control circuit 250 controls the drive chip 210 to stop outputting the drive signal and continues to output the drive signal until the drive circuit is restarted and the temperature of the drive chip 210 is normal.
The maximum threshold temperature here is the maximum temperature when the drive chip 210 works normally, and the minimum threshold temperature is the minimum temperature when the drive chip 210 works normally. The maximum threshold temperature and the minimum threshold temperature may be determined based on the actual chip performance.
Therefore, the drive chip 210 of the drive circuit 200 of the present embodiment outputs the drive signal only when the temperature is normal, and thus the drive chip 210 can be effectively protected to prevent the drive chip 210 from being damaged or burned due to the temperature abnormality.
The circuits and sub-circuits in the present disclosure may have other implementation forms. For example, the circuits and sub-circuits may be, but are not limited to, an application-specific integrated circuit (ASIC) chip, a field-programmable gate array (FPGA), a dedicated or shared processor that executes a particular software module or a piece of code at a particular time, and/or other programmable-logic devices now known or later developed.
The respective technical features of the above embodiments can be combined arbitrarily, and in order to brief the description, all possible combinations of the respective technical features in the above embodiments are not described; however, as long as the combination of these technical features does not have any contradiction, it should be considered to be the scope of disclosure disclosed in the present description.
The above embodiments merely express several embodiments of the present application, and the description thereof is more specific and detailed, but cannot be construed as limiting the scope of the present invention. It should be noted that, for a person of ordinary skill in the art, several modifications and improvements can also be made without departing from the concept of the present application, which all belong to the scope of protection of the present application. Therefore, the scope of protection of the present application should be regarded by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202010731393.9 | Jul 2020 | CN | national |
