Patent Grant
11475809
The present application is a 371 of PCT Patent Application Serial No. PCT/CN2020/119505, filed on Sep. 30, 2020, which claims priority to Chinese Patent Application No. 201921695273.7, filed on Oct. 10, 2019 and with the utility model title “DRIVING CIRCUIT FOR DISPLAY PANEL, DISPLAY PANEL, AND DISPLAY DEVICE”, both of which are incorporated herein by reference in their entirety.
The present disclosure relates to a driving circuit for a display panel, a display panel, and a display device.
The display device usually includes a display panel and a driving circuit. Both the driving circuit and the display panel may include clock pins. The clock pin of the driving circuit is electrically connected to the clock pin of the display panel, so that the driving circuit can provide a clock signal to the display panel.
The embodiments of the present disclosure provide a driving circuit for a display panel, a display panel, and a display device, which help to improve the compatibility of the driving circuit.
In a first aspect, a driving circuit for a display panel is provided. The driving circuit includes:
a plurality of driving units, wherein at least one of the driving units includes M dummy pins, and at least one of the M dummy pins is configured to be electrically connected to at least one clock pin of the display panel, and M is an integer greater than or equal to 1.
Optionally, at least one of the driving units further includes a test pin configured to be electrically connected to a test line of the display panel, so as to transmit a test signal to the test line during a test phase of the display panel and ground the test line during a display phase of the display panel.
Optionally, at least one of the driving units further includes a feed pin configured to be electrically connected to a common electrode line of the display panel and transmit a feed signal or a compensation signal to the common electrode line.
Optionally, the driving units are arranged in a target direction, the driving units respectively include grounding pins, and at least one grounding pin of one of any two adjacent driving units is electrically connected to at least one grounding pin of the other driving unit.
Optionally, the driving units at two ends of the driving units are respectively a first driving unit and a second driving unit, and the driving units between the first driving unit and the second driving unit are third driving units; the first driving unit and the second driving unit respectively include the M dummy pins and a first grounding pin, and each of the third driving units includes a first grounding pin and a second grounding pin;
the first grounding pin of the first driving unit is electrically connected to the first grounding pin of the third driving unit adjacent thereto, the first grounding pin of the second driving unit is electrically connected to the second grounding pin of the third driving unit adjacent thereto, and the first grounding pin of each of other third driving units is electrically connected to the second grounding pin of the third driving unit adjacent thereto and located therebefore, and the second grounding pin of each of other third driving units is electrically connected to the first grounding pin of the third driving unit adjacent thereto and located thereafter, and the other third driving units are third driving units other than a third driving unit adjacent to the first driving unit and a third driving unit adjacent to the second driving unit; and
the first grounding pin and the second grounding pin are respectively configured to be electrically connected to a peripheral ground line of the display panel.
Optionally, the first driving unit and the second driving unit further respectively include a second grounding pin, and the third driving units further each includes a third grounding pin and a fourth grounding pin;
the second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit adjacent thereto, the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto; and the third grounding pin of each of the other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, the fourth grounding pin of each of the other third driving units is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter; and
the second grounding pin, the third grounding pin, and the fourth grounding pin are respectively configured to be electrically connected to a peripheral ground line of the display panel.
Optionally, at least one of the first driving unit and the second driving unit further includes a third grounding pin and a fourth grounding pin;
the third grounding pin is configured to be electrically connected to a peripheral ground line of the display panel; and
the fourth grounding pins of the first driving unit and the second driving unit are configured to be electrically connected to the silver glue dots of the display panel through silver glue dot ground lines.
Optionally, the driving units are arranged in a target direction, the driving units at two ends of the driving units are respectively a first driving unit and a second driving unit, the driving units between the first driving unit and the second driving unit are third driving units; the first driving unit and the second driving unit respectively include the M dummy pins, the test pin, the feed pin, the first grounding pin, the second grounding pin, the third grounding pin, and the fourth grounding pin; and each of the third driving units includes a first grounding pin, a second grounding pin, a third grounding pin, and a fourth grounding pin;
in the first driving unit: the third grounding pin, the fourth grounding pin, the test pin, the M dummy pins, the feed pin, the first grounding pin and the second grounding pin are arranged sequentially in a direction of approaching the second driving unit;
in the second driving unit: the third grounding pin, the fourth grounding pin, the test pin, the M dummy pins, the feed pin, the first grounding pin and the second grounding pin are arranged sequentially in a direction of approaching the first driving unit;
in the third driving unit: the third grounding pin, the first grounding pin, the second grounding pin, and the fourth grounding pin are arranged sequentially in a direction from the first driving unit to the second driving unit;
the first grounding pin of the first driving unit is electrically connected to the first grounding pin of the third driving unit adjacent thereto, and the second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit;
the first grounding pin of the second driving unit is electrically connected to the second grounding pin of the third driving unit adjacent thereto, and the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit;
the first grounding pin of each of other third driving units is electrically connected to the second grounding pin of the third driving unit adjacent thereto and located therebefore, the second grounding pin of each of other third driving units is electrically connected to the first grounding pin of the third driving unit adjacent thereto and located thereafter, and the third grounding pin of each of other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, the fourth grounding pin of each of other third driving units is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter, wherein the other third driving units are third driving units other than the third driving unit adjacent to the first driving unit and the third driving unit adjacent to the second driving unit;
the test pin is configured to be electrically connected to the test line of the display panel, transmit a test signal to the test line during a test phase of the display panel and ground the test line during a display phase of the display panel;
the feed pin is configured to be electrically connected to a common electrode line of the display panel and transmit a feed signal or a compensation signal to the common electrode line; and
the fourth grounding pins of the first driving unit and the second driving unit are configured to be electrically connected to silver glue dots of the display panel through silver glue dot ground lines, and the other grounding pins are configured to be electrically connected to a peripheral ground line of the display panel.
Optionally, at least one of the driving units includes 10 dummy pins.
Optionally, each of the driving units includes a plurality of pins, the width of the pin is 16 to 18 microns, and a spacing between any two adjacent pins is 16 to 18 microns.
Optionally, the driving circuit is a chip-on-film circuit.
In a second aspect, a display panel is provided, which includes:
at least one clock pin,
wherein the at least one clock pin is configured to be electrically connected to at least one of M dummy pins of at least one driving unit of a driving circuit for the display panel, and M is an integer greater than or equal to 1.
Optionally, the display panel has a display area and a non-display area, and the display panel further includes:
a test line located in the non-display area,
wherein the test line is configured to be electrically connected to a test pin in at least one driving unit of the driving circuit, to receive a test signal transmitted by the test pin during a test phase of the display panel and to be grounded by the test pin during a display phase of the display panel.
Optionally, the display panel further includes a common electrode line located in the display area,
at least one driving unit of the driving circuit further includes a feed pin, and
the common electrode line is configured to be electrically connected to a feed pin in at least one driving unit of the driving circuit to receive a feed signal or a compensation signal transmitted by the feed pin.
Optionally, the display panel further includes a peripheral ground line located in the non-display area at the periphery of the display area and located on a side of the test line away from the display area;
the driving circuit includes a plurality of driving units arranged in a target direction, and the driving units at two ends of the driving units are respectively a first driving unit and a second driving unit, the driving units between the first driving unit and the second driving unit are third driving units; the first driving unit and the second driving unit respectively include the M dummy pins, the test pin, the feed pin, the first grounding pin, the second grounding pin, and the third grounding pin; each of the third driving units includes a first grounding pin, a second grounding pin, a third grounding pin, and a fourth grounding pin; and
the peripheral ground line is configured to be electrically connected to the first, second, third, and fourth grounding pins.
Optionally, the display panel further includes silver glue dots located in the non-display area;
the first driving unit and the second driving unit further respectively include a fourth grounding pin; and
the silver glue dots are configured to be electrically connected to the fourth grounding pins of the first driving unit and the second driving unit through silver glue dot ground lines.
In a third aspect, a display device is provided. The display device includes:
a display panel and a driving circuit, wherein the driving circuit is located on at least one side of the display panel;
the display panel includes at least one clock pin;
the driving circuit includes a plurality of driving units, at least one of the driving units includes M dummy pins, and M is an integer greater than or equal to 1; and
at least one of the M dummy pins is electrically connected to the at least one clock pin.
Optionally, the display panel has a display area and a non-display area, and the display panel further includes a test line located in the non-display area;
at least one of the driving units further includes a test pin electrically connected to the test line; and
wherein the test pin is configured to transmit a test signal to the test line during a test phase of the display panel, and to ground the test line during a display phase of the display panel.
Optionally, the display panel further includes a common electrode line located in the display area;
at least one of the driving units further includes a feed pin electrically connected to the common electrode line;
the feed pin is configured to transmit a feed signal or a compensation signal to the common electrode line.
Optionally, the driving units are arranged in a target direction, the driving units respectively include a grounding pin, and at least one grounding pin of one of any two adjacent driving units is electrically connected to at least one grounding pin of the other driving unit.
Optionally, the display panel further includes a peripheral ground line located in the non-display area at the periphery of the display area and located on a side of the test line away from the display area;
the driving units at two ends of the driving units are respectively a first driving unit and a second driving unit, the driving units between the first driving unit and the second driving unit are third driving units; the first driving unit and the second driving unit respectively include the M dummy pins and a first grounding pin, and each of the third driving units includes a first grounding pin and a second grounding pin;
the first grounding pin of the first driving unit is electrically connected to the first grounding pin of the third driving unit adjacent thereto, the first grounding pin of the second driving unit is electrically connected to the second grounding pin of the third driving unit adjacent thereto; the first grounding pin of each of the other third driving units is electrically connected to the second grounding pin of the third driving unit adjacent thereto and located therebefore, the second grounding pin of each of the other third driving units is electrically connected to the first grounding pin of the third driving unit adjacent thereto and located thereafter, wherein the other third driving units are third driving units other than a third driving unit adjacent to the first driving unit and a third driving unit adjacent to the second driving unit; and
the first grounding pins and the second grounding pins are respectively electrically connected to the peripheral ground line.
Optionally, the first driving unit and the second driving unit further respectively include a second grounding pin, and the third driving units further each include a third grounding pin and a fourth grounding pin;
the second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit adjacent thereto, the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto; and the third grounding pin of each of the other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, the fourth grounding pin of each of the other third driving units is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter; and
the second ground pins, the third ground pins, and the fourth ground pins are respectively electrically connected to the peripheral ground line.
Optionally, the display panel further includes a silver glue dot located in the non-display area; and
at least one of the first driving unit and the second driving unit further includes a third grounding pin and a fourth grounding pin, and the third grounding pin is electrically connected to the peripheral ground line, the fourth grounding pin is electrically connected to the silver glue dot through a silver glue dot ground line.
Optionally, the display panel has a display area and a non-display area, and the display panel further includes a test line, a peripheral ground line, a common electrode line, and a silver glue dot; the test line is located in the non-display area, the common electrode line is located in the display area, the peripheral ground line is located in the non-display area at the periphery of the display area and is located on a side of the test line away from the display area, the silver glue dot is located in the non-display area;
the driving units are arranged in a target direction, and the driving units at two ends are respectively a first driving unit and a second driving unit, and the driving units between the first driving unit and the second driving unit are third driving units; the first driving unit and the second driving unit respectively include the M dummy pins, a test pin, a feed pin, a first grounding pin, a second grounding pin, a third grounding pin, and a fourth grounding pin, each of the third driving units includes a first grounding pin, a second grounding pin, a third grounding pin, and a fourth grounding pin;
in the first driving unit: the third grounding pin, the fourth grounding pin, the test pin, the M dummy pins, the feed pin, the first grounding pin, and the second grounding pin are arranged sequentially in a direction of approaching the second driving unit;
in the second driving unit: the third grounding pin, the fourth grounding pin, the test pin, the M dummy pins, the feed pin, the first grounding pin, and the second grounding pin are arranged sequentially in a direction of approaching the first driving unit;
in the third driving unit: the third grounding pin, the first grounding pin, the second grounding pin, and the fourth grounding pin are arranged sequentially in a direction from close to the first driving unit to close to the second driving unit;
the first grounding pin of the first driving unit is electrically connected to the first grounding pin of the third driving unit adjacent thereto, and the second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit;
the first grounding pin of the second driving unit is electrically connected to the second grounding pin of the third driving unit adjacent thereto, and the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit;
the first grounding pin of each of other third driving units is electrically connected to the second grounding pin of the third driving unit adjacent thereto and located therebefore, the second grounding pin of each of other third driving units is electrically connected to the first grounding pin of the third driving unit adjacent thereto and located thereafter, the third grounding pin of each of other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, the fourth grounding pin of each of other third driving units is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter, wherein the other third driving units are third driving units other than the third driving unit adjacent to the first driving unit and the third driving unit adjacent to the second driving unit;
the test pin is electrically connected to the test line, and the test pin is configured to transmit a test signal to the test line during a test phase of the display panel, and ground the test line during a display phase of the display panel;
the feed pin is electrically connected to the common electrode line, and the feed pin is configured to transmit a feed signal or a compensation signal to the common electrode line; and
the fourth grounding pins of the first driving unit and the second driving unit are electrically connected to the silver glue dots through silver glue dot ground lines, and other grounding pins are electrically connected to the peripheral ground line.
Optionally, at least one of the driving units includes 10 dummy pins.
Optionally, each of the driving units includes a plurality of pins, the width of the pin is 16 to 18 microns, and the spacing between any two adjacent pins is 16 to 18 microns.
Optionally, the driving circuit is a chip-on-film circuit.
For clearer descriptions of the principles, technical solutions, and advantages of the present disclosure, embodiments of the present disclosure are further described in detail hereinafter with reference to the accompanying drawings.
A display device usually includes a display panel and a driving circuit, and the driving circuit may be, for example, a chip-on-film (also referred as COF) circuit.
In the current display device, the driving circuit and the display panel are matched and used together according to the pin specifications. A driving circuit with one pin specification can only be applied to a display panel with one pin specification, which makes the driving circuit unable to compatible with display panels with different pin specifications, and the compatibility of the driving circuit is poor. The pin specifications may include the width of the pin, the spacing between adjacent pins, the arrangement of the pins, and the definition of the pins (such as clock pin, grounding pin, etc.) and the like. For example, the driving circuit and the display panel respectively include a plurality of clock pins with the same pin specification, and the plurality of clock pins of the driving circuit and the plurality of clock pins of the display panel are electrically connected in a one-to-one correspondence.
In view of this, embodiments of the present disclosure provide a driving circuit for a display panel, a display panel, and a display device. The driving circuit includes a plurality of driving units, and at least one of the driving units includes M Dummy pins. At least one of the M dummy pins is configured to be electrically connected to at least one clock pin of the display panel. Therefore, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to M, so that the driving circuit may be compatible with any display panel with the number of clock pins less than or equal to M. That is, the driving circuit may be used as a driving circuit for any display panel with the number of clock pins less than or equal to M. The driving circuit has high compatibility. The detailed schemes of the present disclosure are referred to the following embodiments.
Referring to
In summary, in the driving circuit for the display panel according to the present disclosure, at least one of the driving units of the driving circuit includes M dummy pins, and at least one of the M dummy pins is configured to be electrically connected to at least one clock pin of the display panel. Therefore, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to M, and the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps to improve the compatibility of the driving circuit.
Optionally, at least one of the driving units further includes a test pin configured to be electrically connected to a test line of the display panel. The test pin may be configured to transmit a test signal to the test line during a test phase of the display panel and to ground the test line during a display phase of the display panel. For example, as shown in
The test line of the display panel described in the embodiments of the disclosure may be an Array Test (also referred as AT) line. The test line is generally electrically connected to an AT circuit of a display panel motherboard. The display panel motherboard includes a plurality of display panels, the test line is located inside the display panel, and the AT circuit is located outside the display panel. The AT circuit is configured to test the display panel by transmitting a test signal to the display panel through the test line. After the test is completed, the display panel motherboard is generally cut into individual display panels. In the process of cutting, the test line electrically connected to the AT circuit is also cut off, thereby forming a fracture of the test line in the final individual display panel. The fracture is easy to cause static electricity, which is easy to affect or even destroy (for example, breakdown) the display panel. In the embodiments of the present disclosure, since the test line is electrically connected to the test pin of the driving circuit, after the test is completed, the test line may be grounded through the test pin, thereby preventing static electricity from damaging the display panel.
Optionally, at least one of the driving units further includes a feed pin configured to be electrically connected to a common electrode line of the display panel. The feed pin is configured to transmit a feed signal or a compensation signal to the common electrode line, and the compensation signal may be a common electrode signal. For example, as shown in
Optionally, in the driving circuit for the display panel according to the embodiments of the present disclosure, a plurality of driving units are arranged in a target direction F, and the driving units respectively include a grounding pin, and at least one grounding pin of one of any two adjacent driving units is electrically connected to at least one grounding pin of the other driving unit. The display panel may be a rectangular panel. After the driving circuit is electrically connected to the display panel, the driving units may be located on the same side of the display panel and arranged along the same side edge of the display panel. The target direction may be parallel to the side edge. In the embodiments of the present disclosure, since at least one grounding pin of one of any two adjacent driving units in the driving units is electrically connected to at least one grounding pin of the other driving unit, the influence of static electricity on the drive signal of an individual driving unit can be reduced, so that the transmission of the drive signal is more stable.
In an exemplary embodiment, when the driving units includes only the driving unit 01 and the driving unit 02, as shown in
Optionally, as shown in
Optionally, referring to
For example, as shown in
Optionally, the first driving unit and the second driving unit further respectively include a second grounding pin, and the third driving unit further includes a third grounding pin and a fourth grounding pin. The second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit adjacent thereto, the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto. The third grounding pin of each of other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, and the fourth grounding pin of each of other third driving units is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter. The above second grounding pin, third grounding pin, and fourth grounding pin are respectively configured to be electrically connected to the peripheral ground line of the display panel.
In an exemplary embodiment, with continue to refer to
Optionally, in the embodiments of the present disclosure, M=10, that is, at least one driving unit of the driving circuit includes 10 dummy pins. In this way, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to 10, that is, the driving circuit may be compatible with any display panel with the number of clock pins less than or equal to 10. For example, the driving circuit may be compatible with a display panel with 8 clock pins. Currently, the common display panels are 8CLK display panels or 6CLK display panels, and the number of clock pins thereof is less than 10. Therefore, the driving circuit may be compatible with all currently common display panels.
In an exemplary embodiment, referring to
In an exemplary embodiment, referring to
In an exemplary embodiment, referring to
Optionally, with reference to
In the embodiments of the present disclosure, as described above, each of the driving units may include a plurality of pins, the width of each pin is 16 to 18 microns, and the spacing between any two adjacent pins may be 16 to 18 microns. For example, the width of each pin may be 17 microns, and the spacing between any two adjacent pins may be 17 microns, which is not limited in the embodiments of the present disclosure.
Optionally, in the embodiments of the present disclosure, the driving circuit may be a COF circuit. The COF circuit is a circuit formed based on COF technology. COF technology refers to the grain soft film packaging technology that fixes the drive chip on the flexible circuit board. In the COF technology, the flexible circuit board may be used as the carrier of the drive chip. The drive chip is electrically connected to the display panel through the flexible circuit board.
Optionally, before the COF circuit is electrically connected to the display panel, the COF circuit board may be cut according to the width of the pins and distance between the pins of the COF circuit, so that the pins of the COF circuit may be electrically connected to the pins of the display panel. For example, the number of pins of the COF circuit electrically connected to the pins of the display panel may be 1024, the width of each pin may be 17 microns, the distance between any two adjacent pins is 17 microns, and the accuracy fluctuation of cutting may be 5 microns, whereby the cutting size of the COF circuit board (that is, the size of the COF circuit board formed by cutting) may be driven.
Optionally, in the process of electrically connecting the COF circuit with the display panel, the pins of the COF circuit may be aligned with the pins of the display panel. For example, alignment marks may be provided in the display panel and the COF circuit board, and the pins of the display panel and the pins of the COF circuit are aligned according to the alignment marks.
Optionally, in the process of electrically connecting the COF circuit and the display panel, heating is usually needed (for example, heat is generated in the soldering process of the pins of the display panel and the pins of the COF circuit), and the heating process is likely to cause the COF circuit board to expand, which causes the pins of the COF circuit to offset. As a result, the pins of the COF circuit and the pins of the display panel are likely to misalignment, resulting in low reliability of electrical connection between the COF circuit and the display panel. In the embodiments of the present disclosure, the expansion pre-shrinkage value can be set for the pins of the COF circuit to avoid the misalignment of the pins of the COF circuit and the pins of the display panel due to the expansion of the COF circuit, and improve the reliability of the electrical connection between the COF circuit and the display panel.
In summary, in the driving circuit for the display panel according to the present disclosure, at least one of the driving units of the driving circuit includes M dummy pins, and at least one of the M dummy pins is configured to be electrically connected to at least one clock pin of the display panel. Therefore, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to M, and the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps to improve the compatibility of the driving circuit.
Referring to
In summary, the display panel according to the present disclosure includes at least one clock pin which is configured to be electrically connected to at least one of the M dummy pins of at least one driving unit of the driving circuit. Therefore, the driving circuit with M dummy pins may be electrically connected to any display panel with the number of clock pins less than or equal to M, and the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps improve the compatibility of the driving circuit.
Optionally, with continue to refer to
The test line 122 of the display panel according to the embodiments of the disclosure may be an AT line, and the test line is generally electrically connected to the AT circuit of the display panel motherboard. The display panel motherboard includes a plurality of display panels. The test line is located inside the display panel, and the AT circuit is located outside the display panel. The AT circuit is configured to test the display panel by transmitting a test signal to the display panel through the test line. After the test is completed, the display panel motherboard is generally cut into individual display panels. In the process of cutting, the test line electrically connected to the AT circuit is also cut off, thereby forming a fracture of the test line in the final individual display panel. The fracture is easy to cause static electricity, which is easy to affect or even destroy (for example, breakdown) the display panel. In the embodiments of the present disclosure, since the test line is electrically connected to the test pin of the driving circuit, after the test is completed, the test line may be grounded through the test pin, thereby preventing static electricity from damaging the display panel.
Optionally, with continue to refer to
Optionally, with continue to refer to
In summary, the display panel according to the present disclosure includes at least one clock pin configured to be electrically connected to at least one of the M dummy pins of at least one driving unit of the driving circuit. Therefore, the driving circuit with M dummy pins may be electrically connected to any display panel with the number of clock pins less than or equal to M, that is, the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps to improve the compatibility of the driving circuit.
Referring to
In summary, the display device according to the present disclosure includes a display panel and a driving circuit, the driving circuit is located on at least one side of the display panel, and at least one of a plurality of driving units of the driving circuit includes M dummy pins, at least one of the M dummy pins is electrically connected to at least one clock pin of the display panel. Therefore, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to M, and the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps to improve the compatibility of the driving circuit.
Optionally, with continue to refer to
The test line of the display panel described in the embodiments of the disclosure may be AT line, and the test line is generally electrically connected to the AT circuit of the display panel motherboard. The display panel motherboard includes a plurality of display panels. The test line is located inside the display panel, and the AT circuit is located outside the display panel. The AT circuit is configured to test the display panel by transmitting a test signal to the display panel through the test line. After the test is completed, the display panel motherboard is generally cut into individual display panels. In the process of cutting, the test line electrically connected to the AT circuit is also cut off, thereby forming a fracture of the test line in the final individual display panel. The fracture is easy to cause static electricity, which is easy to affect or even destroy (for example, breakdown) the display panel. In the embodiments of the present disclosure, since the test line is electrically connected to the test pin, after the test is completed, the test line may be grounded through the test pin, thereby preventing static electricity from damaging the display panel.
Optionally, with continue to refer to
Optionally, in the driving circuit according to the embodiments of the present disclosure, a plurality of driving units are arranged in the target direction F, and the driving units respectively include grounding pins, and at least one grounding pin of one of any two adjacent driving units is electrically connected to at least one grounding pin of the other driving unit. With continue to refer to
Optionally, with continue to refer to
For example, referring to
Optionally, the first driving unit and the second driving unit further respectively include a second grounding pin, and the third driving unit further includes a third grounding pin and a fourth grounding pin. The second grounding pin of the first driving unit is electrically connected to the third grounding pin of the third driving unit adjacent thereto, the second grounding pin of the second driving unit is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto, and the third grounding pin of each of other third driving units is electrically connected to the fourth grounding pin of the third driving unit adjacent thereto and located therebefore, and the fourth grounding pin is electrically connected to the third grounding pin of the third driving unit adjacent thereto and located thereafter. The above second grounding pin, third grounding pin, and fourth grounding pin are respectively electrically connected to the peripheral ground line.
For example, referring to
Optionally, with continue to refer to
For example, referring to
Optionally, in the embodiments of the present disclosure, M=10, that is, at least one driving unit of the driving circuit includes 10 dummy pins. In this way, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to 10, that is, the driving circuit may be compatible with any display panel with the number of clock pins less than or equal to 10. For example, the driving circuit may be compatible with a display panel with 8 clock pins. Currently common display panels are 8CLK display panels or 6CLK display panels, and the number of clock pins thereof is less than 10. Therefore, the driving circuit can be compatible with all currently common display panels.
Optionally, referring to
In summary, the display device according to the present disclosure includes a display panel and a driving circuit, the driving circuit is located on at least one side of the display panel. At least one of the driving units of the driving circuit includes M dummy pins, at least one of the M dummy pins is electrically connected to at least one clock pin of the display panel. Therefore, the driving circuit may be electrically connected to any display panel with the number of clock pins less than or equal to M, that is, the driving circuit may be compatible with any display panel with the number of clock pins less than M, which helps to improve the compatibility of the driving circuit.
In the present disclosure, the terms “first”, “second”, “third”, “fourth” and other similar descriptions are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance. The term “at least one” refers to one or more, and the term “a plurality of” refers to two or more, unless otherwise expressly defined. The term “and/or” is merely an association relationship that describes the associated objects, indicating that there may be three relationships; for example, A and/or B may indicate three cases where only A exists, A and B exist at the same time, and only B exists. In addition, the character “/” herein generally indicates that the associated objects before and after are in an “or” relationship.
The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modification, equivalent replacement, improvement and the like made within the concept and principle of the present disclosure shall be included within the protection scope of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201921695273.7 | Oct 2019 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2020/119505 | 9/30/2020 | WO |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2021/068844 | 4/15/2021 | WO | A |
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