Patent Application
20090061741
1. Field of the Invention
Embodiments of the present invention as recited by the claims generally relate to a method and processing apparatus for planarizing or polishing a substrate. More particularly, the invention relates to a method and a polishing apparatus for removing conductive material from a semiconductor substrate by electrochemical mechanical polishing.
2. Description of the Related Art
In the fabrication of integrated circuits and other electronic devices on substrates, multiple layers of conductive, semiconductive, and dielectric materials are deposited on or removed from a substrate, such as a semiconductor wafer. As layers of materials are sequentially deposited and removed, the substrate may become non-planar and require planarization, in which previously deposited material is removed from the substrate to form a generally even, planar or level surface. The process is useful in removing undesired surface topography and surface defects, such as rough surfaces, agglomerated materials, crystal lattice damage and scratches. The planarization process is also useful in forming features on the substrate by removing excess deposited material used to fill the features and to provide an even or level surface for subsequent deposition and processing.
Electrochemical Mechanical Planarization (Ecmp) is one exemplary process which is used to remove materials from the substrate. Ecmp typically uses a pad having conductive properties and combines physical abrasion with electrochemical activity that enhances the removal of materials. The pad is attached to an apparatus having a rotating platen assembly that is adapted to couple the pad to a power source. The apparatus also has a substrate carrier, such as a polishing head, that is mounted on a carrier assembly above the pad that holds a substrate. The polishing head places the substrate in contact with the pad and is adapted to provide downward pressure, controllably urging the substrate against the pad. The pad is moved relative to the substrate by an external driving force and the polishing head typically moves relative to the moving pad. A chemical composition, such as an electrolyte, is typically provided to the surface of the pad which enhances electrochemical activity between the pad and the substrate. The Ecmp apparatus may affect abrasive and/or polishing activity from frictional movement while the electrolyte combined with the conductive properties of the pad selectively removes material from the substrate.
Dishing of features and retention of residues on the substrate surface are undesirable since dishing and residues may detrimentally affect subsequent processing of the substrate. For example, dishing results in a non-planar surface that impairs the ability to print high-resolution lines during subsequent photolithographic steps and detrimentally affects subsequent surface topography of the substrate, which affects device formation and yields. Dishing also detrimentally affects the performance of devices by lowering the conductance and increasing the resistance of the devices, causing device variability and device yield loss. Residues may lead to uneven polishing of subsequent materials, such as barrier layer materials (not shown) disposed between the conductive material and the substrate surface. Post CMP profiles generally show higher dishing on wide trenches than on narrow trenches or dense areas. Uneven polishing will also increase defect formation in devices and reduce substrate yields.
The proper formation of a uniform passivation layer plays an extremely important role in achieving uniform polishing of a substrate surface. In copper Ecmp, for example, copper film needs to be passivated so that protrusions are removed while the recesses are protected. Failure to form a uniform passivation layer prior to polishing results in a higher removal rate of material at the weak point of the non-uniform passivation layer, leading to local planarity loss and killer defects such as dishing. Thus, it is very critical to form a uniform passivation layer on the copper surface before the main polish begins.
Therefore, there is a need for compositions and methods for removing conductive material, such as excess copper material, from a substrate that minimize the formation of topographical defects to the substrate during planarization.
Embodiments of the invention as generally recited in the claims generally relate to a method and processing apparatus for planarizing or polishing a substrate. More particularly, the invention relates to a method and a polishing apparatus for removing conductive material from a semiconductor substrate by electrochemical mechanical polishing. In certain embodiments a method for electro polishing a substrate having a conductive layer disposed thereon is provided. The substrate is coupled with a planarizing head and moved to a position above a polishing pad assembly. The planarizing head is positioned relative to the polishing pad assembly without applying a voltage to the substrate. A first voltage is applied to the substrate for a first time period. A second voltage is applied to the substrate for a second time period in order to remove a portion of the conductive layer, wherein the second voltage is greater than the first voltage.
In certain embodiments a method for electro polishing a substrate having a conductive layer disposed thereon is provided. The substrate is coupled with a planarizing head. The planarizing head is adjusted so the substrate contacts a surface of a polishing pad assembly at a first processing position without the application of voltage to the substrate. A passivation layer is formed on the conductive layer of the substrate. The planarizing head is swept from the first processing position to a second processing position. A first voltage is applied to the substrate in order to increase the uniformity of the passivation layer. A second voltage is applied to the substrate to remove a portion of the conductive layer, wherein the second voltage is greater than the first voltage.
In certain embodiments a method for electro polishing a substrate is provided. A substrate is loaded onto a planarizing head. The planarizing head is mechanically stabilized. A first voltage is applied to the substrate for a first time period. A second voltage is applied to the substrate for a second time period in order to remove a portion of the conductive layer, wherein the second voltage is greater than the first voltage.
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to certain embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only certain embodiments and are therefore not to be considered limiting of its scope.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and/or process steps of one or more embodiments may be beneficially incorporated in one or more other embodiments without additional recitation.
The words and phrases used in the present invention should be given their ordinary and customary meaning in the art by one skilled in the art unless otherwise further defined. Certain embodiments provide a method and processing apparatus for removal of conductive and barrier materials from a substrate.
As used herein, the term “electrochemical mechanical polishing” (Ecmp) generally refers to planarizing a substrate by the application of electrochemical activity, mechanical activity, and chemical activity to remove material from a substrate surface.
As used herein, the term “electro polishing” generally refers to planarizing a substrate by the application of electrochemical activity.
As used herein, the term “anodic dissolution” generally refers to the application of an anodic bias to a substrate directly or indirectly which results in the removal of conductive material from a substrate surface and into a surrounding polishing composition.
As used herein, the term “polishing composition” generally refers to a composition that provides ionic conductivity, and thus, electrical conductivity, in a liquid medium, which generally comprises materials known as electrolyte components.
As used herein, the term “substrate” generally refers to any substrate or material surface formed on a substrate upon which film processing is performed, such as silicon wafers used in semiconductor processing. For example, a substrate on which processing can be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon doped silicon oxides, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Barrier layers, metals or metal nitrides on a substrate surface include titanium, titanium nitride, tungsten nitride, tantalum and tantalum nitride. Substrates may have various dimensions, such as 200 mm or 300 mm diameter wafers, as well as, rectangular or square panes.
A controller 108 is provided to facilitate control and integration of the modules of the system 100. The controller 108 comprises a central processing unit (CPU) 110, a memory 112, and support circuits 114. The controller 108 is coupled to the various components of the system 100 to facilitate control of, for example, the planarizing, cleaning, and transfer processes.
The factory interface 102 generally includes a cleaning module 116 and one or more wafer cassettes 118. An interface robot 120 is employed to transfer substrates 122 between the wafer cassettes 118, the cleaning module 116 and an input module 124. The input module 124 is positioned to facilitate transfer of substrates 122 between the planarizing module 106 and the factory interface 102 by grippers, for example vacuum grippers or mechanical clamps.
The planarizing module 106 includes at least a first electrochemical mechanical planarizing (Ecmp) station 128, disposed in an environmentally controlled enclosure 188. Examples of planarizing modules 106 that can be adapted to benefit from the invention include MIRRA®, MIRRA MESA™, REFLEXION®, REFLEXION® LK, and REFLEXION LK Ecmp™ Chemical Mechanical Planarizing Systems, all available from Applied Materials, Inc. of Santa Clara, Calif. Other planarizing modules, including those that use processing pads, planarizing webs, or a combination thereof, and those that move a substrate relative to a planarizing surface in a rotational, linear or other planar motion may also be adapted to benefit from the invention.
In the embodiment depicted in
The exemplary planarizing module 106 also includes a transfer station 136 and a carousel 134 that are disposed on an upper or first side 138 of a machine base 140. In certain embodiments, the transfer station 136 includes an input buffer station 142, an output buffer station 144, a transfer robot 146, and a load cup assembly 148. The input buffer station 142 receives substrates from the factory interface 102 by means of the loading robot 104. The loading robot 104 is also utilized to return polished substrates from the output buffer station 144 to the factory interface 102. The transfer robot 146 is utilized to move substrates between the buffer stations 142, 144 and the load cup assembly 148.
In certain embodiments, the transfer robot 146 includes two gripper assemblies, each having pneumatic gripper fingers that hold the substrate by the substrate's edge. The transfer robot 146 may simultaneously transfer a substrate to be processed from the input buffer station 142 to the load cup assembly 148 while transferring a processed substrate from the load cup assembly 148 to the output buffer station 144. An example of a transfer station that may be used to advantage is described in U.S. Pat. No. 6,156,124, entitled WAFER TRANSFER STATION FOR A CHEMICAL MECHANICAL POLISHER, issued Dec. 5, 2000 to Tobin, which is herein incorporated by reference in its entirety.
The carousel 134 is centrally disposed on the base 140. The carousel 134 typically includes a plurality of arms 150, each supporting a planarizing head assembly 152. Two of the arms 150 depicted in
During the actual polishing, the planarizing head assemblies 152 are positioned at and above the respective polishing stations 128, 130, and 132, each having an independently rotatable platen assembly 230 supporting a polishing pad assembly 204 whose surface is wetted with a polishing composition which acts as the media for polishing the substrate. During polishing, the planarizing head assembly 152 oscillates along the respective radii of the carousel 134 so that the associated planarizing heads 152 move along a diameter of a respective polishing pad assembly 204. In a typical polishing process, the sweep axis of a planarizing head 152 is aligned to the center of the polishing pad assembly 204.
In certain embodiments, the polishing pad assembly 204 includes interposed pad 212 sandwiched between a conductive pad 210 and an electrode 214. The conductive pad 210 is substantially conductive across its top processing surface and is generally made from a conductive material or a conductive composite (i.e., the conductive elements are dispersed integrally with or comprise the material comprising the planarizing surface), such as a polymer matrix having conductive particles dispersed therein or a conductive coated fabric, among others. The conductive pad 210, the interposed pad 212, and the electrode 214 may be fabricated into a single, replaceable assembly. The polishing pad assembly 204 is generally permeable or perforated to allow electrolyte to pass between the electrode 214 and top surface 220 of the conductive pad 210. The polishing pad assembly 204 is perforated by apertures 222 to allow electrolyte to flow therethrough.
In certain embodiments, the conductive pad 210 comprises a conventional polishing material, such as polymer based pad materials compatible with the process chemistry, examples of which include polyurethane, polycarbonate, fluoropolymers, PTFE, PTFA, polyphenylene sulfide (PPS), or combinations thereof. The conventional polishing material may be coated, doped, or impregnated with a process compatible conductive material and/or particles. Alternatively, the conductive pad 210 may be a conductive polymer, such as conductive filler material disposed in a conductive polymer matrix, such as fine tin particles in a polyurethane binder, or a conductive fabric, such as carbon fibers in a polyurethane binder. In certain embodiments, the conductive pad 210 is comprised of a conductive material disposed on a polymer matrix disposed on a conductive fiber, for example, tin particles in a polymer matrix disposed on a woven copper coated polymer. Other conductive materials include stainless steel, aluminum, gold, silver, copper, and nickel, among others.
In another embodiment, the conductive pad 210 comprises removal particles adapted to facilitate material removal from the deposit receiving side of the substrate. In certain embodiments, the removal particle are conductive particles, such as particles of tin, copper, nickel, silver, gold, or combinations thereof, in a conductive polymer matrix. In another embodiment, the removal particles are abrasive particles, such as aluminum, ceria, oxides thereof and derivatives thereof, and combinations thereof, in a conductive polymer matrix. In yet another embodiment, the removal particles are a combination of abrasive and conductive particles as described herein and are interspersed within the conductive material.
A conductive foil 216 may additionally be disposed between the conductive pad 210 and the interposed pad 212. The foil 216 is coupled to a power source 242 and provides uniform distribution of voltage applied by the source 242 across the conductive pad 210. In embodiments not including the conductive foil 216, the conductive pad 210 may be coupled directly, for example, via a terminal integral to the pad 210, to the power source 242. Additionally, the pad assembly 204 may include an interposed pad 218, which, along with the foil 216, provides mechanical strength to the overlying conductive pad 210. Examples of suitable pad assemblies are described in U.S. Pat. No. 6,991,528, issued Jan. 31, 2006, entitled CONDUCTIVE POLISHING ARTICLE FOR ELECTROCHEMICAL MECHANICAL POLISHING, U.S. patent application Ser. No. 10/455,895, filed Jun. 6, 2003, published as US2004-0020789, and entitled CONDUCTIVE POLISHING ARTICLE FOR ELECTROCHEMICAL MECHANICAL POLISHING, and U.S. patent application Ser. No. 11/327,527, filed Jan. 1, 2005, entitled FULLY CONDUCTIVE PAD FOR ELECTROCHEMICAL MECHANICAL PROCESSING, all of which are hereby incorporated by reference in their entirety.
The power source 242 generally provides a positive electrical bias to the pad 210 during processing. Between planarizing substrates, the power source 242 generally applies a negative bias to the pad 210 to minimize attack on the pad 210 by process chemistries.
The planarizing head assembly 152 generally comprises a drive system 202 coupled to a planarizing head 152. The drive system 202 generally provides at least rotational motion to the planarizing head 152. The planarizing head 152 additionally may be actuated toward the first Ecmp station 128 such that the substrate 122 retained in the planarizing head 152 may be disposed against the planarizing surface 126 of the first Ecmp station 128 during processing. The drive system 202 is coupled to the controller 108 that provides a signal to the drive system 202 for controlling the rotational speed and direction of the planarizing head 152.
In certain embodiments, the planarizing head may be a TITAN HEAD™ or TITAN PROFILER™ wafer carrier available from Applied Materials, Inc. of Santa Clara, Calif. Generally, the planarizing head 152 comprises a housing 223 and retaining ring 224 that defines a center recess in which the substrate 122 is retained. The retaining ring 224 circumscribes the substrate 122 disposed within the planarizing head 152 to prevent the substrate from slipping out from under the planarizing head 152 while processing. The retaining ring 224 can be made of plastic materials such as PPS, PEEK, and the like, or conductive materials such as stainless steel, Cu, Au, Pd, and the like, or some combination thereof. It is further contemplated that a conductive retaining ring 224 may be electrically biased to control the electric field during Ecmp. Conductive or biased retaining rings tend to slow the polishing rate proximate the edge of the substrate. It is contemplated that other planarizing heads may be utilized.
The second Ecmp station 130 generally includes a platen assembly 230 that is rotationally disposed on the base 140. The platen assembly 230 is supported above the base 140 by a bearing (not shown) so that the platen assembly 230 may be rotated relative to the base 140. An area of the base 140 circumscribed by the bearing is open and provides a conduit for the electrical, mechanical, pneumatic, control signals and connections communicating with the platen assembly 230.
Conventional bearings, rotary unions and slip rings, collectively referred to as rotary coupler (not shown), are provided such that electrical, mechanical, fluid, pneumatic, control signals and connections may be coupled between the base 140 and the rotating platen assembly 230. The platen assembly 230 is typically coupled to a motor 248 that provides the rotational motion to the platen assembly 230. The motor 248 is coupled to the controller 108 that provides a signal for controlling for the rotational speed and direction of the platen assembly 230.
Methods are provided for planarizing or polishing a substrate. More particularly, methods are provided for removing conductive material from a semiconductor substrate by electrochemical mechanical polishing.
At step 310, a substrate is loaded into a process apparatus. At step 320, the planarizing head is mechanically stabilized. At step 330, an electrochemical removal process is performed on the substrate 122. It was discovered that the method 300 yields the formation of a more uniform passivation layer on the conductive layer of the substrate. The increased uniformity of the passivation layer increases the uniformity of the subsequent substrate planarization process.
In certain embodiments, at step 312, the substrate 122 is coupled with the planarizing head 152. In certain embodiments, the planarizing head 152 comprises a flexible membrane providing a mounting surface configured to receive the substrate 122 from the backside. The flexible membrane may have one or more chambers connected to a fluid source. When the fluid, such as air, is pumped into the chambers, the volume of the chambers will increase and the flexible membrane will be forced downward. When the fluid is pumped out of the chambers, the volume of the chambers will decrease and the flexible membrane will move upward. To load the substrate 122, the planarizing head 152 generally moves to a position where the flexible membrane of the planarizing head 152 is positioned adjacent the back side of the substrate 122. In certain embodiments a seal is formed between the planarizing head 152 and the substrate 122. Fluid may then be pumped out of the chamber to create a low pressure pocket between the mounting surface of the flexible membrane and the back side of the substrate. This low pressure pocket will vacuum chuck the substrate to the planarizing head.
At step 314 the substrate 122 coupled with the planarizing head 152 is moved over the polishing pad assembly 204 disposed in the first Ecmp station 128.
At step 320 the polishing head 244 is mechanically stabilized. During the mechanical stabilization step 320 the substrate is prepared for processing without the application of power to the substrate. The application of power while contacting the substrate 122 with the polishing pad 204 has been found to damage the passivation layer formed on the conductive layer and lead to non-uniform polishing of the substrate 122.
At step 322, the planarizing head 152 is positioned relative to the polishing pad assembly 204. In certain embodiments, the planarizing head 152 is lowered toward the polishing pad assembly 204 to place the substrate 122 in contact with the polishing pad assembly 204. In certain embodiments, during step 322, the substrate 122 is also exposed to the electrolyte and formation of the passivation layer on the conductive layer of the substrate begins. The electrolyte is flown into a basin (not shown) and in contact with both the surface of the substrate 122 and the polishing pad assembly 204, while the planarizing head 152 places the substrate 122 in contact with the polishing pad assembly 204. When current is applied, the electrolyte establishes an electrically conductive path between the substrate 122 and the electrode 214. In certain embodiments, the electrolyte comprises at least one of sulfuric acid, phosphoric acid, ammonium citrate, and a corrosion inhibitor. Examples of suitable polishing compositions and methods for bulk electrochemical processes are described in U.S. Pat. No. 7,128,825, entitled METHOD AND COMPOSITION FOR POLISHING A SUBSTRATE, issued Oct. 31, 2006 to Liu et al. and U.S. patent application Ser. No. 11/356,352, entitled METHOD AND COMPOSITION FOR POLISHING A SUBSTRATE, published as U.S. 2006-0169597, both of which are herein incorporated by reference to the extent not inconsistent with the current application. In certain embodiments, the substrate 122 contacts the polishing pad assembly 204 after addition of the electrolyte. In certain embodiments, the substrate 122 contacts the polishing pad assembly 204 prior to the addition of the electrolyte.
A passivation layer forms on the conductive layer of the substrate 122 from the exposure of the surface of the substrate 122 to corrosion inhibitors and/or other materials capable of forming a passivation or insulating film. The thickness and density of the passivation layer can dictate the extent of chemical reactions and/or amount of anodic dissolution. For example, a thicker or denser passivation layer has been observed to result in less anodic dissolution compared to thinner and less dense passivation layers. Thus, control of the composition and concentration of passivating agents, corrosion inhibitors and/or chelating agents, allows for customized removal rates and amounts of material removed from the substrate surface. The passivation layer facilitates uniform removal of material from the surface of the substrate 122.
The substrate 122 is urged against the pad assembly 204 with a force of less than about 2 pounds per square inch (psi). In certain embodiments, the surface of the substrate 122 and the polishing pad assembly 204 are contacted at a pressure less than about 2 pounds per square inch (lb/in2 or psi) (13.8 kPa). The contact pressure may include a pressure of about 1 psi (6.9 kPa) or less, for example, between about 0.01 psi (69 Pa) and about 1 psi (6.9 kPa), such as between about 0.1 (0.7 kPa) psi and about 0.8 psi (5.5 kPa) or between about 0.1 (0.7 kPa) psi and about 0.5 psi (3.4 kPa). In certain aspects of the process, a pressure of about 0.3 psi (2.1 kPa) or about 0.2 psi (1.4 kPa) may be used during processing.
In certain embodiments, the substrate 122 is urged against the polishing pad assembly 204 at a position from which the processing or polishing of substrate 122 will commence. For example, if the process performed involves sweeping the wafer against the surface of the polishing pad assembly from 5.00-6.00 inches, the substrate will contact the polishing pad at a position of 5.00 inches from which polishing commences and the substrate 122 will be moved to a second position of 6.00 inches. The substrate 122 will then be moved back to the first processing position of 5.00 inches.
In certain embodiments, at step 324, the planarizing head 152 coupled with the substrate 122 is moved back and forth while contacting the surface of the polishing pad assembly 204. This process is referred to as a “sweep.” During the “sweep,” the planarizing head 152 oscillates along the respective radii of the carousel 134 so that the planarizing heads 152 moves along a diameter of a respective polishing pad assembly 204. In certain embodiments, as shown in
In step 326, relative motion is provided between the surface of the substrate 122 and the polishing pad assembly 204. The polishing pad assembly 204 disposed on the platen assembly 230 is rotated at a platen rotational rate of between about 4 rpm and about 80 rpm, such as between about 5 rpm and about 40 rpm, for example, about 7 rpm, and the substrate coupled with the planarizing head 152 is rotated at a planarizing head rotational rate between about 5 rpm and about 80 rpm, such as between about 6 rpm and about 50 rpm, for example, about 15 rpm. The respective rotational rates of the platen assembly 230 and planarizing head 152 are believed to provide reduced shear forces and frictional forces when contacting the polishing article and substrate.
In certain embodiments, the planarizing head rotational speed may be greater than a platen assembly rotational speed by a ratio of planarizing head rotational speed to platen assembly rotational speed of greater than about 1:1, such as a ratio of planarizing head rotational speed to platen assembly rotational speed between about 1.2:1 and about 12:1, for example between about 1.5:1 and about 3:1, to remove material from the surface of the substrate.
In certain embodiments, step 324 and step 326 occur simultaneously. For example, relative motion is provided between the surface of the substrate 122 and the polishing pad assembly 204 while the substrate 122 is swept across the surface of the polishing pad assembly 204. In certain embodiments, step 324 and step 326 occur prior to the surface of the substrate 122 contacting the surface of the polishing pad assembly 204. A combination of contact and relative motion between the substrate 122 and the polishing pad assembly 204 provide mechanical abrasion that may allow a region of non-passivated conductive material to be removed and/or exposed to a bias for removal by anodic dissolution.
In step 330, an electrochemical removal process is performed on the substrate 122. At step 332 a first voltage is applied to the substrate 122 for a first time period. In certain embodiments, the first voltage may be a low ramp-up voltage. This application of a low voltage before the main polish step allows for the formation of a thicker, denser, and more uniform passivation layer. In certain embodiments, the first voltage may be between about 1.5 volts and about 3 volts, for example about 2.4 volts. In certain embodiments application of the first voltage to the substrate does not occur until after the substrate 122 has contacted the polishing pad assembly 204. In certain embodiments, application of the first voltage to the substrate may occur prior to the substrate 122 contacting the polishing pad assembly 204. In certain embodiments, the application of the first voltage may occur prior to, during, or after step 324 and/or step 326.
At step 334, a second voltage is applied to the substrate for a second time period in order to electrochemically remove a portion of the conductive layer of the substrate, wherein the second voltage is greater than the first voltage. In certain embodiments, step 334 may comprise a bulk removal process that produces anodic dissolution of the conductive material from the surface of the substrate 122 at a current density between about 0.001 milliamps/centimeter (mA/cm2) and about 100 mA/cm2 which correlates to an applied current of up to about 40 amps to process substrates with a diameter up and about 300 mm. For example, a 200 mm diameter substrate may have a current density between about 0.01 mA/cm2 and about 50 mA/cm2, which correlates to an applied current between about 0.01 A and about 20 A. The invention also contemplates that the bias may be applied and monitored by volts, amps and watts. For example, in certain embodiment, the power supply may apply a power between about 0.01 watts and 100 watts, a voltage between about 0.01 V and about 10 V, and a current between about 0.01 amps and about 10 amps. The bias between about 2.6 volts and about 3.5 volts, such as 3 volts, may be used as the applied bias in the first electrochemical processing step. In certain embodiments step 334 also includes a residual removal step where residual conductive material is removed from the surface of the substrate 122 after the bulk removal step.
One exemplary bias application process is described in U.S. patent application Ser. No. 11/355,769, filed on Feb. 15, 2006, entitled METHOD FOR ELECTROCHEMICALLY POLISHING A CONDUCTIVE MATERIAL ON A SUBSTRATE, which application is incorporated herein by reference to the extent not inconsistent with the claimed aspects and description herein.
Without intending to be limited by any particular theory, placing the substrate in a processing position prior to applying power to the substrate allows for the formation of a more uniform passivation layer on conductive material. A more uniform passivation layer leads to increased uniformity of planarization during the subsequent planarization process.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
