The present invention relates to an electronic component including an inductor and a capacitor, a method of manufacturing an electronic component, a filter module including an electronic component, and an electronic device including a filter module.
In the electronic component in Japanese Unexamined Patent Application Publication No. 2019-186696, a conductor layer for forming an inductor and a conductor layer for forming a capacitor are formed on a single layer. In addition, in the electronic component in Japanese Unexamined Patent Application Publication No. 2019-186696, conductor layers for forming an inductor formed on different layers are connected in parallel to each other.
In a structure that improves the Q values of inductors by connecting the inductors in parallel to each other as in the electronic component described in Japanese Unexamined Patent Application Publication No. 2019-186696, the volumetric efficiency of the inductors is low. Accordingly, to obtain inductors with high Q values, the size of the electronic component is increased, and in an electronic component having a limited external size, the effect of improving the Q values of the inductors is low.
Accordingly, preferred embodiments of the present invention provide electronic components each having a small size but also including a capacitor and an inductor with a high Q value. Preferred embodiments of the present invention also provide methods of manufacturing electronic components, filter modules including electronic components, and electronic devices including filter modules.
An electronic component according to an aspect of a preferred embodiment of the present disclosure includes a first insulator layer including thereon a first conductor pattern to define an inductor and a first electrode pattern to define a capacitor, and a second insulator layer including thereon a second conductor pattern to define the inductor and a second electrode pattern to define the capacitor. In addition, the first electrode pattern and the second electrode patter face each other across the second insulator layer to define the capacitor, and the second conductor pattern is electrically connected to the first conductor pattern along the first conductor pattern.
In the structure described above, since the second conductor pattern is electrically connected to the first conductor pattern along the first conductor pattern, the occupancy rate of the conductors of the inductor per unit volume is high. Accordingly, an inductor having a high Q value is obtained. In addition, since the first electrode pattern and the second electrode pattern defining the capacitor face each other across a single insulator layer, the occupancy rate of the electrodes of the capacitor obtained per unit volume does not decrease.
A method of manufacturing an electronic component according to an aspect of a preferred embodiment of the present invention includes simultaneously forming a first conductor pattern for forming an inductor and a first electrode pattern for forming a capacitor on a first insulator layer, forming a second insulator layer on a surface of the first insulator layer on which the first conductor pattern was formed, the second insulator layer including a cavity above the first conductor pattern, and forming a second conductor pattern for forming the inductor in the cavity and on the second insulator layer and forming a second electrode pattern for forming the capacitor at a position facing the first electrode pattern across the second insulator layer.
Since the manufacturing method can simultaneously form the second electrode pattern and the second conductor pattern on the second insulator layer and in the cavity, the electronic component can manufacture with a small number of steps.
A filter module according to an aspect of a preferred embodiment of the present disclosure includes the electronic component according to a preferred embodiment of the present invention, and an inductor or a capacitor connected to the inductor or the capacitor of the electronic component.
An electronic device according to an aspect of a preferred embodiment of the present disclosure includes an electronic component according to a preferred embodiment of the present invention or a filter module according to a preferred embodiment of the present invention.
According to preferred embodiments of the present invention, it is possible to obtain electronic components that are each small but including a capacitor and an inductor with a high Q value, methods of manufacturing electronic components, filter modules including electronic components, and electronic devices including filter modules.
The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings.
A plurality of preferred embodiments of the present invention will be described below with several specific examples with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals. For ease of the description or understanding of the main points, a plurality of preferred embodiments will be described for convenience of description, but partial replacement or combinations of the structures illustrated in different preferred embodiments is possible. In the second and subsequent preferred embodiments, the descriptions of matters that are identical to those in the first preferred embodiment will be omitted, and only the differences will be described. In particular, the same operation and effect due to the same structure are not described for each of the preferred embodiments.
This electronic component 11 includes a first insulator layer S1, a second insulator layer S2, and a third insulator layer S3. A terminal electrode is formed on the lower surface of the first insulator layer S1. A first conductor pattern CL11 for forming an inductor and a first electrode pattern EC11 for forming a capacitor are formed on the upper surface of the first insulator layer S1. A second conductor pattern CL12 for forming the inductor and a second electrode pattern EC12 for forming the capacitor are formed on the upper surface of the second insulator layer S2. The second conductor pattern CL12 is also formed in the second insulator layer S2. That is, the second conductor pattern CL12 includes a portion formed on the upper surface of the second insulator layer S2 and a portion formed in the second insulator layer S2. A third insulator layer S3 that covers the second insulator layer S2, the second conductor pattern CL12, and the second electrode pattern EC12 is formed on the upper surface of the second insulator layer S2.
The first electrode pattern EC11 and the second electrode pattern EC12 face each other across the second insulator layer S2. In this structure, the first electrode pattern EC11, the second electrode pattern EC12, and the second insulator layer S2 define the capacitor.
The second conductor pattern CL12 formed on the second insulator layer S2 has a shape that is continuous along the first conductor pattern CL11. In the present preferred embodiment, the second conductor pattern CL12 is electrically connected to the first conductor pattern CL11 in the thickness direction of the second insulator layer S2 over the entire length of extension (see
As described above, the filter module can be formed by including the electronic component illustrated in
Next, a non-limiting example of a method of manufacturing the electronic component 11 will be explained.
First, as illustrated in
Next, as illustrated in
After that, the film PP of the photosensitive conductive paste is developed and sintered to form the first conductor pattern CL11 and the first electrode pattern EC11 as illustrated in FIG. 5C.
First, as illustrated in
Next, as illustrated in
After that, the film S2P of the photosensitive insulating paste is developed and sintered to form a second insulator layer S2 including a cavity AP, as illustrated in
First, as illustrated in
Next, as illustrated in
After that, the film PP of the photosensitive conductive paste is developed and sintered to form the second conductor pattern CL12 and the second electrode pattern EC12 as illustrated in
Finally, as illustrated in
Since the method of manufacturing the electronic component illustrated above can form the second electrode pattern EC12 and the second conductor pattern CL12 simultaneously on the second insulator layer S2 and in the cavity AP, the electronic component can be manufactured in a small number of steps.
Although the manufacturing method that uses a photomask is described above, methods of manufacturing electronic components according to preferred embodiments of the present invention are not limited to this manufacturing method. For example, the electronic component may be manufactured by a method of laminating insulating sheets by applying a step of forming an electrode pattern by screen printing or a step of filling a hole of an insulating layer created by a laser with a via electrode.
Next, several modifications of overlapping of the first conductor pattern CL11 and the second conductor pattern CL12 will be described.
On the other hand, in the example illustrated in
In any of the electronic components illustrated in
The inner peripheral portions of the first conductor pattern CL11 and the second conductor pattern CL12 that define the inductor have a higher current density due to proximity effects. Accordingly, as illustrated in
In a second preferred embodiment, an example of an electronic component including the plurality of first conductor patterns, a plurality of second conductor patterns, and three or more first electrode patterns or second electrode patterns will be described.
This electronic component 12A includes insulator layers Sa, Sb, Sc, and Sd. A terminal electrode is formed on the lower surface of the insulator layer Sa. A conductor pattern CL1a and an electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. A conductor pattern CL1b and an electrode pattern EC1b are formed on the upper surface of the insulator layer Sb. The conductor pattern CL1b is also formed in the insulator layer Sb. That is, the conductor pattern CL1b includes a portion formed on the upper surface of the insulator layer Sb and a portion formed in the insulator layer Sb. A conductor pattern CL1c and an electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. The conductor pattern CL1c is also formed in the insulator layer Sc. That is, the conductor pattern CL1c includes a portion formed on the upper surface of the insulator layer Sc and a portion formed in the insulator layer Sc. The insulator layer Sd that covers the insulator layer Sc, the conductor pattern CL1c, and the electrode pattern EC1c is formed on the upper surface of the insulator layer Sc.
This electronic component 12A includes the insulator layers Sa, Sb, Sc, and Sd. A terminal electrode is formed on the lower surface of the insulator layer Sa. The conductor pattern CL1a and the electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. The conductor pattern CL1b and the electrode pattern EC1b are formed on the upper surface of the insulator layer Sb. The conductor pattern CL1c is formed in the insulator layer Sb. The conductor pattern CL1c and the electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. The conductor pattern CL1c is formed in the insulator layer Sc. The insulator layer Sd that covers the insulator layer Sc, the conductor pattern CL1c, and the electrode pattern EC1c is formed on the upper surface of the insulator layer Sc.
In the pair of conductor patterns CL1a and CL1b, the conductor pattern CL1a corresponds to the first conductor pattern, the conductor pattern CL1b corresponds to the second conductor pattern, the insulator layer Sa corresponds to the first insulator layer, the insulator layer Sb corresponds to the second insulator layer, and the insulator layer Sc corresponds to the third insulator layer. In addition, in the pair of conductor patterns CL1b and CL1c, the conductor pattern CL1b corresponds to the first conductor pattern, the conductor pattern CL1c corresponds to the second conductor pattern, the insulator layer Sb corresponds to the first insulator layer, the insulator layer Sc corresponds to the second insulator layer, and the insulator layer Sd corresponds to the third insulator layer.
In the pair of electrode patterns EC1a and EC1b, the electrode pattern EC1a corresponds to the first electrode pattern and the electrode pattern EC1b corresponds to the second electrode pattern. In addition, in the pair of electrode patterns EC1b and EC1c, the electrode pattern EC1b corresponds to the first electrode pattern and the electrode pattern EC1c corresponds to the second electrode pattern.
The conductor pattern CL1b is continuous along the conductor pattern CL1a, and the conductor pattern CL1c is continuous along the conductor pattern CL1b. A conductor pattern CL1b portion formed in the insulator layer Sb is connected to the conductor pattern CL1a over the entire length of extension of the conductor pattern CL1b in plan view. A conductor pattern CL1c portion formed in the insulator layer Sc is connected to the conductor pattern CL1b over the entire length of extension of the conductor pattern CL1c in plan view. The conductor patterns CL1a, CL1b, and CL1c define the inductor. In addition, the electrode patterns EC1a, EC1b, and EC1c and the insulator layers Sb and Sc define the capacitor.
This electronic component 12B includes the insulator layers Sa, Sb, Sc, Sd, and Se. A terminal electrode is formed on the lower surface of the insulator layer Sa. The conductor pattern CL1a and the electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. The electrode pattern EC1b is formed on the upper surface of the insulator layer Sb. The conductor pattern CL1b is formed on the upper surface of the insulator layer Sb and in the insulator layer Sb. The conductor pattern CL1c and the electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. A via conductor V that electrically connects an end portion of the conductor pattern CL1b and an end portion of the conductor pattern CL1c to each other is formed in the insulator layer Sc. An electrode pattern EC1d is formed on the upper surface of the insulator layer Sd. A conductor pattern CL1d is formed on the upper surface of the insulator layer Sd and in the insulator layer S. An insulator layer Se that covers the insulator layer Sd, the conductor pattern CL1d, and the electrode pattern EC1d is formed on the upper surface of the insulator layer Sd.
In the pair of conductor patterns CL1a and CL1b, the conductor pattern CL1a corresponds to the first conductor pattern, the conductor pattern CL1b corresponds to the second conductor pattern, the insulator layer Sa corresponds to the first insulator layer, the insulator layer Sb corresponds to the second insulator layer, and the insulator layer Sc corresponds to the third insulator layer. In addition, in the pair of conductor patterns CL1c and CL1d, the conductor pattern CL1c corresponds to the first conductor pattern, the conductor pattern CL1d corresponds to the second conductor pattern, the insulator layer Sc corresponds to the first insulator layer, the insulator layer Sd corresponds to the second insulator layer, and the insulator layer Se corresponds to the third insulator layer.
In the pair of electrode patterns EC1a and EC1b, the electrode pattern EC1a corresponds to the first electrode pattern and the electrode pattern EC1b corresponds to the second electrode pattern. In addition, in the pair of electrode patterns EC1c and EC1d, the electrode pattern EC1c corresponds to the first electrode pattern and the electrode pattern EC1d corresponds to the second electrode pattern.
The conductor pattern CL1b is continuous along the conductor pattern CL1a, and the conductor pattern CL1d is continuous along the conductor pattern CL1c. A conductor pattern CL1b portion formed in the insulator layer Sb is connected to the conductor pattern CL1a over the entire length of extension of the conductor pattern CL1b in plan view. A conductor pattern CL1d portion formed in the insulator layer Sd is connected to the conductor pattern CL1c over the entire length of extension of the conductor pattern CL1d in plan view. In addition, the conductor patterns CL1a, CL1b, CL1c, and CL1d define the inductor. In addition, the electrode patterns EC1a, EC1b, EC1c, and EC1d and the insulator layers Sb, Sc, and Sd define the capacitor.
In a third preferred embodiment, an example of a filter module will be described.
As illustrated in
As illustrated in
The inductor L2 includes conductor patterns CL2, which are formed in the multilayer body 1 including the plurality of insulator layers, and the inductor Lg includes conductor patterns CLg, which are formed in the multilayer body 1 including the plurality of insulator layers.
The capacitor C1 includes the electrode patterns EC1 facing each other in the lamination direction of the plurality of insulator layers, and the insulator layers sandwiched between these electrode patterns EC1. In addition, the capacitor C2 includes electrode patterns EC2 facing each other in the lamination direction of a plurality of insulator layers and the insulator layers sandwiched between these electrode patterns.
The conductor patterns CL2 include conductor patterns CL2a, CL2b, CL2c, and CL2d illustrated in
The conductor pattern CL2b for forming the inductor has a shape that is continuous along the conductor pattern CL2a. A conductor pattern CL2b portion formed in the insulator layer S5 is connected to the conductor pattern CL2a over the entire length of extension of the conductor pattern CL2b in plan view. Similarly, the conductor pattern CL2d has a shape that is continuous along the conductor pattern CL2c. A conductor pattern CL2d portion formed in the insulator layer S7 is connected to the conductor pattern CL2c over the entire length of extension of the conductor pattern CL2d in plan view. The conductor pattern CLgd has a shape that is continuous along the conductor pattern CLgc. A conductor pattern CLgd portion formed in the insulator layer S17 is connected to the conductor pattern CLgc over the entire length of extension of the conductor pattern CLgd in plan view. The conductor pattern CLgb has a shape that is continuous along the conductor pattern CLga. A conductor pattern CLgb portion formed in the insulator layer S14 is connected to the conductor pattern CLga over the entire length of extension of the conductor pattern CLgb in plan view.
Ends of the conductor patterns CL2a and CL2b and ends of the conductor patterns CL2c and CL2d are connected to each other via the via conductor V. In addition, ends of the conductor patterns CLga and CLgb and ends of the conductor patterns CLgc and CLgd are connected to each other via the via conductor V.
The filter module illustrated in
In the example illustrated in
In addition, in the example illustrated in
In addition, in the example illustrated in
The filter module illustrated in
In the example illustrated in
In the example illustrated in
In a fourth preferred embodiment, an example of the junction structure in the lamination direction of the plurality of conductor patterns will be described.
As illustrated in
These conductor patterns and the via conductor correspond to the junction structure of the conductor patterns CLga and CLgb, the conductor patterns CLgc and CLgd, and the via conductor V in
As illustrated in
As illustrated in
The inductance of the inductor Lg can be easily fine-tuned by connecting the conductor patterns CLga and CLgb and the conductor patterns CLgc and CLgd over a long distance via the via conductor V as illustrated in
By preventing the number of conductor patterns laminated from increasing locally as illustrated in
In a fifth preferred embodiment, an example of an electronic device including the filter module described above will be described.
A filter module according to a preferred embodiment of the present invention can be applied to the transmission filter 64 and the reception filter 72. In addition, a filter module according to a preferred embodiment of the present invention can be applied to the high-frequency filter of the duplexer 53.
In addition, when filters are provided at the front and rear of the power amplifier 65, at the front and rear of the low-noise amplifier 71, at the front and rear of the transmission mixer 63, and at the front and rear of the reception mixer 73 and the like, a filter module according to a preferred embodiment of the present invention can be applied to the filters.
Finally, the present invention is not limited to the preferred embodiments described above. Appropriate modifications and changes can be made by those skilled in the art. The scope of the present invention is indicated by the claims, not by the preferred embodiments described above. Furthermore, the scope of the present invention also includes modifications and changes of preferred embodiments within equivalents of the appended claims and within the appended claims.
For example,
While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
Number | Date | Country | Kind |
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2021-017228 | Feb 2021 | JP | national |
This application claims the benefit of priority to Japanese Patent Application No. 2021-017228 filed on Feb. 5, 2021 and is a Continuation Application of PCT Application No. PCT/JP2022/003666 filed on Jan. 31, 2022. The entire contents of each application are hereby incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/JP2022/003666 | Jan 2022 | US |
Child | 18220894 | US |