This application claims priority from French Application for Patent No. 1357071 filed Jul. 18, 2013, the disclosure of which is incorporated by reference.
The present invention relates to the field of electronic devices comprising an integrated circuit chip provided with a projecting electrical connection pad or plurality of pads.
Currently, integrated circuit chips have, in their front face, openings of circular cross section uncovering a number of first circular regions of electrical contacts and the electrical connection pads have parts with circular cross sections that fill said circular openings and cover said first regions and have parts with circular cross sections that extend in projection with respect to said front face and cover, on this front face, a number of second circular regions surrounding said circular openings, and are concentric to said first circular regions.
Known assemblies consist in taking such integrated circuit chips provided with such electrical connection pads and in crushing or soldering or brazing the end parts of the electrical connection pads onto electrical contact regions of electrical connection networks of substrate boards.
When such assemblies are subjected to temperature variations, mechanical stresses, notably shearing and bending stresses, appear in the electrical connection pads due to the fact that the integrated circuit chips and the substrate boards have different thermal expansion coefficients.
Such stresses can generate delamination or debonding, or even breakage, at the level of the first electrical contact regions, of the last layers and possibly of the deep layers or structures of the integrated circuit chips, as well as debonding at the level of the interfaces between the electrical contact regions and the electrical connection pads, making the integrated circuit chips and consequently the assemblies defective.
There is a need in the art to reduce the above drawbacks.
An electronic device is proposed that comprises an integrated circuit chip comprising an insulating passivation layer having an opening uncovering a first region of an electrical contact and at least one electrical connection pad filling said opening by covering said first region and extending in projection in such a way as to cover a second region situated on said passivation layer and surrounding said opening, and in which the periphery of at least one of said first and second regions is of elongate or oblong shape, extending in one direction.
The elongate shape can have at least one axis of symmetry.
The shapes of the peripheries of said first and second regions can have superimposed centers.
The peripheries of said first and second regions can be of elongate shapes.
The large dimensions of said elongate shapes can be set out orthogonally.
Said elongate shapes can be elliptical.
Said passivation layer can comprise a first layer having a first opening and a second layer having a second opening larger than said first opening of the first layer, said second region comprising two parts arranged on these first and second layers and separated by said second opening.
Some electronic devices 1 will now be described by way of non-limiting examples, illustrated by the drawing in which:
An electronic device 1 illustrated in
In a variant embodiment, the integrated circuit chip 2 is provided with an insulating passivation layer 6 which covers the front face 3 and, partly, the metallic contact 4 in such a way that an opening 7 arranged through the passivation layer 6 uncovers a first front region 8 on the metallic contact 4.
The electronic device 1 furthermore comprises an electrical connection pad 9 which fills the opening 7 while covering the first region 8 and which extends in projection with respect to the outer face 10 of the passivation layer 6 while covering a second front region 11 situated on the passivation layer 6 and surrounding the opening 7, the electrical connection pad 9 having a shoulder arranged between these regions 8 and 11. The perimeter of the cross section of the electrical connection pad 9, over its whole height, corresponds substantially to the periphery of the second region 11.
As illustrated in
More generally, the electronic device 1 comprises a plurality of electrical connection pads 9 linked to a plurality of metallic contacts 4 of the integrated circuit chip 2, through a plurality of openings 7 arranged in the passivation layer 6, the ends 13 of these electrical connection pads 9, provided with a soldering material, being flattened and brazed onto electrical contacts 14 arranged on a face of the base board 12, in order to electrically link the integrated circuit chip 2 to an electrical connection network supported by the base board 12.
As will result from the examples illustrated in
As a consequence, the shape of the periphery of one of said first and second regions 8 and 11 can be of elongate or oblong shape and that of the other can be circular, or again the peripheries of the two regions 8 and 11 can be of elongate or oblong shapes.
In a particular disposition, the shapes of the peripheries of the first and second regions 8 and 11 can have superimposed centers.
Thus, in two orthogonal directions containing the large and small dimensions of the elongate shapes, the ratios between, on the one hand, the dimension of the first region and, on the other hand, the dimension of the second region on one side of the first region, or else the sum of the dimensions of the second region on either side of the first region, are different. The result is that, in said directions, the ties or anchorings of the electrical connection pad 9 on the integrated circuit chip 2 are different and react differently under the effect of identical stresses.
In an example illustrated in
In another example illustrated in
The disposition of
The stresses are distributed in an elongated zone of the region 8, substantially perpendicular to the axis 15b (substantially parallel to axis 16b) and extending along a part of the periphery of the region 8 facing the corresponding extremity of the periphery of the region 11b in the direction 11b. Also and in combination, the stresses are distributed in a large zone of the region 11, extending between this part of the periphery of the region 8 and this corresponding extremity of the periphery of the region 11b in the direction 11b.
This distribution increases the resistance of the attachment or coupling of the pad 9 on the metallic pad 4 and on the passivation layer 6 and reduces the penetration of the stresses towards the interior of the chip 2.
In another example illustrated in
In another example illustrated in
In another example illustrated in
In another example illustrated in
Considering the above combinations of the shapes of the peripheries of the first and second regions 8 and 11, it can be observed that they are arranged with respect to each other in such a way that its ties on the integrated circuit chip 2 along their two orthogonal principal directions are different These dissymmetric ties are therefore capable of bearing different stresses along these two directions.
In the assembly in
By placing the connection pad 9 in a position such that the direction of greatest resistance of the tie or the anchoring of this latter on the integrated circuit chip 2 coincides with this direction of stress, not only the ties of the connection pad 9 on the regions 8 and 11 but also the internal structures of the integrated circuit chip 2 can be preserved from damage or destruction, by delamination for example.
In a variant embodiment illustrated in
By way of example, the passivation layer 6 may be made of silicon nitride, obtained by vapor-phase deposition. The metallic contact 4 of the integrated circuit chip 2 can be made of aluminum. The conductive layer 17 can be obtained by vapor-phase deposition of an underlayer of titanium and an underlayer of copper. By growth or electrodeposition in a passage of a mask, the thick layer 18 can result from a deposition of copper, the layer 19 can result from a deposition of nickel and the layer 13 can result from a deposition on an alloy of tin and silver.
In another embodiment, the passivation layer 6 can comprise a first layer, for example of silicon nitride, and a second layer, for example of polyimide or polybenzoxazole. The opening 7 can be determined either by superimposed edges of these two layers or by an edge of the second layer running alongside the electrical contact 4 with respect to the edge of an opening of the first layer.
In another embodiment illustrated in
The shapes proposed previously (
By way of example illustrated in
In a variant embodiment, the large dimensions of the elliptical peripheries 8b and 20b could be superimposed whereas the small dimension of the elliptical periphery 11a could be superimposed on the large dimensions of the elliptical peripheries 8b and 20b.
The present invention is not limited to the examples described above. In particular, the shapes of the peripheries of said tie regions could be different again. They could have the shape of triangles, rectangles, lozenges, or any other polygons exhibiting an elongation along one axis. Many variant embodiments are possible, without departing from the context of the invention.
Number | Date | Country | Kind |
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1357071 | Jul 2013 | FR | national |