ELECTRONIC DEVICE MANUFACTURING METHOD AND LITHOGRAPHY CONTROL PROCESSOR

Abstract

An electronic device manufacturing method includes performing scanning exposure in which plural scan fields of a first photosensitive substrate are exposed to pulse laser light having a reference wavelength, measuring overlay errors at plural positions in each of the plural scan fields, calculating the average of the overlay errors at each of the plural positions in scan fields scanned in the same scan direction out of the plural scan fields, calculating the amount of wavelength adjustment with respect to the reference wavelength in such a way that a first overlay error parameter calculated from the averages and distortions produced when the wavelength of the pulse laser light is changed from the reference wavelength is smaller than a second overlay error parameter calculated from the averages, causing a laser apparatus to generate the pulse laser light having a wavelength controlled by using the amount of wavelength adjustment, outputting the pulse laser light to an exposure apparatus, and exposing a second photosensitive substrate to the pulse laser light in the exposure apparatus to manufacture electronic devices.

Description

BACKGROUND

1. Technical Field

The present disclosure relates to an electronic device manufacturing method and a lithography control processor.

2. Related Art

In recent years, a semiconductor exposure apparatus is required to improve the resolution thereof as semiconductor integrated circuits are increasingly miniaturized and highly integrated. To this end, reduction in the wavelength of light emitted from a light source for exposure is underway. For example, a KrF excimer laser apparatus, which outputs laser light having a wavelength of about 248 nm, and an ArF excimer laser apparatus, which outputs laser light having a wavelength of about 193 nm, are used as a gas laser apparatus for exposure.

The light from spontaneously oscillating KrF and ArF excimer laser apparatuses has a wide spectral linewidth ranging from 350 to 400 pm. A projection lens made of a material that transmits ultraviolet light, such as KrF and ArF laser light, therefore produces chromatic aberrations in some cases. As a result, the resolution of the projection lens may decrease. To avoid the decrease in the resolution, the spectral linewidth of the laser light output from the gas laser apparatus needs to be narrow enough to make the chromatic aberrations negligible. To this end, a line narrowing module (LNM) including a line narrowing element (such as etalon and grating) is provided in some cases in a laser resonator of the gas laser apparatus to narrow the spectral linewidth. A gas laser apparatus providing a narrowed spectral linewidth is hereinafter referred to as a narrowed-line laser apparatus.

CITATION LIST

Patent Literature

• [PTL 1] JPH07-245251A
• [PTL 2] U.S. Pat. No. 6,256,086B

SUMMARY

In an aspect of the present disclosure, an electronic device manufacturing method includes performing scanning exposure in which plural scan fields of a first photosensitive substrate are exposed to pulse laser light having a reference wavelength, measuring overlay errors at plural positions in each of the plural scan fields, calculating an average of the overlay errors at each of the plural positions in scan fields scanned in the same scan direction out of the plural scan fields, calculating an amount of wavelength adjustment with respect to the reference wavelength in such a way that a first overlay error parameter calculated from the averages and distortions produced when a wavelength of the pulse laser light is changed from the reference wavelength is smaller than a second overlay error parameter calculated from the averages, causing a laser apparatus to generate the pulse laser light having a wavelength controlled by using the amount of wavelength adjustment, outputting the pulse laser light to an exposure apparatus, and exposing a second photosensitive substrate to the pulse laser light in the exposure apparatus to manufacture electronic devices.

In another aspect of the present disclosure, a lithography control processor includes a non-transitory computer-readable storage medium configured to store a lithography control program, and a CPU. The lithography control program causes the CPU to acquire overlay errors at plural positions in each of plural scan fields of a first photosensitive substrate that undergoes scanning exposure in which the plural scan fields are exposed to pulse laser light having a reference wavelength, calculate an average of the overlay errors at each of the plural positions in scan fields scanned in the same scan direction out of the plural scan fields, and calculate an amount of wavelength adjustment with respect to the reference wavelength in such a way that a first overlay error parameter calculated from the averages and distortions produced when a wavelength of the pulse laser light is changed from the reference wavelength is smaller than a second overlay error parameter calculated from the averages.

BRIEF DESCRIPTION OF DRAWINGS

Embodiments of the present disclosure will be described below only by way of example with reference to the accompanying drawings.

FIG. 1 schematically shows the configuration of a lithography system in Comparative Example.

FIG. 2 schematically shows the configuration of a laser apparatus in Comparative Example.

FIG. 3 shows a semiconductor wafer exposed to light by an exposure apparatus.

FIG. 4 shows how the semiconductor wafer is moved with respect to the position of pulse laser light to change the position of a scan field.

FIG. 5 shows how the semiconductor wafer is moved with respect to the position of pulse laser light to change the position of the scan field.

FIG. 6 shows how the semiconductor wafer is moved with respect to the position of pulse laser light to change the position of the scan field.

FIG. 7 shows how the semiconductor wafer is moved with respect to the position of pulse laser light to change the position of the scan field.

FIG. 8 is a cross-sectional view of a reticle supported by a reticle stage.

FIG. 9 shows a bend of a pellicle produced when the reticle is moved.

FIG. 10 shows a bend of the pellicle produced when the reticle is moved.

FIG. 11 shows how an overlay error occurs due to the bend of the pellicle.

FIG. 12 shows a pattern formed at the surface of the semiconductor wafer when no shift of the image formation position occurs, and a pattern formed at the surface of the semiconductor wafer when the image formation position is shifted by diffracted light having been asymmetrically refracted.

FIG. 13 conceptually shows a distribution of an overlay error in a scan field of the semiconductor wafer.

FIG. 14 conceptually shows another distribution of the overlay error in the scan field of the semiconductor wafer.

FIG. 15 schematically shows the configuration of the lithography system in a first embodiment.

FIG. 16 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in the first embodiment.

FIG. 17 shows a semiconductor wafer where the overlay error is measured.

FIG. 18 is a flowchart showing preliminary exposure processes in detail.

FIG. 19 is a flowchart showing the process of measuring the overlay error in detail.

FIG. 20 is a flowchart showing the process of calculating the amounts of wavelength adjustment and the amounts of focus shift in detail.

FIG. 21 conceptually shows overlay errors in scan fields that undergo a forward scan.

FIG. 22 conceptually shows the average of the overlay errors in the forward scan.

FIG. 23 conceptually shows the overlay errors in scan fields that undergo a reverse scan.

FIG. 24 conceptually shows the average of the overlay errors in the reverse scan.

FIG. 25 shows a data table of the overlay errors stored in a memory in S23 in FIG. 19.

FIG. 26 shows a data table of the average of the overlay errors in the forward scan.

FIG. 27 shows a data table of the average of the overlay errors in the reverse scan.

FIG. 28 is a flowchart showing the process of calculating distortion sensitivity at an X-direction position in detail.

FIG. 29 conceptually shows the distortion sensitivity at X-direction and Y-direction positions.

FIG. 30 conceptually shows the distortion sensitivity at an X-direction position.

FIG. 31 shows a data table of the distortion sensitivity at X-direction and Y-direction positions.

FIG. 32 shows a data table of the distortion sensitivity at X-direction positions.

FIG. 33 is a flowchart showing the process of calculating the amount of wavelength adjustment in the forward scan in detail.

FIG. 34 is a flowchart showing the process of calculating the amount of wavelength adjustment in the reverse scan in detail.

FIG. 35 shows the relationship between the average of the overlay errors and the distortion sensitivity at X-direction positions in the forward scan.

FIG. 36 shows an example of the amount of wavelength adjustment and the amount of focus shift in the forward scan.

FIG. 37 shows the relationship between the average of the overlay errors and the distortion sensitivity at X-direction positions in the reverse scan.

FIG. 38 shows an example of the amount of wavelength adjustment and the amount of focus shift in the reverse scan.

FIG. 39 shows a data table of the amount of wavelength adjustment and the amount of focus shift in the forward scan.

FIG. 40 shows a data table of the amount of wavelength adjustment and the amount of focus shift in the reverse scan.

FIG. 41 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a second embodiment.

FIG. 42 is a flowchart showing the process of calculating the amounts of wavelength adjustment, synchronous control correction values, and the amounts of focus shift in detail.

FIG. 43 is a flowchart showing the process of calculating the amount of wavelength adjustment and the synchronous control correction value in the forward scan in detail.

FIG. 44 is a flowchart showing the process of calculating the amount of wavelength adjustment and the synchronous control correction value in the reverse scan in detail.

FIG. 45 shows the relationship between an X-direction component of the average of the overlay errors and an X-direction component of the distortion sensitivity at X-direction positions in the forward scan.

FIG. 46 shows an example of the amount of wavelength adjustment and the amount of focus shift in the forward scan.

FIG. 47 shows the relationship between a Y-direction component of the average of the overlay errors and a Y-direction component of the distortion sensitivity at X-direction positions in the forward scan.

FIG. 48 shows an example of the amount of wavelength adjustment and the synchronous control correction values in the forward scan.

FIG. 49 conceptually shows a method for adjusting the Y-direction position of a reticle pattern to which a semiconductor wafer is exposed with the aid of the synchronous control of the reticle stage and a workpiece table.

FIG. 50 conceptually shows the method for adjusting the Y-direction position of the reticle pattern to which the semiconductor wafer is exposed with the aid of the synchronous control of the reticle stage and the workpiece table.

FIG. 51 conceptually shows the method for adjusting the Y-direction position of the reticle pattern to which the semiconductor wafer is exposed with the aid of the synchronous control of the reticle stage and the workpiece table.

FIG. 52 shows a data table of the amount of wavelength adjustment, the synchronous control correction value, and the amount of focus shift in the forward scan.

FIG. 53 shows a data table of the amount of wavelength adjustment, the synchronous control correction value, and the amount of focus shift in the reverse scan.

FIG. 54 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a third embodiment.

FIG. 55 shows plural semiconductor wafers where the overlay error is measured.

FIG. 56 is a flowchart showing the process of measuring the overlay error in detail.

FIG. 57 is a flowchart showing the process of calculating the amount of wavelength adjustment and the amount of defocus in detail.

FIG. 58 shows a data table of the average of the overlay errors.

FIG. 59 is a flowchart showing the process of calculating the amount of wavelength adjustment in detail.

FIG. 60 shows a data table of the amount of wavelength adjustment and the amount of focus shift.

FIG. 61 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a fourth embodiment.

FIG. 62 is a flowchart showing the process of calculating the amount of wavelength adjustment, the synchronous control correction value, and the amount of focus shift in detail.

FIG. 63 is a flowchart showing the process of calculating the amount of wavelength adjustment and the synchronous control correction value in detail.

FIG. 64 shows a data table of the amount of wavelength adjustment, the synchronous control correction value, and the amount of focus shift.

DETAILED DESCRIPTION

<Contents>

• • 1. Comparative Example
  • 1.1 Lithography system
  • 1.2 Exposure apparatus 200
  • 1.2.1 Configuration
  • 1.2.2 Operation
  • 1.3 Laser apparatus 100
  • 1.3.1 Configuration
  • 1.3.2 Operation
  • 1.4 Scanning exposure
  • 1.5 Problems with Comparative Example
  • 2. Lithography system that calculates amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and amounts of focus shift ΔZ_Pj and ΔZ_Mj for each scan direction
  • 2.1 Configuration
  • 2.2 Operation
  • 2.2.1 Main procedure
  • 2.2.2 Preliminary exposure
  • 2.2.3 Measurement of overlay error D_kij
  • 2.2.4 Calculation of amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and amounts of focus shift ΔZ_Pj and ΔZ_Mj
  • 2.2.4.1 Calculation of distortion sensitivity (dβ/dλ)_i
  • 2.2.4.2 Calculation of amounts of wavelength adjustment Δλ_Pj and Δλ_Mj
  • 2.3 Effects
  • 3. Lithography system that calculates synchronous control correction values S_YPj and S_YMj for each scan direction
  • 3.1 Operation
  • 3.1.1 Main procedure
  • 3.1.2 Calculation of amounts of wavelength adjustment Δλ_XPj and Δλ_XMj, synchronous control correction values S_YPj and S_YMj, and amounts of focus shift ΔZ_XPj and ΔZ_XMj
  • 3.1.3 Calculation of amounts of wavelength adjustment Δλ_XPj and Δλ_XMj and synchronous control correction values S_YPj and S_YMj
  • 3.2 Effects
  • 4. Lithography system that calculates amount of wavelength adjustment Δλ_nj and amount of focus shift ΔZ_nj for each scan field number n
  • 4.1 Operation
  • 4.1.1 Main procedure
  • 4.1.2 Measurement of overlay error D_nij
  • 4.1.3 Calculation of amount of wavelength adjustment Δλ_nj and amount of focus shift ΔZ_nj
  • 4.1.4 Calculation of amount of wavelength adjustment Δλ_nj
  • 4.2 Effects
  • 5. Lithography system that calculates synchronous control correction value S_Ynj for each scan field number n
  • 5.1 Operation
  • 5.1.1 Main procedure
  • 5.1.2 Calculation of amount of wavelength adjustment Δλ_Xnj, synchronous control correction value S_Ynj, and amount of focus shift ΔZ_Xnj
  • 5.1.3 Calculation of amount of wavelength adjustment Δλ_Xnj and synchronous control correction value S_Ynj
  • 5.2 Effects
  • 6. Others

Embodiments of the present disclosure will be described below in detail with reference to the drawings. The embodiments described below show some examples of the present disclosure and are not intended to limit the contents of the present disclosure. Furthermore, all configurations and operations described in the embodiments are not necessarily essential as configurations and operations in the present disclosure. The same component has the same reference character, and no redundant description of the same component will be made.

1. Comparative Example

1.1 Lithography System

FIG. 1 schematically shows the configuration of a lithography system in Comparative Example. Comparative Example in the present disclosure is an aspect that the applicant is aware of as known only by the applicant, and is not a publicly known example that the applicant is self-aware of.

The lithography system includes a laser apparatus 100 and an exposure apparatus 200. FIG. 1 shows the laser apparatus 100 in a simplified form.

The laser apparatus 100 includes a laser control processor 130. The laser control processor 130 is a processing apparatus including a memory 132, which stores a control program, and a CPU (central processing unit) 131, which executes the control program. The memory 132 includes a non-transitory computer-readable storage medium. The laser control processor 130 is specially configured or programmed to carry out a variety of processes described in the present disclosure. The laser apparatus 100 is configured to output pulse laser light toward the exposure apparatus 200.

1.2 Exposure Apparatus 200

1.2.1 Configuration

The exposure apparatus 200 includes an illumination optical system 201, a projection optical system 202, and an exposure control processor 210, as shown in FIG. 1.

The illumination optical system 201 illuminates a reticle pattern of a reticle that is not shown but is placed at a reticle stage RT with the pulse laser light having entered the exposure apparatus 200 from the laser apparatus 100.

The projection optical system 202 performs reduction projection on the pulse laser light having passed through the reticle to bring the pulse laser light into focus at a workpiece that is not shown but is placed at a workpiece table WT. The workpiece is a photosensitive substrate, such as a semiconductor wafer coated with a photoresist film.

The exposure control processor 210 is a processing apparatus including a memory 212, which stores a control program, and a CPU 211, which executes the control program. The memory 212 includes a non-transitory computer-readable storage medium. The exposure control processor 210 is specially configured or programmed to carry out a variety of processes described in the present disclosure. The exposure control processor 210 oversees the control of the exposure apparatus 200.

1.2.2 Operation

The exposure control processor 210 transmits a variety of parameters including a target wavelength λt and a voltage instruction value, and a trigger signal to the laser control processor 130. The laser control processor 130 controls the laser apparatus 100 in accordance with the parameters and the signal.

The exposure control processor 210 translates the reticle stage RT and the workpiece table WT in opposite directions in synchronization with each other. The workpiece is thus exposed to the pulse laser light having reflected the reticle pattern. The exposure step described above causes the reticle pattern to be transferred to the semiconductor wafer. Plural steps that follow the exposure step allow manufacture of electronic devices.

1.3 Laser Apparatus 100

1.3.1 Configuration

FIG. 2 schematically shows the configuration of the laser apparatus 100 in Comparative Example. FIG. 2 shows the exposure apparatus 200 in a simplified form.

The laser apparatus 100 includes a master oscillator MO, a power oscillator PO, a monitor module 17, and highly reflective mirrors 31 and 32 as well as the laser control processor 130.

The master oscillator MO includes a laser chamber 10, a line narrowing module 14, and an output coupling mirror 15. The line narrowing module 14 and the output coupling mirror 15 constitute a first optical resonator.

The laser chamber 10 is disposed in the optical path of the first optical resonator. The laser chamber 10 is provided with windows 10a and 10b.

The laser chamber 10 accommodates a pair of discharge electrodes 11a and 11b. The laser chamber 10 is filled with a laser gas containing, for example, an argon or krypton gas as a rare gas, a fluorine gas as a halogen gas, and a neon gas as a buffer gas.

The line narrowing module 14 includes a prism 14a and a grating 14b. The prism 14a is disposed in the optical path of the light beam having exited via the window 10a. The prism 14a is so disposed that the surfaces of the prism 14a on which the light beam is incident and via which the light beam exits out are parallel to the direction of discharge between the discharge electrodes 11a and 11b, and the prism 14a is supported by a holder that is not shown. A rotary stage 14c allows the prism 14a to rotate around an axis parallel to the discharge direction.

The grating 14b is disposed in the optical path of the light beam having passed through the prism 14a. The direction of the grooves of the grating 14b is parallel to the discharge direction. The grating 14b is supported by a holder that is not shown.

The output coupling mirror 15 includes a partially reflective mirror.

The highly reflective mirrors 31 and 32 are disposed in this order in the optical path of pulse laser light B1 output via the output coupling mirror 15.

The power oscillator PO includes a laser chamber 20, a rear mirror 24, and an output coupling mirror 25. The rear mirror 24 and the output coupling mirror 25 constitute a second optical resonator.

The rear mirror 24 and the output coupling mirror 25 each includes a partially reflective mirror. The rear mirror 24 has a reflectance higher than that of the output coupling mirror 25.

The laser chamber 20 is disposed in the optical path of the second optical resonator. The laser chamber 20 is provided with windows 20a and 20b.

The laser chamber 20 accommodates a pair of discharge electrodes 21a and 21b. The laser gas sealed in the laser chamber 20 is the same as that sealed in the laser chamber 10.

The monitor module 17 includes a beam splitter 17a and a beam monitor 17b. The beam splitter 17a is disposed in the optical path of pulse laser light B2 output via the output coupling mirror 25. The beam monitor 17b is disposed in the optical path of the pulse laser light B2 reflected off the beam splitter 17a. The pulse laser light B2 having passed through the beam splitter 17a is output to the exposure apparatus 200.

1.3.2 Operation

The laser control processor 130 transmits a control signal to the line narrowing module 14 based on the target wavelength λt received from the exposure control processor 210. The laser control processor 130 sets the voltage instruction value received from the exposure control processor 210 in a power supply apparatus that is not shown but is accommodated in each of the master oscillator MO and the power oscillator PO.

The laser control processor 130 transmits an oscillation trigger signal based on the trigger signal received from the exposure control processor 210 to the power supply apparatuses of the master oscillator MO and the power oscillator PO.

Upon reception of the oscillation trigger signal from the laser control processor 130, the power supply apparatus of the master oscillator MO applies a pulse-shaped high voltage according to the voltage instruction value to the space between the discharge electrodes 11a and 11b.

When the high voltage is applied to the space between the discharge electrodes 11a and 11b, discharge occurs in the discharge space between the discharge electrodes 11a and 11b. The energy of the discharge excites the laser gas in the laser chamber 10, and the excited laser gas transitions to a high energy level. Thereafter, when the excited laser gas transitions to a low energy level, the laser gas emits light having a wavelength according to the difference between the energy levels.

The light generated in the laser chamber 10 exits out of the laser chamber 10 via the windows 10a and 10b. The light having exited via the window 10a enters the line narrowing module 14. The light having entered the line narrowing module 14 is enlarged in terms of beam width by the prism 14a and is then incident on the grating 14b.

The light incident on the grating 14b is reflected off and diffracted by the plural grooves of the grating 14b in the direction according to the wavelength of the light. The prism 14a reduces the beam width of the diffracted light from the grating 14b and causes the light to return to the laser chamber 10 via the window 10a.

Light having a desired wavelength and therearound out of the light having entered the line narrowing module 14 is thus returned to the laser chamber 10.

The output coupling mirror 15 transmits and outputs part of the light having exited via the window 10b as the pulse laser light B1 and reflects the other part of the light back into the laser chamber 10.

The light output from the laser chamber 10 thus travels back and forth between the line narrowing module 14 and the output coupling mirror 15. The light is amplified whenever passing through the discharge space in the laser chamber 10. Furthermore, the light is narrowed in terms of linewidth whenever deflected back by the line narrowing module 14, and becomes light having a steep wavelength distribution having a center wavelength being part of the range of wavelengths selected by the line narrowing module 14. The light thus having undergone the laser oscillation and the line narrowing operation is output as the pulse laser light B1 via the output coupling mirror 15.

The pulse laser light B1 is guided by the highly reflective mirrors 31 and 32 to the rear mirror 24 of the power oscillator PO.

Upon reception of the oscillation trigger signal from the laser control processor 130, the power supply apparatus of the power oscillator PO applies a pulse-shaped high voltage according to the voltage instruction value to the space between the discharge electrodes 21a and 21b. The delay period by which the oscillation trigger signal to the power oscillator PO is delayed from the oscillation trigger signal to the master oscillator MO is so set that the timing at which the discharge occurs in the space between the discharge electrodes 21a and 21b is synchronized with the timing at which the pulse laser light B1 enters the laser chamber 20 via the rear mirror 24 and the window 20a.

The pulse laser light B1 having entered the laser chamber 20 travels back and forth between the rear mirror 24 and the output coupling mirror 25 and is amplified whenever passing through the discharge space between the discharge electrodes 21a and 21b. The amplified light is output as the pulse laser light B2 via the output coupling mirror 25.

The laser control processor 130 controls the rotary stage 14c in the line narrowing module 14 via a driver that is not shown. The angle of incidence of the light beam incident on the grating 14b changes in accordance with the angle of rotation of the rotary stage 14c, and the wavelengths selected by the line narrowing module 14 change accordingly.

The beam monitor 17b measures the wavelength of the pulse laser light B2 and transmits the measured wavelength to the laser control processor 130. The laser control processor 130 performs feedback control on the rotary stage 14c based on the target wavelength λt received from the exposure control processor 210 and the measured wavelength. Unless otherwise specified, the wavelength of the pulse laser light B2 assumed to be the center wavelength.

The pulse laser light B2 having passed through the beam splitter 17a enters the exposure apparatus 200.

The case where the master oscillator MO includes a gas laser apparatus has been described above, and the master oscillator MO may include a solid-state laser. Moreover, the case where the second optical resonator accommodated in the power oscillator PO is a Fabry-Perot type resonator has been described above, the second optical resonator may include a ring-shaped resonator.

1.4 Scanning Exposure

FIG. 3 shows a semiconductor wafer exposed to the pulse laser light by the exposure apparatus 200. The semiconductor wafer is, for example, a single crystal silicon plate having a substantially disk-like shape. The semiconductor wafer is coated, for example, with a photosensitive resist film. Exposure of the semiconductor wafer is performed on a scan field basis, the scan field having a scan field number n, which is an integer ranging from 1 to Nmax. The scan fields each correspond to a region onto which the reticle pattern of a single reticle is transferred.

First, the semiconductor wafer is so moved that the first scan field having a scan field number n of 1 is irradiated with the pulse laser light, so that the first scan field is exposed to the pulse laser light. The first scan field undergoes the scanning exposure while the semiconductor wafer is moved toward the positive end of the Y-direction with respect to the optical axis of the pulse laser light. This scan is called a forward scan in the present disclosure. The scan field that undergoes the scanning exposure in the forward scan is indicated by a symbol “+” in FIG. 3. The scan direction in the forward scan corresponds to the first direction in the present disclosure.

The semiconductor wafer is next so moved that the second scan field having a scan field number n of 2 is irradiated with the pulse laser light, so that the second scan field is exposed to the pulse laser light. The second scan field undergoes the scanning exposure while the semiconductor wafer is moved toward the negative end of the Y-direction with respect to the optical axis of the pulse laser light. This scan is called a reverse scan in the present disclosure. The scan field that undergoes the scanning exposure in the reverse scan is indicated by a symbol “−” in FIG. 3. The scan direction in the reverse scan corresponds to the second direction in the present disclosure.

The other scan fields are also sequentially exposed to the pulse laser light, and after the last scan field having a scan field number n Nmax is exposed to the pulse laser light, the exposure of the semiconductor wafer ends.

FIGS. 4 to 7 show how the semiconductor wafer is moved with respect to the position of the pulse laser light to change the position of each of the scan fields. In FIGS. 4 to 7, the scan field is shown by a solid-line frame, and the beam cross-section of the pulse laser light at the position of the workpiece table WT is shown by a broken-line frame. The width of the scan field in the X-direction is equal to the width of the beam cross-section of the pulse laser light in the X-direction. The width of the scan field in the Y-direction is greater than the width of the beam cross-section of the pulse laser light in the Y-direction.

In the forward scan, the scan field is exposed to the pulse laser light in the order of FIGS. 4, 5, 6, and 7. First, the workpiece table WT is so positioned that an end SFy+ of the scan field, which is the end facing the positive end of the Y-direction, is located at a position separate by a predetermined distance in the Y-direction toward the negative end thereof from the position of an end By− of the beam cross-section, which is the end facing the negative end of the Y-direction, as shown in FIG. 4. The workpiece table WT is then accelerated toward the positive end of the Y-direction. The travel speed of the workpiece table WT reaches V by the time when the end SFy+ of the scan field, which is the end facing the positive end of the Y-direction, coincides with the position of the end By− of the beam cross-section, which is the end facing the negative end of the Y-direction, as shown in FIG. 5. The scan field is exposed to the pulse laser light while the workpiece table WT is so moved that the position of the scan field makes uniform linear motion at the travel speed V with respect to the position of the beam cross-section, as shown in FIG. 6. The exposure of the scan field ends after the workpiece table WT is moved until an end SFy− of the scan field, which is the end facing the negative end of the Y-direction, passes through the position of an end By+ of the beam cross-section, which is the end facing the positive end of the Y-direction, as shown in FIG. 7. The exposure is thus performed while the scan field is moved with respect to the position of the beam cross-section.

The reverse scan is performed by moving the scan field in the opposite direction to the direction in which the forward scan is performed.

1.5 Problems with Comparative Example

FIG. 8 is a cross-sectional view of a reticle R supported by the reticle stage RT. The reticle R is made of a material that is transparent to the wavelength of the pulse laser light, and has one surface at which a reticle pattern Rp is formed. To suppress adhesion of dust to the reticle pattern Rp, a thin film called a pellicle Pe is attached to the reticle R via a spacer Sp. A gap is formed between the reticle pattern Rp and the pellicle Pe, so that the image of the pellicle Pe is defocused when the image of the reticle pattern Rp is brought into focus at the semiconductor wafer. Therefore, even when dust adheres to the pellicle Pe, the adverse effect of the dust on the image formed at the semiconductor wafer is suppressed.

FIGS. 9 and 10 show bends of the pellicle Pe produced when the reticle R is moved. The travel direction of the reticle R is opposite to the travel direction of the semiconductor wafer; in the forward scan, the reticle R is moved toward the negative end of the Y-direction, whereas in the reverse scan, the reticle R is moved toward the positive end of the Y-direction. When scanning exposure is performed by using the reticle R to which the pellicle Pe has been attached, the pellicle Pe may be bent. The bend depends on the travel direction and the speed of the reticle R and the position of the bend within the pellicle Pe. When an attempt to perform high-speed scanning is made, the magnitude of the bend of the pellicle Pe increases.

FIG. 11 shows how an overlay error occurs due to the bend of the pellicle Pe. The pulse laser light is incident on the reticle R in the Z-direction toward the negative end thereof, which is perpendicular to the reticle pattern Rp. The pulse laser light incident on the reticle R is diffracted by the reticle pattern Rp, exits out of the reticle R as diffracted light DL1, diffracted light DL2, and other types of diffracted light that are not shown, and all the types of diffracted light are incident on the pellicle Pe. The angles of incidence of the diffracted light DL1, the diffracted light DL2, and the other types of diffracted light incident on the pellicle Pe differ depending on the order of diffraction and the bend of the pellicle Pe. When the pellicle Pe is not bent, the diffracted light DL1 and the diffracted light DL2 travel as indicated by the broken lines in FIG. 11, whereas when the diffracted light DL1 and the diffracted light DL2 pass through the pellicle Pe that has been bent, the angles of refraction at the surface of the pellicle Pe vary due to the difference in the angle of incidence described above, as indicated by the solid lines in FIG. 11. Therefore, as compared with the case where there is no bend, the symmetry of the travel directions of the diffracted light DL1, the diffracted light DL2, and the other types of diffracted light with respect to the optical axis in the Z-direction toward the negative end thereof changes, which shifts the position where the projection optical system 202 forms an image at the surface of the semiconductor wafer.

FIG. 12 shows a pattern Norm, which is formed at the surface of the semiconductor wafer when no shift of the image formation position occurs, and a pattern Shift, which is formed at the surface of the semiconductor wafer when the image formation position is shifted by the diffracted light having been asymmetrically refracted. The shift of the image formation position is an overlay error D. D stands for a vector.

FIGS. 13 and 14 conceptually show the distributions of overlay errors D_Pij and D_Mij in a scan field of a semiconductor wafer. The overlay errors D_Pij and D_Mij are each expressed in the form of a displacement vector starting from the position where the semiconductor wafer should originally be exposed to the pulse laser light to the position where the semiconductor wafer is actually exposed to the pulse laser light. The magnitude of the vector is exaggerated. The overlay errors D_Pij and D_Mij depend on the travel direction and the speed of the reticle R and the position (i, j) in the scan field. The subscripts i and j of D_Pij and D_Mij mean that the overlay errors D_Pij and D_Mij are calculated for each position (i, j) specified by the X-direction position i and the Y-direction position j in the scan field. FIG. 13 shows the distribution of the overlay error D_Pij in the forward scan, and FIG. 14 shows the distribution of the overlay error D_Mij in the reverse scan. The subscripts i and j are each an integer greater than or equal to one. In FIGS. 13 and 14, Imax is the maximum value of i, and Jmax is the maximum value of j.

The reticle R used in the exposure apparatus 200 includes the pellicle Pe attached thereto in some cases, and does not include the pellicle Pe attached thereto in other cases, and the pellicle Pe may be made of a different material or may have a different thickness. The overlay errors D_Pij and D_Mij may cause a misalignment between a first layer in which one reticle pattern Rp is transferred to a scan field and a second layer in which another reticle pattern Rp is transferred to the same scan field.

It is conceivable to correct the overlay errors D_Pij and D_Mij by moving some optical elements of the projection optical system 202 in synchronization with the scanning exposure, but in this case, it is necessary to move an optical element having a mass of the order of several kilograms, so that it is difficult to support high-speed scanning. It is also conceivable to create a reticle pattern Rp that is offset in advance, which cannot, however, deal with the overlay errors D_Pij and D_Mij that depend on the scan direction.

In the embodiments described below, distortion is generated by adjusting the target wavelength λt transmitted to the laser apparatus 100 to reduce the overlay errors D_Pij and D_Mij.

2. Lithography System that Calculates Amounts of Wavelength Adjustment Δλ_Pj and Δλ_Mj and Amounts of Focus Shift ΔZ_Pj and ΔZ_Mj for Each Scan Direction

2.1 Configuration

FIG. 15 schematically shows the configuration of the lithography system in a first embodiment. The lithography system includes an overlay measurement apparatus 300 and a lithography control processor 430 in addition to the components shown in FIG. 1.

The overlay measurement apparatus 300 includes a wafer stage 301, a measurement unit 302, and a measurement control processor 330.

The measurement unit 302 radiates light or an electron beam onto an exposed, developed semiconductor wafer placed on the wafer stage 301, and measures the light radiated onto the semiconductor wafer and reflected off or diffracted by the semiconductor wafer, or measures the electron beam radiated onto the semiconductor wafer and scattered by the semiconductor wafer to measure an overlay error D_kij. The subscripts k, i, and j of the overlay error D_kij mean that the overlay error D_kij is measured for each scan field number k and for each in-scan-field position (i, j). The wafer stage 301 adjusts the position of the semiconductor wafer in such a way that the light or electron beam emitted from the measurement unit 302 is radiated to a desired measurement position on the semiconductor wafer.

The measurement control processor 330 is a processing apparatus including a memory 332, which stores a control program, and a CPU 331, which executes the control program. The memory 332 includes a non-transitory computer-readable storage medium. The measurement control processor 330 is specially configured or programmed to carry out a variety of processes described in the present disclosure. The measurement control processor 330 controls the wafer stage 301 and the measurement unit 302 and transmits a measured overlay error D_kij to the lithography control processor 430.

The function of measuring the overlay error D_kij may be the function of the exposure apparatus 200.

The lithography control processor 430 is a processing apparatus including a memory 432, which stores a control program, and a CPU 431, which executes the control program. The memory 432 includes a non-transitory computer-readable storage medium. The lithography control processor 430 is specially configured or programmed to carry out a variety of processes described in the present disclosure. The lithography control processor 430 calculates the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and the amounts of focus shift ΔZ_Pj and ΔZ_Mj based on the overlay error D_kij measured by the overlay measurement apparatus 300.

2.2 Operation

2.2.1 Main Procedure

FIG. 16 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in the first embodiment. FIG. 16 shows processes carried out by the exposure control processor 210 unless otherwise specified.

In S1, the exposure control processor 210 performs preliminary exposure of the semiconductor wafer. The semiconductor wafer to undergo the preliminary exposure corresponds to the first photosensitive substrate in the present disclosure. The preliminary exposure processes will be described later with reference to FIG. 18. The semiconductor wafer having undergone the preliminary exposure is conveyed to the overlay measurement apparatus 300.

In S2, the overlay measurement apparatus 300 measures the overlay error D_kij associated with the semiconductor wafer having undergone the preliminary exposure. The process of measuring the overlay error D_kij will be described later with reference to FIG. 19. The measured overlay error D_kij is transmitted to the lithography control processor 430.

FIG. 17 shows the semiconductor wafer where the overlay error D_kij is measured. The scan field number k is assigned to each of K scan fields where the overlay error D_kij is measured. The K scan fields are part of the Nmax scan fields described with reference to FIG. 3. A scan field having a scan field number k of 1, 3, or 5 is a scan field that undergoes the scanning exposure in the forward scan, and a scan field having a scan field number k of 2, 4, or 6 is a scan field that undergoes the scanning exposure in the reverse scan.

The outer edge of each of the K scan fields, where the overlay error D_kij is measured, is located inside the outer edge of the semiconductor wafer. On the other hand, scan fields each having an outer edge that intersects with the outer edge of the semiconductor wafer are indicated by the broken lines, and these scan fields are not subjected to the measurement of the overlay error D_kij. FIG. 17 shows one semiconductor wafer, but plural semiconductor wafers may be subjected to the measurement of the overlay error D_kij.

Referring again to FIG. 16, the lithography control processor 430 calculates the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and the amounts of focus shift ΔZ_Pj and ΔZ_Mj in S3. The process of calculating the amounts described above will be described later with reference to FIGS. 20 to 40. The lithography control processor 430 further calculates the target wavelength λt by using the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj. The calculated target wavelength λt and the amounts of focus shift ΔZ_Pj and ΔZ_Mj are transmitted to the exposure control processor 210.

In S4, the exposure control processor 210 transmits the target wavelength λt to the laser control processor 130.

In S5, the laser control processor 130 controls the wavelength of the pulse laser light by using the target wavelength λt. The laser apparatus 100 generates and outputs the pulse laser light to the exposure apparatus 200.

In S6, the exposure control processor 210 controls the Z-direction position of the workpiece table WT in accordance with the amounts of focus shift ΔZ_Pj and ΔZ_Mj while performing the synchronous control of the reticle stage RT and the workpiece table WT, and exposes the semiconductor wafer to the pulse laser light. The semiconductor wafer exposed to the pulse laser light in S6 is a semiconductor wafer different from the semiconductor wafer that undergoes the preliminary exposure in S1. The semiconductor wafer exposed to the pulse laser light in S6 corresponds to the second photosensitive substrate in the present disclosure.

In step S7, the exposure control processor 210 evaluates whether the exposure operation should be terminated. When the exposure operation should not be terminated (NO in S7), the exposure control processor 210 returns to the process in S5. When the exposure operation should be terminated (YES in S7), the exposure control processor 210 terminates the processes in the present flowchart.

2.2.2 Preliminary Exposure

FIG. 18 is a flowchart showing preliminary exposure processes in detail. The processes shown in FIG. 18 correspond to the subroutine S1 shown in FIG. 16.

In S11, the exposure control processor 210 performs the scanning exposure in which plural scan fields of the semiconductor wafer are exposed to the pulse laser light having a reference wavelength λ₀. The plural scan fields may be the Nmax scan fields shown FIG. 3.

In S12, the exposure control processor 210 controls a conveyor that is not shown to transport the semiconductor wafer to a developer that is not shown and is external to the exposure apparatus 200, and the developer develops the semiconductor wafer. For example, when a semiconductor wafer coated with a positive photoresist film is exposed to the pulse laser light, the exposed portions of the photoresist film are dissolved and removed by the development, whereas when the semiconductor wafer coated with a negative photoresist film is exposed to the pulse laser light, the unexposed portions of the photoresist film are removed by the development, and the photoresist film is thus patterned.

In S13, the next step differs depending on whether the layer below the photoresist film is an etching layer.

When the layer below the photoresist film is an etching layer (YES in S13), etching is performed in S14. The portions that form the surface of the semiconductor wafer and are exposed after the photoresist film is removed are etched, whereas the portions that form the surface of the semiconductor wafer and are covered with the photoresist film are protected from being etched. After S14, the exposure control processor 210 terminates the processes of the present flowchart and returns to the processes shown in FIG. 16. The overlay error D_kij may be measured in S2 through measurement of the etched semiconductor wafer.

When the layer below the photoresist film is not an etching layer (NO in S13), the exposure control processor 210 terminates the processes of the present flowchart and returns to the processes shown in FIG. 16. The layer that is not an etched layer is a layer that is not etched but is subjected to ion implantation or other processing. In the ion implantation, impurity ions are implanted into the portions that form the semiconductor wafer and are exposed after the photoresist film is removed, whereas the portions that form the semiconductor wafer and are covered with the photoresist film are protected from the ion implantation. The ion implantation is, however, not necessarily performed in the present flowchart, and the measurement of the overlay error D_kij in S2 may be performed through measurement of only the patterned photoresist film.

2.2.3 Measurement of Overlay Error D_kij

FIG. 19 is a flowchart showing the process of measuring the overlay error D_kij in detail. The processes shown in FIG. 19 correspond to the subroutine S2 shown in FIG. 16.

In S21, the measurement control processor 330 of the overlay measurement apparatus 300 sets the value of the scan field number k at 1.

In S22, the overlay measurement apparatus 300 measures the overlay error D_kij at the k-th scan field for each in-scan-field position (i, j).

In S23, the measurement control processor 330 causes the memory 332 to store the overlay error D_kij in association with metadata, such as the wafer number, the scan field number k, and the scan direction.

In S24, the measurement control processor 330 evaluates whether the scan field number k is greater than or equal to K. K is an integer greater than or equal to two but smaller than or equal to Nmax. When the scan field number k is smaller than K (NO in S24), the measurement control processor 330 proceeds to the process in S25. When the scan field number k is greater than or equal to K (YES in S24), the measurement control processor 330 proceeds to the process in S26.

In S25, the measurement control processor 330 adds one to the scan field number k to update the value of k. After S25, the measurement control processor 330 returns to the process in S22.

In S26, the measurement control processor 330 transmits the combination of the overlay error D_kij and the metadata to the lithography control processor 430. The lithography control processor 430 acquires the combination of the overlay error D_kij and the metadata. After S26, the measurement control processor 330 terminates the processes of the present flowchart and returns to the processes shown in FIG. 16.

2.2.4 Calculation of Amounts of Wavelength Adjustment Δλ_Pj and Δλ_Mj and Amounts of Focus Shift ΔZ_Pj and ΔZ_Mj

FIG. 20 is a flowchart showing the process of calculating the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and the amounts of focus shift ΔZ_Pj and ΔZ_Mj in detail. The processes shown in FIG. 20 correspond to the subroutine S3 shown in FIG. 16.

In S31, the lithography control processor 430 calculates an average D_PAij of the overlay errors in the forward scan for each in-scan-field position (i, j).

FIG. 21 conceptually shows overlay errors D_1ij, D_3ij, and D_5ij in the corresponding scan fields that undergo the forward scan. The overlay errors D_1ij, D_3ij, and D_5ij are the overlay errors D_kij measured in the scan fields having the scan field number k of 1, 3, and 5, respectively. A scan field that undergoes the forward scan corresponds to the first scan field in the present disclosure.

FIG. 22 conceptually shows the average D_PAij of the overlay errors in the forward scan. For example, when K is an even number and the scan field number k of the scan fields that undergo the scanning exposure in the forward scan is an odd number from 1 to K−1, the average D_PAij is calculated by the following expression:

$D_{\mathrm{PAij}}=\left(D_{1\mathrm{ij}}+D_{3\mathrm{ij}}+D_{5\mathrm{ij}}+\dots +D_{\left(K-1\right)\mathrm{ij}}\right)\times 2/K$

The case where the average D_PAij of the overlay errors D_kij measured for plural scan fields that undergo the scanning exposure in the forward scan is calculated has been described, but the number of scan fields that undergo the scanning exposure in the forward scan may be one. In this case, when the scan field number k is 1, the average D_PAij is D_1ij.

Referring back to FIG. 20, in S32, the lithography control processor 430 calculates an average D_MAij of the overlay errors in the reverse scan for each in-scan-field position (i, j).

FIG. 23 conceptually shows overlay errors D_2ij, D_4ij, and D_6ij in the corresponding scan fields that undergo the reverse scan. The overlay errors D_2ij, D_4ij, and D_6ij are the overlay errors D_kij measured in the scan fields having the scan field number k of 2, 4, and 6, respectively. A scan field that undergoes the reverse scan corresponds to the second scan field in the present disclosure.

FIG. 24 conceptually shows the average D_MAij of the overlay errors in the reverse scan. For example, when K is an even number and the scan field number k of the scan fields that undergo the scanning exposure in the reverse scan is an even number from 2 to K, the average D_MAij is calculated by the following expression:

$D_{\mathrm{MAij}}=\left(D_{2\mathrm{ij}}+D_{4\mathrm{ij}}+D_{6\mathrm{ij}}+\dots +D_{\mathrm{Kij}}\right)\times 2/K$

The case where the average D_MAij of the overlay errors D_kij measured for plural scan fields that undergo the scanning exposure in the reverse scan is calculated has been described, but the number of scan fields that undergo the scanning exposure in the reverse scan may be one. In this case, when the scan field number k is 2, the average D_MAij is D_2ij.

FIG. 25 shows a data table of the overlay error D_kij stored in the memory 332 in S23 in FIG. 19. The overlay error D_kij is measured for each scan field number k and for each in-scan-field position (i, j). A wafer number as the metadata is assigned to each wafer, and the scan field number k and the scan direction are assigned for each scan field number k.

FIG. 26 shows a data table of the average D_PAij of the overlay errors in the forward scan. The average D_PAij is calculated for each in-scan-field position (i, j).

FIG. 27 shows a data table of the average D_MAij of the overlay errors in the reverse scan. The average D_MAij is calculated for each in-scan-field position (i, j).

Referring again to FIG. 20, in S33, the lithography control processor 430 calculates distortion sensitivity (dβ/dλ)_i of the projection optical system 202 with respect to the wavelength, for each X-direction position i in a scan field. The calculation of the distortion sensitivity (dβ/dλ)_i will be described later with reference to FIGS. 28 to 32.

In S34, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_Pj in the forward scan for each Y-direction position j in a scan field by using the average D_PAij and the distortion sensitivity (dβ/dλ)_i. The calculation of the amount of wavelength adjustment Δλ_Pj will be described later with reference to FIGS. 33, 35, 36, and 39.

In S35, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_Mj in the reverse scan by using the average D_MAij and the distortion sensitivity (dβ/dλ)_i for each Y-direction position j in a scan field. The calculation of the amount of wavelength adjustment Δλ_Mj will be described later with reference to FIGS. 34, 37, 38, and 40.

In S36, the lithography control processor 430 calculates the amounts of focus shift ΔZ_Pj and ΔZ_Mj for each Y-direction position j in a scan field from the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj and focus sensitivity dF/dλ of the projection optical system 202 with respect to the wavelength. The calculation of the amounts of focus shift ΔZ_Pj and ΔZ_Mj will be described later with reference to FIGS. 36 and 38.

In S37, the lithography control processor 430 transmits the target wavelength at and the amounts of focus shift ΔZ_Pj and ΔZ_Mj to the exposure control processor 210. The target wavelength at is the sum of the reference wavelength λ₀ used in the preliminary exposure and the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj, and is calculated for each Y-direction position j in a scan field and for each scan direction.

After S37, the lithography control processor 430 terminates the processes of the present flowchart and returns to the processes shown in FIG. 16.

2.2.4.1 Calculation of Distortion Sensitivity (dβ/dλ)_i

FIG. 28 is a flowchart showing the process of calculating the distortion sensitivity (dβ/dλ)_i in detail. The processes shown in FIG. 28 correspond to the subroutine S33 shown in FIG. 20.

In S330, the lithography control processor 430 sets one as the value of the X-direction position i and the Y-direction position j in the beam cross-section at the position of the workpiece table WT.

In S331, the lithography control processor 430 calculates distortion sensitivity (dβ/dλ)_ij at the position (i, j) in the beam cross-section.

FIG. 29 conceptually shows the distortion sensitivity (dβ/dλ)_ij. The distortion sensitivity (dβ/dλ)_ij is a characteristic of the projection optical system 202 of the exposure apparatus 200. The projection optical system 202 is so designed that a variety of aberrations are optimized at a design wavelength, and the image formation position is shifted in accordance with a shift of the wavelength of the pulse laser light from the design wavelength. A vector representing the ratio of the shift of the image formation position to the shift of the wavelength and the direction of the shift of the image formation position is defined as the distortion sensitivity (dβ/dλ)_ij, which is shown by the arrows in FIG. 29. For example, when the wavelength is lengthened, the image formation position shifts in the directions of the arrows, whereas when the wavelength is shortened, the image formation position shifts in the opposite directions to the directions of the arrows. The distortion sensitivity (dβ/dλ)_ij is calculated for each position (i, j) in the beam cross-section by using the design value of the projection optical system 202. The subscripts i and j are each an integer greater than or equal to one. In FIG. 29, Imax is the maximum value of i, and J is the maximum value of j. It is desirable that J is smaller than Jmax but greater than or equal to three.

Referring again to FIG. 28, in S332, the lithography control processor 430 evaluates whether the value of j is greater than or equal to J. When the value of j is smaller than J (NO in S332), the lithography control processor 430 proceeds to the process in S333. When the value of j is greater than or equal to J (YES in S332), the lithography control processor 430 proceeds to the process in S334.

In S333, the lithography control processor 430 adds one to the value of j to update the value of j. After S333, the lithography control processor 430 returns to the process in S331.

In S334, the lithography control processor 430 calculates the distortion sensitivity (dβ/dλ)_i at the X-direction position i by using the expression indicated by Expression (1) below.

$\begin{array}{cc}{\left(d\beta /d\lambda \right)}_i=\frac{1}{J}\sum _{i=1}^J{\left(d\beta /d\lambda \right)}_{\mathrm{ij}}& \left(1\right)\end{array}$

That is, the distortion sensitivity (dβ/dλ)_i at the X-direction position i is the average obtained by summing along the Y-direction the values of the distortion sensitivity (dβ/dλ)_ij at the positions (i, j) in the beam cross-section and dividing the sum by J.

FIG. 30 conceptually shows the distortion sensitivity (dβ/dλ)_i. The distortion sensitivity (dβ/dλ)_i is calculated for each X-direction position i in the beam cross-section.

Referring again to FIG. 28, in S335, the lithography control processor 430 evaluates whether the value of i is greater than or equal to Imax. When the value of i is smaller than Imax (NO in S335), the lithography control processor 430 proceeds to the process in S336. When the value of i is greater than or equal to Imax (YES in S335), the lithography control processor 430 proceeds to the process in S337.

In S336, the lithography control processor 430 adds one to the value of i to update the value of i and resets the value of j to one. After S336, the lithography control processor 430 returns to the process in S331.

In S337, the lithography control processor 430 causes the memory 432 to store the distortion sensitivity (dβ/dλ)_i for each X-direction position i.

After S337, the lithography control processor 430 terminates the processes of the present flowchart and returns to the processes shown in FIG. 20.

FIG. 31 shows a data table of the distortion sensitivity (dβ/dλ)_ij. The maximum value J of j may be three.

FIG. 32 shows a data table of the distortion sensitivity (dβ/dλ)_i.

2.2.4.2 Calculation of Amounts of Wavelength Adjustment Δλ_Pj and Δλ_Mj

FIG. 33 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_Pj in the forward scan in detail. The processes shown in FIG. 33 correspond to the subroutine S34 shown in FIG. 20.

In S340, the lithography control processor 430 sets the Y-direction position j in a scan field at one.

In S341, the lithography control processor 430 reads the average D_PAij of the overlay errors in the forward scan calculated in S31 in FIG. 20. Since one Y-direction position j is determined in S340 or S346, the latter of which will be described later, the average D_PAij is read for each X-direction position i in S341.

In S342, the lithography control processor 430 reads the distortion sensitivity (dβ/dλ)_i for each X-direction position i calculated in S334 in FIG. 28.

In S343, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_Pj in the forward scan in such a way that the inequality indicated by Expression (2) below is satisfied.

$\begin{array}{cc}{R}_{\mathrm{Pj}}=\sum _i❘{\left(\frac{d\beta }{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{Pj}}+D_{\mathrm{PAij}}❘<\sum _i❘D_{\mathrm{PAij}}|& \left(2\right)\end{array}$

The left side R_Pj of Expression (2) is the value obtained by summing along the X-direction the absolute value |(dβ/dλ)_iΔλ_Pj+D_PAij| of the sum of the average D_PAij of the overlay errors and the distortion (dβ/dλ)_iΔλ_Pj in the forward scan, and corresponds to the first overlay error parameter in the present disclosure. The distortion (dβ/dλ)_iΔλ_Pj is the value obtained by multiplying the distortion sensitivity (dβ/dλ)_i by the amount of wavelength adjustment Δλ_Pj.

The right side of Expression (2) is the value obtained by summing along the X-direction the absolute value |D_Paij| of the average D_Paij of the overlay errors in the forward scan, and corresponds to the second overlay error parameter in the present disclosure. The second overlay error parameter corresponds to the first overlay error parameter in a case where all the values of the distortion (dβ/dλ)_iΔλ_Pj are set at zero. It is more desirable that the amount of wavelength adjustment Δλ_Pj is so calculated that the left side R_Pj of Expression (2) is minimized.

In S345, the lithography control processor 430 evaluates whether the value of j is greater than or equal to Jmax. When the value of j is smaller than Jmax (NO in S345), the lithography control processor 430 proceeds to the process in S346. When the value of j is greater than or equal to Jmax (YES in S345), the lithography control processor 430 proceeds to the process in S349.

In S346, the lithography control processor 430 adds one to the value of j to update the value of j. After S346, the lithography control processor 430 returns to the process in S341.

In S349, the lithography control processor 430 causes the memory 432 to store the amount of wavelength adjustment Δλ_Pj for each Y-direction position j.

After S349, the lithography control processor 430 terminates the processes of the present flowchart and returns to the processes shown in FIG. 20.

FIG. 34 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_Mj in the reverse scan in detail. The processes shown in FIG. 34 correspond to the subroutine S35 shown in FIG. 20.

The processes shown in FIG. 34 differ from the processes shown in FIG. 33 in that the average D_Maij of the overlay errors in the reverse scan is used in place of the average D_Paij of the overlay errors in the forward scan to calculate the amount of wavelength adjustment Δλ_Mj in the reverse scan, but are the same as those shown in FIG. 33 in other respects.

FIG. 35 shows the relationship between the average D_Paij of the overlay errors and the distortion sensitivity (dβ/dλ)_i in the forward scan. The average D_Paij contains Imax×Jmax vectors, and the distortion sensitivity (dβ/dλ), contains Imax vectors. In the forward scan, the pulse laser light is first radiated to the Y-direction position j being Jmax and then sequentially radiated in the direction in which the value of j decreases. Appropriately calculating the amount of wavelength adjustment Δλ_Pj for each Y-direction position j allows generation of distortion according to the distortion sensitivity (dβ/dλ)_i and reduces the overlay errors.

FIG. 36 shows an example of the amount of wavelength adjustment Δλ_Pj and the amount of focus shift ΔZ_Pj in the forward scan. The vertical axis of FIG. 36 represents time T measured from the start of scanning exposure performed on one scan field. The amount of wavelength adjustment Δλ_Pj and the amount of focus shift ΔZ_Pj are so set that the two amounts change with the time T.

When the wavelength of the pulse laser light is changed by using the amount of wavelength adjustment Δλ_Pj, the angle of refraction in the projection optical system 202 changes, so that the position where the projection optical system 202 brings the pulse laser light into focus changes in the Z-direction. Therefore, the amount of focus shift ΔZ_Pj is calculated by using the expression below, and the Z-direction position of the workpiece table WT is adjusted in accordance with the amount of focus shift ΔZ_Pj.

$\Delta Z_{\mathrm{Pj}}=\left(dF/d\lambda \right)\times \Delta {\lambda }_{\mathrm{Pj}}$

The amount of focus shift ΔZ_Pj is calculated in S36 in FIG. 20.

FIG. 37 shows the relationship between the average D_MAij of the overlay errors and the distortion sensitivity (dβ/dλ)_i in the reverse scan. In the reverse scan, the pulse laser light is first radiated to the Y-direction position j being one and then sequentially radiated in the direction in which the value of j increases. Appropriately calculating the amount of wavelength adjustment Δλ_Mj allows reduction in the overlay errors.

FIG. 38 shows an example of the amount of wavelength adjustment Δλ_Mj and the amount of focus shift ΔZ_Mj in the reverse scan. The vertical axis of FIG. 38 represents time T. The amount of focus shift ΔZ_Mj is calculated by the following expression.

$\Delta Z_{\mathrm{Mj}}=\left(dF/d\lambda \right)\times \Delta {\lambda }_{\mathrm{Mj}}$

In other respects, the amount of wavelength adjustment Δλ_Mj and the amount of focus shift ΔZ_Mj are the same as the amount of wavelength adjustment Δλ_Pj and the amount of focus shift ΔZ_Pj.

FIG. 39 shows a data table of the amount of wavelength adjustment Δλ_Pj and the amount of focus shift ΔZ_Pj in the forward scan. These values are calculated for each Y-direction position j.

FIG. 40 shows a data table of the amount of wavelength adjustment Δλ_Mj and the amount of focus shift ΔZ_Mj in the reverse scan. These values are also calculated for each Y-direction position j.

2.3 Effects

• • (1) According to the first embodiment, the exposure apparatus 200 performs the scanning exposure, in which plural scan fields of a semiconductor wafer are exposed to the pulse laser light having the reference wavelength 4o. The overlay measurement apparatus 300 measures the overlay error D_kij in each of the plural scan fields for each of plural positions (i, j) in the scan field. The lithography control processor 430 calculates the averages D_Paij and D_Maij of the overlay errors in scan fields scanned in the same direction out of the plural scan fields for each of the plural positions (i, j). The lithography control processor 430 calculates the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj with respect to the reference wavelength λ₀ in such a way that first overlay error parameters R_Pj and R_Mj calculated from the averages D_Paij and D_Maij and the values of the distortions (dβ/dλ)_iΔλ_Pj and (dβ/dλ)_iΔλ_Mj obtained when the wavelength of the pulse laser light is changed from the reference wavelength λ₀ are smaller than second overlay error parameters Σ_i|D_Paij| and Σ_i|D_Maij| calculated from the averages D_Paij and D_Maij. The laser apparatus 100 generates the pulse laser light having a wavelength controlled by using the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj, and outputs the generated pulse laser light to the exposure apparatus 200. The exposure apparatus 200 exposes the semiconductor wafer to the pulse laser light in the exposure apparatus 200 to manufacture electronic devices. The configuration described above allows appropriate reduction in the overlay error D_kij, which varies depending on the scan direction.
  • (2) According to the first embodiment, the lithography control processor 430 calculates the average D_PAij of the overlay errors in plural first scan fields that undergo the forward scan and the average D_MAij of the overlay errors in plural second scan fields that undergo the reverse scan. According to the configuration described above, the overlay error D_kij can be reduced by appropriately reducing the size of the data for each of the scan fields scanned in the same direction.
  • (3) According to the first embodiment, the outer edge of each of the first and second scan fields is located inside the outer edge of the semiconductor wafer. According to the configuration described above, in which the overlay errors D_kij in all the scan fields are used, data bias can be suppressed.
  • (4) According to the first embodiment, the lithography control processor 430 calculates the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj for each of plural Y-direction positions j. The configuration described above allows adjustment of the wavelength for each of the Y-direction positions j and appropriate reduction in the overlay error D_kij.
  • (5) According to the first embodiment, the first overlay error parameter is the value obtained by summing along the X-direction the absolute value |(dβ/dλ)_iΔλ_Pj+D_PAij| and |(dβ/dλ)_iΔλ_Mj+D_MAij| of the sum of the averages D_PAij and D_MAij and the distortions (dβ/dλ)_iΔλ_Pj and (dβ/dλ)_iΔλ_Mj. According to the configuration described above, in which the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj are calculated from the overall characteristics in the X-direction, the overlay error D_kij can be appropriately reduced.
  • (6) According to the first embodiment, the second overlay error parameters Σ_i|D_PAij| and Σ_i|D_MAij| are obtained by summing the absolute values of the averages D_PAij and D_MAij along the X-direction. According to the configuration described above, the overlay error D_kij can be further reduced as compared with a case where none of the distortions (dβ/dλ)_iΔλ_Pj and (dβ/dλ)_iΔλ_Mj due to a change in wavelength is generated.
  • (7) According to the first embodiment, the lithography control processor 430 calculates the amounts of focus shift ΔZ_Pj and ΔZ_Mj in the exposure apparatus 200 by using the amounts of wavelength adjustment Δλ_Pj and Δλ_Mj. The exposure apparatus 200 controls the Z-direction position of the semiconductor wafer in accordance with the amounts of focus shift ΔZ_Pj and ΔZ_Mj. According to the configuration described above, in which the Z-direction position is controlled in accordance with the amounts of focus shift ΔZ_Pj and ΔZ_Mj, which occur due to a change in wavelength, an image can be appropriately formed at the semiconductor wafer.

As for the other points, the first embodiment is the same as Comparative Example.

3. Lithography System that Calculates Synchronous Control Correction Values S_YPj and S_YMj for Each Scan Direction

3.1 Operation

3.1.1 Main Procedure

FIG. 41 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a second embodiment. The configuration of the lithography system according to the second embodiment is the same as that in the first embodiment. The operation in the second embodiment differs from that in the first embodiment in that S3 in FIG. 16 is replaced with S3b, as shown in FIG. 41. The processes in S1, S2, and S4 to S7 are the same as those in the first embodiment.

In S3b, the lithography control processor 430 calculates synchronous control correction values S_YPj and S_YMj as well as the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj and the amounts of focus shift ΔZ_XPj and ΔZ_XMj. The process in S3b will be described later in detail with reference to FIGS. 42 to 53.

The synchronous control correction values S_YPj and S_YMj are used to perform the synchronous control of the reticle stage RT and the workpiece table WT in S6.

3.1.2 Calculation of Amounts of Wavelength Adjustment Δλ_XPj and Δλ_XMj, Synchronous Control Correction Values S_YPj and S_YMj, and Amounts of Focus Shift ΔZ_XPj and ΔZ_XMj

FIG. 42 is a flowchart showing the process of calculating the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj, the synchronous control correction values S_YPj and S_YMj, and the amounts of focus shift ΔZ_XPj and ΔZ_XMj in detail. The processes shown in FIG. 42 correspond to the subroutine S3b shown in FIG. 41.

The processes in S31 to S33 are the same as those in the first embodiment shown in FIG. 20. In the second embodiment, the processes in S34b to S37b are carried out in place of those in S34 to S37.

In S34b, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_XPj and the synchronous control correction value S_YPj in the forward scan.

In S35b, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_XMj and the synchronous control correction value S_YMj in the reverse scan.

The amounts of wavelength adjustment Δλ_XPj and Δλ_XMj are calculated by using X-direction components D_XPAij, D_XMAij, and (dβ_X/dλ)_i of the averages D_PAij and D_MAij of the overlay errors and the distortion sensitivity (dβ/dλ)_i. The synchronous control correction values S_YPj and S_YMj are calculated by using Y-direction components D_YPAij, D_YMAij, and (dβ_Y/dλ)_i of the averages D_PAij and D_MAij of the overlay errors and the distortion sensitivity (dβ/dλ)_i. These processes will be described later in detail with reference to FIGS. 43 to 48.

In S36b, the lithography control processor 430 calculates the amounts of focus shift ΔZ_XPj and ΔZ_XMj for each Y-direction position j in a scan field from the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj and the focus sensitivity dF/dλ of the projection optical system 202 with respect to the wavelength.

In S37b, the lithography control processor 430 transmits the target wavelength λt, the synchronous control correction values S_YPj and S_YMj, and the amounts of focus shift ΔZ_XPj and ΔZ_XMj to the exposure control processor 210. The target wavelength at is the sum of the reference wavelength λ₀ and the amount of wavelength adjustment Δλ_XPj or Δλ_XMj.

3.1.3 Calculation of Amounts of Wavelength Adjustment Δλ_XPj and Δλ_XMj and Synchronous Control Correction Values S_YPj and S_YMj

FIG. 43 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_XPj and the synchronous control correction value S_YPj in the forward scan in detail. The processes shown in FIG. 43 correspond to the subroutine S34b shown in FIG. 42.

The processes in S340, S345, and S346 are the same as those in the first embodiment shown in FIG. 33. In the second embodiment, the processes in S341b to S344b and S349b are carried out in place of those in S341 to S343 and S349.

In S341b, the lithography control processor 430 reads the average D_PAij of the overlay errors in the forward scan, and calculates an X-direction component D_XPAij and a Y-direction component D_YPAij.

In S342b, the lithography control processor 430 reads the distortion sensitivity (dβ/dλ)_i and calculates an X-direction component (dβ_X/dλ)_i and a Y-direction component (dβ_Y/dλ)_i.

In S343b, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_XPj in the forward scan in such a way that the inequality indicated by Expression (3) below is satisfied.

$\begin{array}{cc}{R}_{\mathrm{XPj}}=\sum _i❘{\left(\frac{d{\beta }_X}{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{XPj}}+D_{\mathrm{XPAij}}|<\sum _i❘D_{\mathrm{XPAij}}|& \left(3\right)\end{array}$

It is more desirable that the amount of wavelength adjustment Δλ_XPj is so calculated that the left side R_XPj of Expression (3) is minimized.

In S344b, the lithography control processor 430 calculates the synchronous control correction value S_YPj in the forward scan by using Expression (4) below.

$\begin{array}{cc}{S}_{\mathrm{YPj}}=\frac{1}{\mathrm{Imax}}\sum _{i=1}^{\mathrm{Imax}}\left[{\left(\frac{d{\beta }_Y}{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{XPj}}+D_{\mathrm{YPAij}}\right]& \left(4\right)\end{array}$

That is, the synchronous control correction value S_YPj is the average obtained by summing along the X-direction the sum of the Y-direction component D_YPAij of the average D_PAij of the overlay errors and the Y-direction component (dβ_Y/dλ)_iΔλ_XPj of the distortion (dβ/dλ)_iΔλ_XPj and dividing the resultant sum by Imax.

In S349b, the lithography control processor 430 causes the memory 432 to store the amount of wavelength adjustment Δλ_XPj and the synchronous control correction value S_YPj for each Y-direction position j.

FIG. 44 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_XMj and the synchronous control correction value S_YMj in the reverse scan in detail. The processes shown in FIG. 44 correspond to the subroutine S35b shown in FIG. 42.

The processes shown in FIG. 44 differ from the processes shown in FIG. 43 in that the average D_MAij of the overlay errors in the reverse scan is used in place of the average D_PAij of the overlay errors in the forward scan, but are the same as those shown in FIG. 43 in other respects.

FIG. 45 shows the relationship between the X-direction component D_XPAij of the average D_PAij of the overlay errors and the X-direction component (dβ_X/dλ)_i of the distortion sensitivity (dβ/dλ)_i in the forward scan. Appropriately calculating the amount of wavelength adjustment Δλ_XPj allows generation of distortion according to the distortion sensitivity (dβ/dλ)_i and reduces the overlay errors in the X-direction.

FIG. 46 shows an example of the amount of wavelength adjustment Δλ_XPj and the amount of focus shift ΔZ_XPj in the forward scan. The vertical axis of FIG. 46 represents time T. The amount of focus shift ΔZ_XPj is calculated by the following expression.

$\Delta Z_{\mathrm{XPj}}=\left(dF/d\lambda \right)\times \Delta {\lambda }_{\mathrm{XPj}}$

FIG. 47 shows the relationship between the Y-direction component D_YPAij of the average D_PAij of the overlay errors and the Y-direction component (dβ_Y/dλ)_i of the distortion sensitivity (dβ/dλ)_i in the forward scan.

FIG. 48 shows an example of the amount of wavelength adjustment Δλ_XPj and the synchronous control correction value S_YPj in the forward scan. The vertical axis of FIG. 48 represents time T. Setting the amount of wavelength adjustment Δλ_XPj to reduce the X-direction component D_XPAij produces the distortion (dβ/dλ)_iΔλ_XPj, as shown in FIGS. 45 and 46. Therefore, in the second embodiment, not only the Y-direction component D_YPAij of the average D_PAij of the overlay errors but also the Y-direction component (dβ_Y/dλ)_iΔλ_XPj of the distortion (dβ/dλ))Δλ_XPj need to be reduced. To this end, the synchronous control correction value S_YPj is calculated by using Expression (4).

The amount of wavelength adjustment Δλ_XMj, the amount of focus shift ΔZ_XMj, and the synchronous control correction value S_YMj in the reverse scan are also determined as the amount of wavelength adjustment Δλ_XPj, the amount of focus shift ΔZ_XPj, and the synchronous control correction value S_YPj in the forward scan described with reference to FIGS. 45 to 48 are.

FIGS. 49 to 51 conceptually show a method for adjusting the Y-direction position of a reticle pattern to which a semiconductor wafer is exposed with the aid of the synchronous control of the reticle stage RT and the workpiece table WT. Let Vr be the travel speed of the reticle stage RT, and Vw be the travel speed of the workpiece table WT. For example, when the magnification of the projection optical system 202 is set at ¼, Vw is ¼ of Vr, and the reticle pattern is projected at a reduction magnification of ¼ onto the semiconductor wafer coated with a photoresist film. It is, however, assumed in FIGS. 49 to 51 that the magnification of the projection optical system 202 is one for easier understanding of the correspondence between the reticle pattern and the photoresist pattern. It is further assumed that the travel directions of the reticle stage RT and the workpiece table WT are not opposite directions but the same direction. As the reticle stage RT and the workpiece table WT move, a first section Rp1 of the reticle pattern is transferred to a first section Wp1 of the semiconductor wafer at time T1, and similarly, a second section Rp2 to an eighth section Rp8 of the reticle pattern are transferred to a second section Wp2 to an eighth section Wp8 of the semiconductor wafer, respectively, at time T2 to T8.

When the travel speed Vr of the reticle stage RT and the travel speed Vw of the workpiece table WT are equal to each other, as shown in FIG. 49, it is assumed that the Y-direction component D_YPAij of the average D_PAij of the overlay errors and the Y-direction component (dβ_Y/dλ)Δλ_XPj of the distortion (dβ/dλ))Δλ_XPj are generated. In FIG. 49, the spacings in the Y-direction between the first section Wp1 to the fourth section Wp4 of the semiconductor wafer are narrower than the spacings in the Y-direction between the first section Rp1 to the fourth section Rp4 of the reticle pattern. On the other hand, the spacings in the Y-direction between the fifth section Wp5 to the eighth section Wp8 of the semiconductor wafer are wider than the spacings in the Y-direction between the fifth section Rp5 to the eighth section Rp8 of the reticle pattern.

In this case, correcting the synchronous control as shown in FIGS. 50 and 51 allows adjustment of the Y-direction positions of the first section Wp1 to the eighth section Wp8.

From the time T1 to T4, a travel speed Vw1 of the workpiece table WT is made faster than the travel speed Vr of the reticle stage RT, as shown in FIG. 50. As a result, the first section Rp1 to the fourth section Rp4 of the reticle pattern are transferred to the first section Wp1 to the fourth section Wp4 indicated by the solid lines in place of those at the positions indicated by the broken lines in FIG. 50.

On the other hand, from the time T5 to T8, a travel speed Vw2 of the workpiece table WT is made slower than the travel speed Vr of the reticle stage RT, as shown in FIG. 51. As a result, the fifth section Rp5 to the eighth section Rp8 of the reticle pattern are transferred to the fifth section Wp5 to the eighth section Wp8 indicated by the solid lines in place of those at the positions indicated by the broken lines in FIG. 51.

The exposure control processor 210 can perform the synchronous control by calculating the travel speeds Vw1 and Vw2 of the workpiece table WT by using the synchronous control correction values S_YPj and S_Ymj.

FIG. 52 shows a data table of the amount of wavelength adjustment Δλ_XPj, the synchronous control correction value S_YPj, and the amount of focus shift ΔZ_XPj in the forward scan. These values are calculated for each Y-direction position j.

FIG. 53 shows a data table of the amount of wavelength adjustment Δλ_XMj, the synchronous control correction value S_Ymj, and the amount of focus shift ΔZ_XMj in the reverse scan. These values are also calculated for each Y-direction position j.

3.2 Effects

• • (8) According to the second embodiment, the lithography control processor 430 not only calculates the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj, but also calculates the synchronous control correction values S_YPj and S_Ymj used to correct the synchronous control of the reticle stage RT and the workpiece table WT of the exposure apparatus 200 by using the averages D_YPAij and D_YMAij and the values of the distortion (dβ_Y/dλ)_iΔλ_XPj and (dβ_Y/dλ)_iΔλ_XMj. The exposure apparatus 200 performs the synchronous control in accordance with the correction values S_YPj and S_Ymj. According to the configuration described above, combining the wavelength adjustment and the synchronous control adjustment allows appropriate reduction in the overlay error D_kij.
  • (9) According to the second embodiment, the values of the distortion (dβ_X/dλ)_iΔλ_XPj and (dβ_X/dλ)_iΔλ_XMj are values obtained by multiplying the distortion sensitivity (dβ_X/dλ)_i of the projection optical system 202 of the exposure apparatus 200 with respect to the wavelength of the pulse laser light by the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj, respectively. The lithography control processor 430 calculates the amounts of wavelength adjustment Δλ_XPj and Δλ_XMj by using the X-direction components D_XPAij and D_XMAij of the average of the overlay errors and the X-direction components (dβ_X/dλ)_iΔλ_XPj and (dβ_X/dλ)_iΔλ_XMj of the distortion. The lithography control processor 430 calculates the correction values S_YPj and S_YMj by using the Y-direction components D_YPAij and D_YMAij of the average of the overlay errors and the Y-direction components (dβ_Y/dλ)_iΔλ_XPj and (dβ_Y/dλ)_iΔλ_XMj of the distortion. According to the configuration described above, the overlay errors D_XPAij and DX_MAij in the X-direction can be reduced by the wavelength adjustment, and the overlay errors D_YPAij and D_YMAij in the Y-direction can be reduced by the synchronous control.
  • (10) According to the second embodiment, the lithography control processor 430 calculates the correction values S_YPj and S_YMj by summing along the X-direction the sum of the Y-direction components D_YPAij and D_YMAij of the average of the overlay errors, and the Y-direction components (dβ_Y/dλ)_iΔλ_XPj and (dβ_Y/dλ)_iΔλ_XMj of the distortion. According to the configuration described above, in which the correction values S_YPj and S_YMj are calculated from the overall characteristics in the X-direction, the overlay error D_kij can be appropriately reduced.

As for the other points, the second embodiment is the same as the first embodiment.

4. Lithography System that Calculates Amount of Wavelength Adjustment Δλ_nj and Amount of Focus Shift ΔZ_nj for Each Scan Field Number n

4.1 Operation

4.1.1 Main Procedure

FIG. 54 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a third embodiment. The configuration of the lithography system according to the third embodiment is the same as that in the first embodiment. The operation in the third embodiment differs from that in the first embodiment in that S2 and S3 in FIG. 16 are replaced with S2c and S3c, as shown in FIG. 54. The processes in S1 and S4 to S7 are the same as those in the first embodiment.

In S2c, the overlay measurement apparatus 300 measures an overlay error D_nij associated with the semiconductor wafer having undergone the preliminary exposure. The process of measuring the overlay error D_nij will be described later with reference to FIG. 56. The measured overlay error D_nij is transmitted to the lithography control processor 430.

In S3c, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_nj and the amount of focus shift ΔZ_nj. The process in S3c will be described later in detail with reference to FIGS. 57 to 60.

FIG. 55 shows plural semiconductor wafers where the overlay error D_nij is measured. Wafer numbers are assigned to the plural semiconductor wafers. Out of the plural scan fields of each of the plural semiconductor wafers, the scan fields having the same scan field number n are scanned in the same scan direction. For each of the semiconductor wafers, the overlay error D_nij is measured at the Nmax scan fields to which the scan field numbers n are assigned.

The Nmax scan fields include scan fields each having an outer edge located inside the outer edge of the semiconductor wafer, and scan fields each having an outer edge that intersects with the outer edge of the semiconductor wafer, as described with reference to FIG. 17.

In the third embodiment, for each scan field having an outer edge located inside the outer edge of the semiconductor wafer, the overlay error D_nij is measured at all the Imax×Jmax in-scan-field positions (i, j). For each scan field having an outer edge that intersects with the outer edge of the semiconductor wafer, the overlay error D_nij is measured at the in-scan-field positions (i, j) inside the outer edge of the semiconductor wafer.

4.1.2 Measurement of Overlay Error D_nij

FIG. 56 is a flowchart showing the process of measuring the overlay error D_nij in detail. The processes shown in FIG. 56 correspond to the subroutine S2c shown in FIG. 54.

The processes shown in FIG. 56 differ from those in the first embodiment shown in FIG. 19 in that the scan field number is expressed by n in place of k, and that the maximum value of the scan field number is Nmax in place of K. The other points are the same as those in the processes shown in FIG. 19.

4.1.3 Calculation of Amount of Wavelength Adjustment Δλ_nj and Amount of Focus Shift ΔZ_nj

FIG. 57 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_nj and the amount of defocus ΔZ_nj in detail. The processes shown in FIG. 57 correspond to the subroutine S3c shown in FIG. 54.

The processes shown in FIG. 57 differ from those in the first embodiment shown in FIG. 20 in that the amount of wavelength adjustment Δλ_nj and the amount of focus shift ΔZ_nj are calculated for each scan field number n. The processes are specifically carried out as shown below.

In S31c, the lithography control processor 430 calculates an average D_Anij of the overlay errors for each scan field number n and for each in-scan-field position (i, j). The average D_Anij is calculated by summing the overlay errors D_nij measured at one or more semiconductor wafers by carrying out the processes shown in FIG. 56 for each scan field number n and for each in-scan-field position (i, j) and dividing the sum by the number of semiconductor wafers.

FIG. 58 shows a data table of the average D_Anij of the overlay errors. The average D_Anij is calculated for each scan field number n and for each in-scan-field position (i, j).

Referring again to FIG. 57, the process in S33 is the same as that in the first embodiment shown in FIG. 20.

In S34c, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_nj by using the average D_Anij and the distortion sensitivity (dβ/dλ)_i. The calculation of the amount of wavelength adjustment Δλ_nj will be described later with reference to FIGS. 59 and 60.

In S36c, the lithography control processor 430 calculates the amount of focus shift ΔZ_nj from the amount of wavelength adjustment Δλ_nj and the focus sensitivity dF/dλ by using the following expression:

$\Delta Z_{\mathrm{nj}}=\left(dF/d\lambda \right)\times \Delta k_{\mathrm{nj}}$

In S37c, the lithography control processor 430 transmits the target wavelength at and the amount of focus shift ΔZ_nj to the exposure control processor 210. The target wavelength at is the sum of the reference wavelength λ₀ and the amount of wavelength adjustment Δλ_nj.

4.1.4 Calculation of Amount of Wavelength Adjustment Δλ_nj

FIG. 59 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_nj in detail. The processes shown in FIG. 59 correspond to the subroutine S34c shown in FIG. 57.

The processes shown in FIG. 59 differ from those in the first embodiment shown in FIGS. 33 and 34 in that the amount of wavelength adjustment Δλ_nj is calculated for each scan field number n. The processes are specifically carried out as shown below.

In S340c, the lithography control processor 430 sets each of the scan field number n and the Y-direction position j in a scan field at one.

In S341c, the lithography control processor 430 reads the average D_Anij of the overlay errors calculated in S31c in FIG. 57.

The process in S342 is the same as that in the first embodiment shown in FIG. 33.

In S343c, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_nj in such a way that the inequality indicated by Expression (5) below is satisfied.

$\begin{array}{cc}{R}_{\mathrm{nj}}=\sum _i❘{\left(\frac{d\beta }{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{nj}}+D_{\mathrm{Anij}}|<\sum _i❘D_{\mathrm{Anij}}|& \left(5\right)\end{array}$

It is more desirable that the amount of wavelength adjustment Δλ_nj is so calculated that the left side R_nj of Expression (5) is minimized.

The processes in S345 and S346 are the same as those in the first embodiment shown in FIG. 33. Note, however, that when the value of j is greater than or equal to Jmax (YES in S345), the lithography control processor 430 proceeds to the process in S347c.

In S347c, the lithography control processor 430 evaluates whether the value of n is greater than or equal to Nmax. When the value of n is smaller than Nmax (NO in S347c), the lithography control processor 430 proceeds to the process in S348c. When the value of n is greater than or equal to Nmax (YES in S347c), the lithography control processor 430 proceeds to the process in S349c.

In S348c, the lithography control processor 430 adds one to the value of n to update the value of n and resets the value of j to one. After S348c, the lithography control processor 430 returns to the process in S341c.

In S349c, the lithography control processor 430 causes the memory 432 to store the amount of wavelength adjustment Δλ_nj for each Y-direction position j.

FIG. 60 shows a data table of the amount of wavelength adjustment Δλ_nj and the amount of focus shift ΔZ_nj. These values are calculated for each scan field number n and for each Y-direction position j.

4.2 Effects

• • (11) According to the third embodiment, the scan fields of the plural semiconductor wafers at positions corresponding to one another are scanned in the same scan direction. The lithography control processor 430 calculates the average D_Anij of the overlay errors at the plural positions (i, j) in each of the scan fields of the plural semiconductor wafers at the positions corresponding to one another. According to the configuration described above, the overlay errors D_nij that depend on the position in each scan fields of each semiconductor wafer can be reduced.
  • (12) According to the third embodiment, the plural scan fields include scan fields each having an outer edge located inside the outer edge of the semiconductor wafer, and scan fields each having an outer edge that intersects with the outer edge of the semiconductor wafer. According to the configuration described above, the overlay errors D_nij in the scan fields each having an outer edge that intersects with the outer edge of the semiconductor wafer can also be appropriately reduced.

As for the other points, the third embodiment is the same as the first embodiment.

5. Lithography System that Calculates Synchronous Control Correction Value S_Ynj for Each Scan Field Number n

5.1 Operation

5.1.1 Main Procedure

FIG. 61 is a flowchart showing the process of exposing the semiconductor wafer to the pulse laser light in such a way that the overlay errors are reduced in a fourth embodiment. The configuration of the lithography system according to the fourth embodiment is the same as that in the first embodiment. The operation in the fourth embodiment differs from that in the first embodiment in that S2 and S3 in FIG. 16 are replaced with S2c and S3d, as shown in FIG. 61. The processes in S1 and S4 to S7 are the same as those in the first embodiment.

The process in S2c is the same as that in the third embodiment shown in FIGS. 54 and 56. For each of one or more semiconductor wafers, the overlay error D_ij is measured at the Nmax scan fields to which the scan field numbers n are assigned.

In S3d, the lithography control processor 430 calculates a synchronous control correction value S_Ynj as well as the amount of wavelength adjustment Δλ_Xnj and the amount of focus shift ΔZ_Xnj. The process in S3d will be described later in detail with reference to FIGS. 62 to 64.

The synchronous control correction value S_Ynj is used to perform the synchronous control of the reticle stage RT and the workpiece table WT in S6.

5.1.2 Calculation of Amount of Wavelength Adjustment Δλ_Xnj, Synchronous Control Correction Value S_Ynj, and Amount of Focus Shift ΔZ_Xnj

FIG. 62 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_Xnj, the synchronous control correction value S_Ynj, and the amount of focus shift ΔZ_Xnj in detail. The processes shown in FIG. 62 correspond to the subroutine S3d shown in FIG. 61.

The processes shown in FIG. 62 differ from those in the second embodiment shown in FIG. 42 in that the amount of wavelength adjustment Δλ_Xnj, the synchronous control correction value S_Ynj, and the amount of focus shift ΔZ_Xnj are calculated for each scan field number n. The processes are specifically carried out as shown below.

The process in S31c is the same as that in the third embodiment shown in FIG. 57. The lithography control processor 430 calculates the average D_Anij of the overlay errors for each scan field number n and for each in-scan-field position (i, j).

The process in S33 is the same as that in the first embodiment shown in FIG. 20.

In S34d, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_Xnj and the synchronous control correction value S_Ynj. The amount of wavelength adjustment Δλ_Xnj is calculated by using the average D_Anij of the overlay errors and an X-direction component D_XAnij and (dβ_X/dλ)_i of the distortion sensitivity (dβ/dλ)_i. The synchronous control correction value S_Ynj is calculated by using the average D_Anij of the overlay errors and a Y-direction component D_YAnij and (dβ_Y/dλ)_i of the distortion sensitivity (dβ/dλ)_i. S34d will be described later in detail with reference to FIGS. 63 and 64.

In S36d, the lithography control processor 430 calculates the amount of focus shift ΔZ_Xnj from the amount of wavelength adjustment Δλ_Xnj and the focus sensitivity dF/dλ by using the following expression:

$\Delta z_{\mathrm{xnj}}=\left(dF/d\lambda \right)\times \Delta {\lambda }_{\mathrm{xnj}}$

In S37d, the lithography control processor 430 transmits the target wavelength λt, the synchronous control correction value S_Ynj, and the amount of focus shift ΔZ_Xnj to the exposure control processor 210. The target wavelength at is the sum of the reference wavelength λ₀ and the amount of wavelength adjustment Δλ_Xnj.

5.1.3 Calculation of Amount of Wavelength Adjustment Δλ_Xnj and Synchronous Control Correction Value S_Ynj FIG. 63 is a flowchart showing the process of calculating the amount of wavelength adjustment Δλ_Xnj and the synchronous control correction value S_Ynj in detail. The processes shown in FIG. 63 correspond to the subroutine S34d shown in FIG. 62.

The processes shown in FIG. 63 differ from those in the second embodiment shown in FIG. 43 in that the amount of wavelength adjustment Δλ_Xnj and the synchronous control correction value S_Ynj are calculated for each scan field number n. The processes are specifically carried out as shown below.

In S340c, the lithography control processor 430 sets each of the scan field number n and the Y-direction position j in a scan field at one.

In S341d, the lithography control processor 430 reads the average D_Anj of the overlay errors calculated in S31c in FIG. 62, and calculates the X-direction component D_Xanij and the Y-direction component D_Yanij.

The process in S342b is the same as that in the second embodiment shown in FIG. 43, and calculates the X-direction component (dβ_X/dλ)_i and the Y-direction component (dp_Y/dλ)_i of the distortion sensitivity (dβ/dλ)_i.

In S343d, the lithography control processor 430 calculates the amount of wavelength adjustment Δλ_Xnj in such a way that the inequality indicated by Expression (6) below is satisfied.

$\begin{array}{cc}{R}_{\mathrm{Xnj}}=\sum _i❘{\left(\frac{d{\beta }_X}{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{Xnj}}+D_{\mathrm{XAnij}}|<\sum _i❘D_{\mathrm{XAnij}}|& \left(6\right)\end{array}$

It is more desirable that the amount of wavelength adjustment Δλ_Xnj is so calculated that the left side R_Xnj of Expression (6) is minimized.

In S344d, the lithography control processor 430 calculates the synchronous control correction value S_Ynj by using Expression (7) below.

$\begin{array}{cc}{S}_{\mathrm{Ynj}}=\frac{1}{\mathrm{Imax}}\sum _{i=1}^{\mathrm{Imax}}\left[{\left(\frac{d{\beta }_Y}{d\lambda }\right)}_i\Delta {\lambda }_{\mathrm{Xnj}}+D_{Y\mathrm{Anij}}\right]& \left(7\right)\end{array}$

That is, the synchronous control correction value S_Ynj is the average obtained by summing along the X-direction the sum of the Y-direction component D_Yanij of the average D_Anij of the overlay errors and the Y-direction component (dβ_Y/dλ)_iΔλ_Xnj of the distortion (dβ/dλ)_iΔλ_Xnj and dividing the resultant sum by Imax.

The processes in S345, S346, S347c, and S348c are the same as those in the third embodiment shown in FIG. 59.

In S349d, the lithography control processor 430 causes the memory 432 to store the amount of wavelength adjustment Δλ_Xnj and the synchronous control correction value S_Ynj for each Y-direction position j.

FIG. 64 shows a data table of the amount of wavelength adjustment Δλ_Xnj, the synchronous control correction value S_Ynj, and the amount of focus shift ΔZ_Xnj.

These values are calculated for each scan field number n and for each Y-direction position j.

5.2 Effects

The fourth embodiment can provide an effect that is the combination of the effects provided by the second and third embodiments.

As for the other points, the fourth embodiment is the same as the second embodiment.

6. Others

The description above is intended to be illustrative and the present disclosure is not limited thereto. Therefore, it would be obvious to those skilled in the art that various modifications to the embodiments of the present disclosure would be possible without departing from the spirit and the scope of the appended claims. Further, it would be also obvious for those skilled in the art that embodiments of the present disclosure would be appropriately combined.

The terms used throughout the present specification and the appended claims should be interpreted as non-limiting terms. For example, terms such as “comprise”, “include”, “have”, and “contain” should not be interpreted to be exclusive of other structural elements. Further, indefinite articles “a/an” described in the present specification and the appended claims should be interpreted to mean “at least one” or “one or more”. Further, “at least one of A, B, and C” should be interpreted to mean any of A, B, C, A+B, A+C, B+C, and A+B+C as well as to include combinations of any thereof and any other than A, B, and C.

Claims

1. An electronic device manufacturing method comprising: performing scanning exposure in which plural scan fields of a first photosensitive substrate are exposed to pulse laser light having a reference wavelength;measuring overlay errors at plural positions in each of the plural scan fields;calculating an average of the overlay errors at each of the plural positions in scan fields scanned in the same scan direction out of the plural scan fields;calculating an amount of wavelength adjustment with respect to the reference wavelength in such a way that a first overlay error parameter calculated from the averages and distortions produced when a wavelength of the pulse laser light is changed from the reference wavelength is smaller than a second overlay error parameter calculated from the averages;causing a laser apparatus to generate the pulse laser light having a wavelength controlled by using the amount of wavelength adjustment;outputting the pulse laser light to an exposure apparatus; andexposing a second photosensitive substrate to the pulse laser light in the exposure apparatus to manufacture electronic devices.

2. The electronic device manufacturing method according to claim 1, wherein an average of the overlay errors at each of the plural positions in plural first scan fields scanned in a first direction and an average of the overlay errors at each of the plural positions in plural second scan fields scanned in a second direction are calculated as the average.

3. The electronic device manufacturing method according to claim 2, wherein the first and second scan fields each have an outer edge located inside an outer edge of the first photosensitive substrate.

4. The electronic device manufacturing method according to claim 1, wherein the amount of wavelength adjustment is calculated for each of plural positions in the scan direction.

5. The electronic device manufacturing method according to claim 1, wherein the first overlay error parameter is a value obtained by summing,along a direction that intersects with the scan direction, absolute values of sums of the averages and the distortions.

6. The electronic device manufacturing method according to claim 5, wherein the second overlay error parameter is a value obtained by summing absolute values of the averages along the direction that intersects with the scan direction.

7. The electronic device manufacturing method according to claim 1, wherein the amount of wavelength adjustment is used to calculate an amount of focus shift in the exposure apparatus, anda position of the second photosensitive substrate in an optical axis direction is controlled in accordance with the amount of focus shift.

8. The electronic device manufacturing method according to claim 1, wherein the averages and the distortions are used to calculate a correction value used to perform synchronous control of a reticle stage and a workpiece table of the exposure apparatus, andthe synchronous control is performed in accordance with the correction value.

9. The electronic device manufacturing method according to claim 8, wherein each distortion is a value obtained by multiplying a distortion sensitivity of a projection optical system of the exposure apparatus with respect to the wavelength of the pulse laser light by the amount of wavelength adjustment,the amount of wavelength adjustment is calculated by using components of the averages in a direction that intersects with the scan direction and components of the distortions in the direction that intersects with the scan direction, andthe correction value is calculated by using components of the averages in the scan direction and components of the distortions in the scan direction.

10. The electronic device manufacturing method according to claim 9, wherein the correction value is calculated by summing, along the direction that intersects with the scan direction, sums of the components of the averages in the scan direction and the components of the distortions in the scan direction.

11. The electronic device manufacturing method according to claim 1, wherein the first photosensitive substrate includes plural photosensitive substrates,scan fields of the first photosensitive substrate at positions corresponding to each other are scanned in the same scan direction, andthe average is calculated at each of the plural positions for each of the scan fields at the positions corresponding to each other.

12. The electronic device manufacturing method according to claim 11, wherein the plural scan fields include scan fields each having an outer edge located inside an outer edge of the first photosensitive substrate and scan fields each having an outer edge that intersects with the outer edge of the first photosensitive substrate.

13. The electronic device manufacturing method according to claim 11, wherein the amount of wavelength adjustment is calculated at each of plural positions in the scan direction.

14. The electronic device manufacturing method according to claim 11, wherein the first overlay error parameter is a value obtained by summing,along a direction that intersects with the scan direction, absolute values of sums of the averages and the distortions.

15. The electronic device manufacturing method according to claim 14, wherein the second overlay error parameter is a value obtained by summing absolute values of the averages along the direction that intersects with the scan direction.

16. The electronic device manufacturing method according to claim 11, wherein the amount of wavelength adjustment is used to calculate an amount of focus shift in the exposure apparatus, anda position of the second photosensitive substrate in an optical axis direction is controlled in accordance with the amount of focus shift.

17. The electronic device manufacturing method according to claim 11, wherein the averages and the distortions are used to calculate a correction value used to perform synchronous control of a reticle stage and a workpiece table of the exposure apparatus, andthe synchronous control is performed in accordance with the correction value.

18. The electronic device manufacturing method according to claim 17, wherein each distortion is a value obtained by multiplying a distortion sensitivity of a projection optical system of the exposure apparatus with respect to the wavelength of the pulse laser light by the amount of wavelength adjustment,the amount of wavelength adjustment is calculated by using components of the averages in a direction that intersects with the scan direction and components of the distortions in the direction that intersects with the scan direction, andthe correction value is calculated by using components of the averages in the scan direction and components of the distortions in the scan direction.

19. The electronic device manufacturing method according to claim 18, wherein the correction value is calculated by summing, along the direction that intersects with the scan direction, sums of the components of the averages in the scan direction and the components of the distortions in the scan direction.

20. A lithography control processor comprising: a non-transitory computer-readable storage medium configured to store a lithography control program; anda CPU,the lithography control program causing the CPU to acquire overlay errors at plural positions in each of plural scan fields of a first photosensitive substrate that undergoes scanning exposure in which the plural scan fields are exposed to pulse laser light having a reference wavelength,calculate an average of the overlay errors at each of the plural positions in scan fields scanned in the same scan direction out of the plural scan fields, andcalculate an amount of wavelength adjustment with respect to the reference wavelength in such a way that a first overlay error parameter calculated from the averages and distortions produced when a wavelength of the pulse laser light is changed from the reference wavelength is smaller than a second overlay error parameter calculated from the averages.